JPH0878666A - High electron mobility transistor and its manufacture - Google Patents

Abstract

PURPOSE: To prevent the dispersion of a drain saturation current and improve gate breakdown strength by using a thin layer Al on a Schottky contact layer and besides, reacting InGaP being the Schottky contact layer and the thin layer Al. CONSTITUTION: A buffer layer 103, a channel layer 104, a spacer layer 105, an electron supply layer 106, a Schottky contact layer 107, and an ohmic contact layer 108 are made on, a semiinsulating InP substrate 102. Next, a source electrode 109 and a drain electrode 110 are made on the ohmic contact layer 108. Furthermore, thin layers Al/Ti/Pt/Au are deposited in order in a gate electrode region 115, and a gate electrode 112 is made being lifted off. Then, annealing is performed in arsine gas atmosphere, and the thin layer Al being the lower most layer of the gate electrode 112 and the InGaP of a Schottky contact layer 107 are reacted upon each other so as to form a stable Schottky interface layer.

Description

Detailed Description of the Invention

[0001]

The present invention relates to In using InGaP.
The present invention relates to an AlAs / InGaAs high electron mobility transistor.

[0002]

2. Description of the Related Art A high electron mobility transistor (hereinafter, HEMT) having an InGaAs channel layer and an InAlAs electron supply layer formed on a semi-insulating InP substrate is known.
FIG. 3 shows the sectional structure, and FIGS. 4A to 4D show the manufacturing process. Next, the manufacturing process of this conventional HEMT will be described with reference to FIG. After forming undoped InP as the buffer layer 203 or InAlAs lattice-matched with the substrate 202 on the semi-insulating InP substrate 202, undoped InGaAs as the channel layer 204, undoped InAlAs as the spacer layer 205, and the electron supply layer 20 are formed thereon.
6, InAlAs doped with n-type impurities, and undoped InAl as the Schottky contact layer 207.
As and InGaAs, which is doped with n-type impurities as the ohmic contact layer 208, are sequentially epitaxially grown to form a substrate (hereinafter, HEMT substrate 201) (see FIG. 4A). Next, an ohmic metal is vapor-deposited and alloyed on the HEMT substrate 201 to form a source electrode 209 and a drain electrode 210 which are in ohmic contact with the ohmic contact layer 208 (see FIG. 4B). Next, a resist mask 211 is formed by a photolithography technique so as to have a gate opening in the gate electrode region 214 on the ohmic contact layer 208, and the ohmic contact layer 208 in the gate electrode region 214 is formed while monitoring the source and drain currents. Removed by wet etching (hereafter recess etching)
Then, the gate electrode region of the Schottky contact layer 207 is exposed (see FIG. 4C). Then, for example, Ti / Pt / Au 212 is used as the gate electrode, and these are sequentially vapor-deposited by metal vapor deposition and lift-off to form a Schottky gate electrode. (See FIG. 4 (d)). Such HEMT has the following problems.

First of all, the Schottky contact layer 20
The Schottky barrier Φ _B formed by InAlAs 7 is as low as about 0.4 V regardless of the metal type, and the gate breakdown voltage of the device is insufficient in practical use. In this material system, the height of the Schottky barrier hardly changes even if the gate electrode metal is selected. When thin Pt is used for the gate electrode and diffused into the InAlAs Schottky contact layer, InAlAs
It is known that a high Schottky barrier can be formed between the Pt gate and the HEMT.
When a reliability test in which a gate reverse voltage of 1.5 V is applied is performed, the gate reverse current may increase or the drain saturation current may significantly change, resulting in a low process yield.

Secondly, in the recess etching in the step of forming the gate electrode, the etching selectivity of the Schottky contact layer 207 and the ohmic layer 208 is small, and the etching depth is not controllable. Therefore, it is difficult to control the process such as variations in drain saturation current, pinch-off voltage, and mutual conductance gm. Furthermore, in the process of forming the gate electrode by metal deposition from recess etching,
The InAlAs surface of the Schottky contact layer 207 exposed by the recess etching is altered to change the mutation layer 213.
(See FIG. 3). That is, since the InAlAs Schottky contact layer 207 undergoes side etching in the lateral direction more than the resist mask pattern 211 on the gate electrode region 214, after the gate electrode 212 is formed, the Schottky contact layer 2 is formed on both sides of the gate electrode 212.
07 is exposed, and in the exposed Schottky contact layer 207, InAlAs is altered and the altered layer 21.
You can do 3. The altered layer 213 depletes electrons on the surface of the Schottky contact layer 207. Then, the drain saturation current flowing between the source and the drain decreases, and the pinch-off voltage varies, as if the deep recess etching was performed. Further, the channel resistance increases, and the mutual conductance gm, the gain Ga, etc. are deteriorated. Further alteration layer 213
Is difficult to control, which causes the characteristics of the HEMT to change over time.

As described above, conventional InAlAs / InGaAs
The system HEMT has many factors that are difficult to control in the manufacturing process of the gate electrode. Therefore, in order to solve the above problem, instead of InAlAs which is the Schottky contact layer 207, InGaAlP307 [In _1-x (Ga _1-y Al
_y ) _x P (0 <x ≦ 1, 0 ≦ y ≦ 1)] InA
lAs / InGaAs HEMT is Japanese Patent Application No. 3-1875
53 are proposed. The sectional view is shown in FIG. Aluminum composition ratio y of Schottky contact layer 307
Is 0 <y, I of the Schottky contact layer 307 is
Since the Schottky barrier Φ _B between nGaAlP and the metal formed at the bottom of the gate electrode, such as Ti, is as large as about 0.7 eV, the gate breakdown voltage of the device is improved to a value that does not cause any problems in practical use. Further, for example, in recess etching by wet etching using phosphoric acid and hydrogen peroxide solution, the selection ratio of the ohmic contact layer 308 (InGaAs) to the Schottky contact layer 307 (InGaAlP) is 10 times or more. The controllability of the etching depth is improved. The recess etching in this case is particularly called selective recess etching. As described above, the HEMT of this system solves the above two problems. But one problem remains. That is, the surface of the Schottky contact layer 307 exposed by the etching is altered in the process of forming the gate electrode by the metal deposition method from the recess etching to form the mutation layer 313. Although the Schottky contact layer 307 is hardly etched by the selective recess etching, the ohmic contact layer 308 is etched sideways in the lateral direction as compared with a resist mask pattern (not shown) in the gate region, and the gate electrode exposed by the side etching. 312 Schottky contact layer 307 on both ends
However, after the gate electrode 312 is formed, the quality is altered to form a mutation layer 313. These mutation layers 313 deplete the electrons on the surface of the Schottky contact layer 307 like the mutation layer 213 described above. The HEMT behaves as if it were deeply recessed, and deteriorates, disperses, or changes with time characteristics such as drain saturation current, pinch-off voltage, mutual conductance gm, and gain Ga. These various problems become a serious drawback when the HEMT integrated circuit is considered, because the process yield is extremely reduced. On the other hand, when the aluminum composition ratio y of the Schottky contact layer 307 is y = 0, that is, when the Schottky contact layer 307 is InGaP, the mutation layer 2 described above is used.
13 and 313 are not formed, and various characteristics are not scattered or deteriorated. However, this InGaP cannot obtain a high Schottky barrier with the gate metal. Therefore, the gate breakdown voltage of the HEMT is insufficient in practical use.
In this material system, the height of the Schottky barrier hardly changes even if the material of the gate electrode is selected.

[0006]

As described above, the conventional I
InAlAs / InGaAs system H using nGaAlP
In the EMT, in the step of forming the gate electrode, a difficult-to-control mutation layer is formed on the surface of the Schottky contact layer, so that even in the HEMT manufactured in the same step, the drain saturation current varies and the gate breakdown voltage is low. There was a problem that there was a large variation. The present invention aims to provide a HEMT that solves these problems.

[0007]

In order to achieve the above-mentioned object, in the first invention, InGaP / InAl having a conductor layer having a multilayer structure formed at a predetermined position on a semiconductor layer is provided.
In the As / InGaAs HEMT, an aluminum layer is formed between the semiconductor layer and the conductor layer, and the electrical contact state between the semiconductor layer and the aluminum is Schottky contact, electrical contact between the conductor layer and the aluminum. H characterized by being in ohmic contact
In a second aspect of the present invention, there is provided an EMT, which comprises a step of forming a conductor layer having a multilayer structure at a predetermined position on a semiconductor layer.
In the method of manufacturing a GaP / InAlAs / InGaAs HEMT, an aluminum layer is provided between the semiconductor layer and the conductor layer such that the electrical contact state is Schottky contact with the semiconductor layer and ohmic contact with the conductor layer. HEM having a step of forming
A method for manufacturing T is provided.

[0008]

The HEMT provided by the present invention is an InAlAs / InGaAs system H in which InGaP is used for the semiconductor layer (Schottky contact layer) exposed by recess etching.
In EMT, a thin aluminum layer is used as the metal material used for the conductor layer (gate electrode), and by reacting with InGaP of the Schottky contact layer, a high Schottky barrier can be obtained in the Schottky contact layer. As compared with the case where titanium (Ti) is used for the gate electrode, it is possible to form a gate electrode having a small gate leak current and a good gate breakdown voltage. Further, since Al is not used for the Schottky contact layer, it is possible to prevent variations and deterioration of the HEMT characteristics.

[0009]

An embodiment of the present invention will be described with reference to the drawings.
FIG. 1 shows a cross-sectional structure of the HEMT of the present invention, and FIG.
The manufacturing process is shown in (d). InGaP described in this embodiment
Is specifically In _x Ga _{1 -x} P (0 ≦ x <1), but is described as InGaP for convenience. Semi-insulating In
Undoped InP or InAlAs is formed as the buffer layer 103 on the P substrate 102, undoped InGaAs is used as the channel layer 104, undoped InAlAs is used as the spacer layer 105, and n-type InAlAs is used as the electron supply layer 106 on the P substrate 102. Further, undoped InG is used as the Schottky contact layer 107.
Finally, aP is used as the ohmic contact layer 108.
Type InGaAs is sequentially epitaxially grown to form a HEMT substrate 101 with these semiconductor layers (FIG. 2).
(See (a)). Next, an ohmic metal is vapor-deposited on a predetermined portion of the substrate 101, and an alloying process is performed to form an ohmic contact source electrode 109 and a drain electrode 110 on the ohmic contact layer 108 (FIG. 2B). reference).

Next, a resist mask 111 having a gate opening is formed in the gate electrode region 114, and the ohmic contact layer 108 in the gate electrode region 114 is recess-etched to expose the gate electrode region 115 in the Schottky contact layer 107. (See FIG. 2 (c)). Here, for the recess etching, for example, a phosphoric acid: hydrogen peroxide solution: water: = 5: 2: 80 phosphoric acid-based etchant is used.
Only the nGaAs ohmic contact layer 108 is selectively etched. When this etchant is used, the etching selection ratio can be 10 times or more, so InGaP is hardly etched in this etching step.

Further, for example, a thin layer of Al / Ti / Pt / Au is sequentially deposited on the gate electrode region 115 and lifted off to form the gate electrode 112 (see FIG. 2D).
After that, annealing is performed at an actual temperature of 660 ° C. or lower in an arsine gas atmosphere. Thus, the lowermost thin film Al of the gate electrode 112 and the I of the Schottky contact layer 107 are formed.
Stable Schottky interface layer 113 that reacts with nGaP
(See FIG. 1). Schottky interface layer 1 here
The thickness of 13 can be controlled by the thickness of the thin layer Al. Therefore, the magnitude of the drain saturation current between the source electrode 109 and the drain electrode 110 is controlled with good reproducibility by considering the etching depth by the selective recess etching and the thickness of the Schottky interface layer 113. In addition, this anneal step can form the stable Schottky interface layer 113 even in an inert gas atmosphere such as argon gas.

In the HEMT according to this example, the variation in drain saturation current from substrate to substrate was 30% or less as compared with the conventional HEMT using Ti for the gate electrode. In the reverse voltage-current characteristic between the gate electrode 112 and the source electrode 109, which is obtained when the source electrode 109 and the drain electrode 110 are short-circuited, the reverse current is 50 μA / m.
When the gate voltage at m was taken as the gate breakdown voltage, this gate breakdown voltage was improved 10 times or more. The present invention is applicable to all HEs using InGaP for the Schottky contact layer.
Adapt to MT.

[0013]

As described above, according to the present invention,
InAlAs / InGaAs HE using InGaP
Thin layer Al on the Schottky contact layer in MT
Of InGa that is a Schottky contact layer
By reacting P with the thin layer Al, it is possible to provide a HEMT having a high gate breakdown voltage and a small variation in element characteristics.

[Brief description of drawings]

FIG. 1 is a sectional view of a HEMT according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a manufacturing process of a HEMT according to an embodiment of the present invention.

FIG. 3 is a sectional view of a conventional HEMT.

FIG. 4 is a cross-sectional view showing a manufacturing process of a conventional HEMT (Schottky contact layer is InAlAs).

FIG. 5 is a cross-sectional view of a conventional HEMT (Schottky contact layer is InGaAlP).

[Explanation of symbols]

 101, 201, 301 HEMT substrate 102, 202, 302 Semi-insulating InP substrate 103, 203, 303 Buffer layer 104, 204, 304 Channel layer 105, 205, 305 Spacer layer 106, 206, 306 Electron supply layer 107, 207, 307 Schottky contact layer 108, 208, 308 Ohmic contact layer 109, 209, 309 Source electrode 110, 210, 310 Drain electrode 111, 211, 311 Resist mask 112, 212, 312 Gate electrode 113 Schottky interface layer 213, 313 Mutation Layer 114, 115, 214 gate electrode region

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Internal reference number FI Technical indication H01L 29/872 9171-4M H01L 29/80 F

Claims (6)

[Claims] 1. InGaP / InAlAs / having a conductor layer having a multilayer structure formed at a predetermined position on a semiconductor layer.
In an InGaAs-based high electron mobility transistor, an aluminum layer is formed between the semiconductor layer and the conductor layer, and an electrical contact state between the semiconductor layer and the aluminum is Schottky contact, and between the conductor layer and the aluminum layer. A high electron mobility transistor characterized in that the electrical contact state is ohmic contact. 2. The high electron mobility transistor according to claim 1, wherein the aluminum layer is an aluminum compound. 3. The high electron mobility transistor according to claim 1, wherein the aluminum layer is formed so as to cover the semiconductor layer. 4. A method of manufacturing a high electron mobility transistor, comprising the step of forming a conductor layer having a multilayer structure at a predetermined position on a semiconductor layer, wherein the electrical contact state is Schottky contact with the semiconductor layer, A method of manufacturing a high electron mobility transistor, comprising a step of forming an aluminum layer between the semiconductor layer and the conductor layer so as to make ohmic contact with the conductor layer. 5. The method for manufacturing a high electron mobility transistor according to claim 4, wherein the aluminum layer is an aluminum compound. 6. The method of manufacturing a high electron mobility transistor according to claim 4, wherein the aluminum layer is formed so as to cover the semiconductor layer.