JPH0878431A - Silicon carbide vertical type bipolar transistor and its manufacture - Google Patents

Abstract

PURPOSE: To increase the controllable current and enlarge the safe operation region in the case of switching, in a silicon carbide vertical type bipolar transistor. CONSTITUTION: In a silicon carbide bipolar transistor wherein an N-type collector layer 24, a P-type base layer 22 and an N-type emitter layer 23 are laminated in order, a trench 29 reaching the P-type base layer 22 from the surface of the N-type emitter layer 23 is formed. A base electrode 26 is formed in the bottom of the trench 29, and an emitter electrode 25 is formed on the base electrode 26 via an insulating film 30. The isolation distance between the emitter electrode 25 and the base electrode 26 is set not in the lateral direction but in the vertical direction, so that the substrate area can be effectively used. Since the width of the emitter layer 23 can be reduced, the ineffective region distant from the base electrode 26 can be reduced. Since a collector current can be rapidly led out from the base electrode 26, imperfect turn-off due to residual carrier is not caused. Thereby a bipolar transistor whose safe operation region is large can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a bipolar transistor for controlling a high breakdown voltage and a large current and a manufacturing method thereof.

[0002]

2. Description of the Related Art Bipolar transistors, which are composed of three semiconductor layers having different conductivity types alternately, are the mainstream of silicon semiconductors. FIG. 6 shows a sectional view of a vertical bipolar transistor for high breakdown voltage and large current. The p base layer 2 is formed by diffusing the acceptor-forming impurities from one main surface of the n-drift layer 1 having a high specific resistance, and the n-emitter is formed in a part of the surface layer by selectively diffusing the donor-forming impurities. Region 3 is formed. An n collector layer 4 is formed on the other main surface of the n drift layer 1 by diffusing donor-forming impurities, and emitter electrodes are formed on the surfaces of the n emitter region 3, the p base layer 2, and the n collector layer 4, respectively. 5, a base electrode 6 and a collector electrode 7 are provided.
The operation of this npn bipolar transistor is that a large collector current can flow from the collector electrode 7 to the emitter electrode 5 by flowing a small base current from the base electrode 6 to the emitter electrode 5. A large amount of carriers are injected into the n drift layer 1 to cause conductivity modulation, and the on-voltage is reduced.
Thus, in order to process a large current with a high breakdown voltage, the structure is such that a current flows from the collector electrode 7 on the back surface of the device to the emitter electrode 5 on the front surface, and a large collector current can be controlled with a small base current.

Conventionally, in the field of silicon semiconductors, the base and emitter regions are formed by thermally diffusing the impurities forming the p-type layer and the n-type region, respectively. Recently, as a semiconductor material other than silicon, silicon carbide (hereinafter referred to as SiC
Abbreviated) is attracting attention. Since the maximum electric field strength of SiC is larger than that of silicon by one digit or more and the band gap thereof is large, SiC is considered to be optimal for a high breakdown voltage element or a high temperature semiconductor element. However, unlike silicon, it is difficult to form a region having a deep p-type or n-type diffusion depth by diffusion of impurities in SiC. Therefore, the main method of forming a pn junction is an epitaxial growth method or an ion implantation method. A cross-sectional view of an example of a SiC bipolar transistor in which a pn junction is formed by an epitaxial growth method is shown in FIG. 7 (Von Munch et al., Solid State Electronics, Vol. 21, pp. 479, 1978).
n collector layer 14, n drift layer 11, p base layer 1
2. The uppermost n emitter layer 13 of the SiC substrate in which the n emitter layer 13 is sequentially laminated by epitaxial growth is partially removed to expose the p base layer 12 thereunder,
Emitter electrode 15, base electrode 16, collector electrode 17
Is provided. A silicon oxide film 18 protects and stabilizes the surface and the bonding surface. Si
Similar to silicon, C can grow a silicon oxide film by thermal oxidation.

[0004]

The current supplied from the base controls the collector current by flowing to the emitter, but almost no base current flows in the emitter portion far from the base electrode, so that portion is reduced. This results in an invalid area and reduces the controllable current. Further, when the collector current is drawn from the base electrode during switching, the voltage may be reapplied with carriers remaining in the emitter portion far from the base, and turn-off may fail and the device may be destroyed. Therefore, miniaturization is particularly important for improving device characteristics. In the conventional bipolar transistor, a fixed distance is required between both electrodes because the electrodes are separated between the base and the emitter, and the distance is at least about 10 μm. in this way,
The characteristics of conventional bipolar transistors are limited because of their difficult structure to miniaturize.

Further, the article citing the SiC transistor of FIG. 7 describes the manufacturing method of the transistor in detail. The process is as follows, in particular, a long process including many photoetching processes. Has become. p
Base layer 12 epitaxial growth, active base region selective etching, n emitter layer 11 epitaxial growth, n collector region and p base region selective etching, n emitter region selective etching, thermal oxide film formation, Ni film adhesion, patterning, sintering, (emitter electrode) Al / Si film adhesion, patterning, sintering, (gate electrode) Ni film adhesion, sintering, (collector electrode).

In view of the above problems, an object of the present invention is to provide a SiC bipolar transistor suitable for miniaturization and which can be manufactured by a simple process, and a manufacturing method thereof.

[0007]

[Means for Solving the Problems] In order to solve the above problems,
The SiC bipolar transistor of the present invention comprises a second conductivity type base layer on the first conductivity type collector layer, a first conductivity type emitter layer on the base layer, and a base electrode provided in contact with the base layer. In one having an emitter electrode provided in contact with the emitter layer and a collector electrode provided on the back surface of the collector layer, a base electrode is formed on the surface of the base layer dug in a trench shape from the surface of the emitter layer. It is assumed that

An insulating film is formed on the base electrode provided at the bottom of the trench.
Further, it is assumed that the emitter electrode is extended on the base electrode sandwiched between the two emitter layers with an insulating film interposed therebetween. In addition, a first conductivity type drift layer may be provided between the first conductivity type collector layer and the second conductivity type base layer.

As a method of manufacturing the above-mentioned vertical silicon carbide bipolar transistor, a first conductive type collector layer, a second conductive type base layer, and a first conductive type emitter layer are laminated in this order on a silicon carbide substrate. A photoresist is applied on the surface of the one conductivity type emitter layer to form a pattern, a trench penetrating the first conductivity type emitter layer and reaching the second conductivity type base layer is formed, and then a metal film is deposited to form a trench. The base electrode is formed on the bottom, and the metal film other than the base electrode is lifted off.

[0010]

The base electrode is formed on the surface of the base layer, which is dug in a trench shape from the surface of the emitter layer, by taking the above-mentioned means, thereby increasing the separation distance between the emitter electrode and the base electrode. Therefore, the lateral separation distance can be reduced.

If an insulating film is formed on the base electrode at the bottom of the trench, the insulation between both electrodes can be improved. Further, the width of the emitter layer can be narrowed by forming the emitter electrode on the base electrode sandwiched between the two emitter layers via the insulating film. As a method for manufacturing the above-mentioned silicon carbide vertical bipolar transistor, after forming a trench reaching the second conductivity type base layer, a metal film is deposited to form a base electrode at the bottom of the trench, and the other part is formed. By removing the metal film by lift-off, the photoetching process can be performed only once.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a sectional view of an SiC bipolar transistor of an embodiment of the present invention. From the bottom, the n collector layer 24, the n drift layer 21, p
A trench 29 penetrating the n emitter layer 23 and reaching the p base layer 22 is provided from the surface of the uppermost n emitter layer 23 of the SiC substrate in which the base layer 22 and the n emitter layer 23 are stacked. A base electrode 26 is provided on the bottom surface of the trench 29, and an insulating film 30 is filled thereover. A continuous emitter electrode 25 is provided on the emitter layer 23 and the insulating film 30, and a collector electrode 27 is provided on the back surface of the collector layer 24.

As can be seen from the figure, since the emitter electrode 25 and the base electrode 26 are separated in the vertical direction, the interval can be made narrower than in the case of separating both electrodes in the horizontal direction as in the conventional case, and the area efficiency can be improved. It can be greatly improved compared to the past. Conventionally, the emitter electrode 25 is connected to the E terminal on each emitter layer 23, or a portion connected to the E terminal is provided separately from the active portion. In the present invention, as shown in FIG. Since the emitter electrode 25 can be formed to extend on the n emitter layer 23 and the insulating film 30, the n emitter layer 23
Can be narrowed and the emitter electrode portion can be easily formed.

FIG. 2 is a perspective view of the transistor of the embodiment shown in FIG. 1 with the emitter electrode 25 and the insulating film 30 removed. By providing a wide base electrode portion 26a for taking out leads and the like from the base electrode 26 to the outside, the base electrode portion 26b between the island-shaped n emitter layers 23 may be narrow. There are several possible patterns for the base electrode 26. 3A and 3B show examples of patterns of the base electrode 26. The simplest one is a stripe structure as shown in FIG. 3 (a), but it may be a lattice structure as shown in FIG. 3 (b).

By adopting such a trench structure, the emitter layer 23 can be miniaturized, and the width of the emitter layer 23 of the structure of FIG. 1 can be reduced to several μm. In the conventional bipolar transistor, this distance reaches several tens of μm, but as compared with this distance, miniaturization of about one digit is possible. Therefore, it is possible to reduce the invalid area, make the current distribution uniform, improve the current density, and increase the controllable current. The miniaturization of the emitter layer 23 also helps prevent turn-off failures during switching.

In the embodiment of FIG. 1, n collector layer 24 and p
An example of a high breakdown voltage bipolar transistor in which the n-drift layer 21 having a high specific resistance is sandwiched between the base layers 22 is shown, but the n-drift layer 21 may not be provided. In addition, an oxide film is formed on the side wall of the trench 29 so that the n emitter layer 23
It is also possible to stabilize the exposed portion of the junction between the p base layer 22 and the p base layer 22.

4 (a) to 4 (c) and FIG. 5 (a)
Sections (c) to (c) are sectional views in each step for explaining the manufacturing steps of the SiC bipolar transistor of FIG. On the substrate composed of the n collector layer 24 and the n drift layer 21, the p base layer 22 and the n emitter layer 23 are formed.
Are formed by an epitaxial growth method [Fig.
(A)]. Next, a photoresist is applied and trench etching is performed using the first pattern 31 formed by the first photomask [(b) of the same figure]. At this time, the width of the trench is 0.5 to 5 μm. This is because the insulator is embedded in the trench in the following steps. next,
The base electrode 26 is formed at the bottom of the trench 29 by Al / Si sputter deposition [FIG. This time,
The metal film slightly adheres to the resist on the emitter layer 23 and the side wall of the trench, but the metal film on the side wall of the trench can be removed by slightly wet etching the whole. Then, an insulating film 30 of a silicon oxide film is formed by low pressure CVD and embedded in the trench 29 [FIG.
(A)]. Further, the metal film 32 on the emitter layer 23 is removed by lift-off to expose the emitter surface, and the surface is dry-etched flat [FIG.
(B)]. Finally, a Ni film is sputter-deposited to form the emitter electrode 25 on the upper portion, and the collector electrode 27 made of the Ni film is also formed on the back surface of the collector layer 24 to complete the process [FIG. As described above, a photoresist pattern for forming a trench is formed, a trench reaching the second conductivity type base layer is formed, and then a metal film is deposited to form a base electrode at the bottom of the trench. The photo-etching process can be completed only once by removing the metal film of the above by lift-off.

[0018]

As described above, in the trench type SiC bipolar transistor of the present invention, the base electrode is provided at the bottom of the trench formed through the emitter layer, so that the emitter electrode and the base electrode are laterally aligned. The separation distance can be shortened and the utilization efficiency of the substrate area is improved. Further, by reducing the width of the emitter layer to a few μm per cell, which is one digit or more smaller than the conventional one, it is possible to reduce the ineffective area and increase the controllable current. The miniaturization of the emitter layer also helps prevent turn-off failures during switching.

As a method for manufacturing the above-described vertical silicon carbide bipolar transistor, a trench reaching the second conductivity type base layer is formed, and then a metal film is deposited to form a base electrode at the bottom of the trench. The photo-etching process can be done only once by removing the metal film in the part of by lift-off.

[Brief description of drawings]

FIG. 1 is a sectional view of a silicon carbide vertical bipolar transistor according to an embodiment of the present invention.

FIG. 2 is a perspective view of the silicon carbide vertical bipolar transistor of FIG. 1 with an emitter electrode and an insulating film removed.

FIG. 3A is a plan view showing an arrangement of base electrodes of a bipolar transistor according to an embodiment of the present invention. FIG. 6B is a plan view showing the arrangement of another base electrode.

4A to 4C are cross-sectional views showing manufacturing steps of the bipolar transistor of the embodiment of the present invention in the order of FIGS.

FIG. 5 is a cross-sectional view showing the manufacturing steps of the bipolar transistor of the embodiment of the present invention following FIG. 4 in the order of (a) to (c).

FIG. 6 is a sectional view of a conventional silicon vertical bipolar transistor.

FIG. 7 is a cross-sectional view of a conventional silicon carbide vertical bipolar transistor manufactured by a conventional epitaxial growth method.

[Explanation of symbols]

1, 11, 21 n Drift layer 2, 12, 22 p Base layer 3, 13, 23 n Emitter region or n emitter layer 4, 14, 24 n Collector layer 5, 15, 25 Emitter electrode 6, 16, 26 Base electrode 7, 17 and 27 collector electrode 8 and 18 oxide film 29 trench 30 insulating film 31 first pattern 32 metal film

Claims (5)

[Claims] 1. A second conductivity type base layer on a first conductivity type collector layer made of silicon carbide, a first conductivity type emitter layer on the base layer, and a base electrode provided on the surface of the base layer. And an emitter electrode provided on the front surface of the emitter layer and a collector electrode provided on the back surface of the first-conductivity-type collector layer, the base electrode having a trench shape dug in from the surface of the emitter region. A vertical silicon carbide type bipolar transistor characterized by being formed on the surface of a layer. 2. The silicon carbide vertical bipolar transistor according to claim 1, wherein an insulating film is formed on a base electrode provided at the bottom of the trench. 3. A silicon carbide vertical bipolar transistor according to claim 2, wherein the emitter electrode is extended through an insulating film on the base electrode sandwiched between the two emitter layers. 4. The carbonization according to claim 1, further comprising a first conductivity type drift layer between the first conductivity type collector layer and the second conductivity type base layer. Vertical silicon bipolar transistor. 5. A photoresist is applied on the surface of a first conductivity type emitter layer of a silicon carbide substrate in which a first conductivity type collector layer, a second conductivity type base layer and a first conductivity type emitter layer are laminated in this order. After patterning to form a trench penetrating the first conductivity type emitter layer and reaching the second conductivity type base layer, a metal film is deposited to form a base electrode at the bottom of the trench, and the metal of the other part is formed. 5. The method for manufacturing a silicon carbide vertical bipolar transistor according to claim 1, wherein the film is removed by lift-off.