JPH0870024A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE: To easily perform test and manufacture and to reduce cost for the semiconductor device of BGA structure and its manufacturing method. CONSTITUTION: A connection part 26 which is electrically connected to an electrode pad 23 of a semiconductor chip 22 is formed on a resin film 24 and is connected to an external pad 28 and an external terminal 30 via a pattern 27 at the upper portion of a semiconductor from the connection part 26. Also, a test pad 29 which is connected via a pattern 27 extended from the connection part is formed at a test region outside the semiconductor chip of the resin film 24 and at the same time a hole 34 for mounting and feeding carriers is formed.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a BGA (Ball G)
The present invention relates to a semiconductor device having a grid array structure and a manufacturing method thereof.

In recent years, as semiconductor devices have become higher in density, smaller in size and lighter in weight, Q has been reduced due to cost reduction, mounting efficiency, and weight reduction.
Instead of FP (Quad Flat Package), micro (μ) BGA and CSP (Chip Siz)
e Package) has been developed. In such a μBGA or CSP semiconductor device, it is desired that transportation and reliability tests be performed easily and at low cost due to its small shape.

[0003]

2. Description of the Related Art FIG. 10 is a sectional view of a conventional semiconductor device having a μBGA package. 10A is a cross-sectional view and FIG. 10B is a plan view.

A semiconductor device 1 shown in FIGS. 10A and 10B.
In No. 1, a predetermined number of pads 13 are formed on the semiconductor chip 12, and an elastic adhesive 14 is formed on a portion other than the pads 13 of the semiconductor chip 12. A frame portion 16 made of metal or the like for protection or heat dissipation is attached to the peripheral side surface of the semiconductor chip 12 by an adhesive agent 15a, and an adhesive agent 15b is also formed on the frame portion 16.

On the other hand, a copper foil pattern 18 is attached on a resin film 17 such as polyimide (PI), and the pattern 18 is composed of an external pad 18a and a lead 18b extending from the external pad 18a. In addition, the resin film 17
A hole 19 is formed in a portion corresponding to the external pad 18, and a ball electrode 20 of gold or solder that contacts the external pad 18a is formed in the hole 19. For example, the pitch of the ball electrodes 20 is arranged at 0.5 mm.

This resin film 17 is the above-mentioned adhesive 1
It is mounted on 4, 15b. Then, the leads 18 b extending from the pattern 18 and the pads 1 of the semiconductor chip 12 are formed.
3 is connected by fusion or the like, the remaining portion of the lead 18b is cut, and this portion is sealed with a resin 15c such as epoxy. As described above, the semiconductor device 11 has the μBGA including the ball electrode 20 in a size close to the chip size.
It is formed with a package structure.

[0007]

However, the above-mentioned μBG
Due to the small size of the A package semiconductor device 11, jigs such as sockets for reliability testing and transportation have not been established, which makes transportation difficult, and the ball electrode 20 such as a probe is used during testing. It is difficult to position it against the

Therefore, there is a problem that a socket for performing a test or the like, a positioning mechanism and the like are required, resulting in a high cost.

Therefore, the present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device and a manufacturing method thereof for facilitating testing and transportation and reducing cost.

[0010]

In order to solve the above-mentioned problems, in a first aspect of the present invention, a semiconductor chip on which a predetermined number of electrode pads are formed, and a semiconductor chip disposed on the semiconductor chip and electrically connected to the electrode pad are provided. The semiconductor device is configured to include a predetermined number of connecting portions for performing the above, and a bonding substrate on which external terminals connected to the connecting portions via a pattern are formed.

According to a second aspect of the present invention, in the first aspect of the present invention, the bonding substrate has test pads which are connected to the semiconductor chip via a pattern from the connection portion in an outer region of the semiconductor chip, and is cut and removed after the test. A test area is formed.

In claim 3, in claim 1 or 2,
The joint substrate and the semiconductor chip are sealed.

According to a fourth aspect of the present invention, in the first aspect, a protective frame is formed around at least a side portion of the semiconductor chip.

According to a fifth aspect of the present invention, in the fourth aspect, the protective frame is formed of a heat conductive heat dissipation member.

According to a sixth aspect of the present invention, in the first aspect, the joint substrate has a pattern formed on both surfaces by through holes.

In claim 7, in claim 1 or 6,
A bump is interposed between the electrode pad of the semiconductor chip and the connection portion of the bonding substrate.

According to an eighth aspect, in the first, sixth or seventh aspect, an adhesive conductive member is interposed between the electrode pad of the semiconductor chip and the connection portion of the bonding substrate or the bump.

According to a ninth aspect, in the first, sixth or seventh aspect, an anisotropic conductive member is interposed between the electrode pad of the semiconductor chip and the connection portion of the bonding substrate or the bump.

According to a tenth aspect of the present invention, a step of forming a metal foil on the flexible member and forming a hole corresponding to an electrode pad of a semiconductor chip to be connected later, and filling the metal member into the hole to form a connecting portion. A step of forming a bonding board by forming a predetermined pattern extending from the connection portion by a predetermined treatment of the metal foil, and an external terminal, the electrode pad of the semiconductor chip and the bonding board A method of manufacturing a semiconductor device is configured to include a step of electrically connecting the connection portion and integrally performing chip bonding.

According to a tenth aspect, in forming the bonding substrate according to the tenth aspect, the flexible member has an outer region of the semiconductor chip which is cut and removed after a test, and the test is performed in the outer region. , And a predetermined number of holes for carrying in a continuous state or with a carrier mounted.

According to a twelfth aspect, in forming the pattern on the flexible member according to the tenth aspect, a through hole is formed to form the pattern on both surfaces.

According to a thirteenth aspect, in performing the chip bonding according to the tenth aspect, the connection portion and the electrode pad are connected by thermocompression bonding.

According to a fourteenth aspect, in performing the chip bonding according to the tenth aspect, the electrode pad and the hole are aligned with each other, and then the connection portion is formed in the hole for electrical connection.

According to a fifteenth aspect, in performing the chip bonding according to the tenth aspect, a bump is interposed between the connection portion and the electrode pad to perform pressure bonding, or thermosetting to the connection portion or the bump. Forming an electrically conductive conductive member to make electrical connection.

[0025]

As described above, in the inventions of claims 1 to 3, the connection portion, the external terminal, and the test pad and the hole are formed in the outer test area on the semiconductor chip, and the bonding member and the semiconductor chip are appropriately connected. Seal. As a result, a chip-sized package is formed, the test and transportation in the test area are facilitated, and the cost can be reduced.

In the inventions of claims 4 and 5, a heat-dissipating protective frame is formed around at least the side portion of the semiconductor chip. This makes it possible to protect the semiconductor chip and to radiate heat due to heat generation.

According to the sixth aspect of the invention, through holes are formed in the bonded substrate and patterns are formed on both surfaces. This allows
The pattern can be routed and the electrical connection can be improved.

In the inventions of claims 7 to 9, a bump, an adhesive conductive member, or an anisotropic conductive member is interposed between the connection portion and the electrode pad. This makes it possible to ensure the reliability of the electrical connection between the connection portion and the electrode pad.

In the tenth aspect of the present invention, after forming the metal foil on the flexible member forming the bonded substrate, forming a hole, forming a connection portion in the hole, and forming a pattern and an external terminal by a predetermined process. Then, the connection portion and the electrode pad are electrically connected to perform chip bonding. As a result, it becomes possible to manufacture a semiconductor device having good testability and transportability at low cost.

In the eleventh aspect of the present invention, the test pad and the hole are formed in the outer region on the flexible member, and the test pad and the hole are cut and removed after the test. This makes it possible to easily carry out the test and the transportation.

According to the twelfth aspect of the present invention, through holes are formed in the flexible member to form patterns on both surfaces. This makes it easy to route the pattern and improve the electrical characteristics.

In the thirteenth to fifteenth inventions, the connection between the connection portion and the electrode pad is thermocompression-bonded, or after the formed hole and the electrode pad are aligned with each other, the connection portion is formed in the hole, or to the connection portion. Of bumps and thermosetting conductive member are formed. This makes it possible to ensure the reliability of the electrical connection between the connection portion and the electrode pad.

[0033]

FIG. 1 is a block diagram of the first embodiment of the present invention. 1A is a cross-sectional view and FIG. 1B is a plan view.

A semiconductor device 21 shown in FIGS. 1A and 1B.
_A is a predetermined number of electrode pads 23 on the semiconductor chip 22.
Are formed.

On the other hand, a hole 25 is formed corresponding to the electrode pad 23 of the semiconductor chip 22 in the resin film 24 of the flexible member as a bonding substrate which is made of PI or the like and is larger than the semiconductor chip 22. A connection portion 26 filled with a metal conductive member by plating, for example, is provided in the hole 25.

As a result, the lead (18b) is not cut when joining the semiconductor chip (12) and the lead (18b) of the copper foil pattern (18) unlike the conventional case,
The semiconductor chip 22 and the pattern 27 can be connected to each other in a state in which a region required for the test and the conveyance extending outward with respect to the semiconductor chip 22 is electrically held.

On one surface of the resin film 24, a pattern 27 having a connection portion (metal conductive member) 26 as a connection point is formed and attached by, for example, a copper foil. Pattern 27
Are extended from the connection portion 26 to the inside of the region of the semiconductor chip 22 and connected to the external pads 28, respectively, and are extended to the outside and connected to the test pads 29, respectively.
An external terminal 30 is formed on the external pad 28 by gold or solder.
Is formed.

Bumps 31 made of solder or the like are formed on the surface of the connecting portion 26 opposite to the surface on which the pattern is formed.

Then, the electrode pad 2 of the semiconductor chip 22
The bumps 31 of the resin film 24 are brought into contact with and superposed on the surface 3 of the resin film 3 and fixed by a thermosetting resin 32. A resist 33 for protection is formed on the pattern 27 extending from the connection portion 26 to the external pad 28.

A hole 34 for installing a carrier or a reel-shaped carrier, which will be described later, is formed on two opposing sides of the resin film 24, and a cutting hole 35 is formed around the outside of the connecting portion 26. There is.

Further, a pseudo external terminal 36 is formed, for example, for heat dissipation in the inner center portion of the predetermined number of external terminals 30 formed on the resin film 24.

Here, FIG. 2 shows a manufacturing explanatory view of FIG. In FIG. 2, a copper foil is formed on the entire surface of the polyimide (PI) film that will be the resin film 24 (step (S) 1), and holes 25 are formed in the corresponding positions of the electrode pads 23 of the semiconductor chip 22 by etching. (S
2). A metal member such as copper, nickel, or gold is deposited in each of the holes 25 by plating to form the connection portion 26 (S3).

Subsequently, the copper foil formed on the PI film 24 is etched to form a pattern 27, and
An external pad 28 and a test pad 29 are formed (S
4). The external terminals 30 are formed on the external pads 28 by gold or solder, and the bumps 31 are formed on the opposite side of the connection portion 26 from the pattern formation (S5).

Further, the resist 33 is applied to the pattern 27 (including the connecting portion 26) formed on the semiconductor chip 22 (S6).

Then, the resin film 24 is used as a semiconductor chip.
The bumps 31 and the electrode pads 23 are brought into contact with
Chip bonding is performed by the grease 32, and the semiconductor device
21 _AAre formed (S7).

Therefore, FIG. 3 shows a plan view of the semiconductor device of FIG. 1 when it is set in the carrier. 3, the carrier 41, the base portion 42 concave enclosing the semiconductor device 21 _A, with the pressing claw 43 is pressing member for pressing the semiconductor device 21 _A is provided a predetermined number, are formed in the resin film 24 Projection 4 that fits in the hole 34
4 are formed by being appropriately arranged at predetermined positions.

A predetermined number of notches 45 for positioning the carrier are formed at predetermined positions on the sides of the base portion 42.

That is, the semiconductor device 21 _A is set in the base portion 42 by fitting the protrusions 44 and the corresponding holes 34 therein, and the resin film 24 is pressed and fixed by the pressing claws 43. In this state, the carrier 41 is transported and positioned by the notch 45 of the carrier 41 during the reliability test.

As described above, the carrier 41 facilitates the handling of transportation, the carrier 41 is positioned during the test, and the test pad 2 is provided on the outer peripheral side of the resin film 24.
9 is formed and can be easily probed,
A reliability test can be performed. This does not require a mechanism or the like for carrying and testing, which leads to cost reduction.

Further, when carrying without using the carrier 41, the semiconductor device 21 _{A is formed} into a continuous reel,
Further, it can be easily transported through the hole 34.

Subsequently, FIG. 4 shows a sectional view of the semiconductor device after the test. In FIG. 4A, when the reliability test is completed in the state shown in FIG. 3, the test pad 2 is cut from the outside of the connecting portion 26 through the cutting hole 35 of the resin film 24.
By removing 9 and the like, the semiconductor device 21 _A of the CSP package is configured.

Then, as shown in FIG. 4B, a protective frame 4 made of, for example, aluminum having a good heat dissipation property is provided around at least the side surface of the semiconductor chip 22 (the rear surface may be included).
6 are provided. The protective frame 46 can protect the semiconductor chip 22 and the like and improve the heat dissipation.

Although the case where the protective frame 46 is provided after the test pad 29 and the like are cut and removed has been described with reference to FIG. 4, the test pad 29 and the like may be cut and removed after the protective frame 46 is provided.

Next, FIG. 5 shows a block diagram of a second embodiment of the present invention. 5A is a cross-sectional view and FIG. 5B is a partially enlarged view. The semiconductor device 21 _B shown in FIGS.
Is a resin film 24 instead of the resin 32 of the first embodiment.
An anisotropic conductive sheet 51, which is an anisotropic conductive member, is interposed between the semiconductor chip 22 and the semiconductor chip 22.

The anisotropic conductive sheet 51 is made by dispersing conductive particles (Au, Ag, Ni, solder, etc.) in a resin film, for example, and is pressed in the direction of the arrow in FIG. 5 (B). As a result, the compressed portion becomes conductive, and the bump 31 (connecting portion 26) and the electrode pad 2 of the semiconductor chip 22 are formed.
It is for electrical connection with 3.

According to this, the electrical connection can be surely made at a low cost.

Next, FIG. 6 shows a partial sectional view of a third embodiment of the present invention. The semiconductor device 21 _C shown in FIG.
The bumps 31 formed on the connecting portion 26 are omitted, and the connecting portion 26
And the electrode pad 23 of the semiconductor chip 22 are directly adhered.

That is, as shown in FIG. 6B, the connection portion 26 and the electrode pad 23 are brought into contact with each other, and ultrasonic thermocompression bonding is performed by the wedge tool 52 to perform single bonding.

According to this, the formation of the bump 31 is omitted as described above, and the number of steps and the cost can be reduced.

The resin film 24 and the semiconductor chip 2
An appropriate resin (see FIG. 1) is sealed between the two.

Next, FIG. 7 shows a partial sectional view of a fourth embodiment of the present invention. The semiconductor device 21 _D shown in FIG.
Through holes 5 are formed in the resin film 24 in the third embodiment.
3 is formed, and the semiconductor chip 22 of the resin film 24 is formed.
The pattern 27a is formed on the side surface.

Chip bonding in this case is shown in FIG.
Similar to (B), the connection part 26 and the electrode pad 23 are subjected to ultrasonic thermocompression bonding with a wedge tool.

According to this, it becomes easy to draw the pattern (lead) on the resin film 24, and at the same time,
One side can be used as a power source or a ground layer, and the electrical characteristics of noise resistance can be improved.

Next, FIG. 8 shows a partial sectional view of a fifth embodiment of the present invention. A semiconductor device 2 shown in FIGS. 8A and 8B.
_1E shows another manufacturing method in the manufacturing method of the first embodiment.

As shown in FIG. 8A, the resin film 2
After forming the hole 25, the pattern 27, the external pad 28, and the external terminal 30 in 4, the hole 25 and the electrode pad 23 of the semiconductor chip 22 are aligned. And FIG. 8 (B)
As shown in FIG. 5, the connection portion 26 is formed by burying the metal such as copper in the hole 25.

According to this, the formation of the bump 31 can be omitted, and the electrical connection between the connecting portion 26 and the electrode pad 23 can be ensured.

Next, FIG. 9 shows a partial sectional view of a sixth embodiment of the present invention. Semiconductor device 2 shown in FIGS. 9A and 9B
1 _F is the connecting portion 26 and the electrode pad 2 of the semiconductor chip 22.
3 shows a case in which the electrical connection with 3 is performed using a conductive paste 54 which is a thermosetting conductive member.

That is, as shown in FIG. 9A, the conductive paste 54 is applied to the surfaces of the bumps 31 formed on the connection portions 26, and the bumps 31 and the electrode pads 23 are applied as shown in FIG. 9B. After the and are aligned, they are heated to heat-set the conductive paste 54.

According to this, the connection portion 26 (bump 31)
The electrical connection between the electrode pad 23 and the electrode pad 23 can be ensured.

[0070]

As described above, according to the inventions of claims 1 to 3, the connection portion, the external terminal, and the test pad and the hole are formed in the outer test area on the semiconductor chip, and the joining member and the semiconductor chip are appropriately formed. By encapsulating between and, the chip size package is formed, the test and transportation in the test area are facilitated, and the cost can be reduced.

According to the fourth and fifth aspects of the present invention, by forming the heat radiation protective frame around at least the side portion of the semiconductor chip, it is possible to protect the semiconductor chip and to radiate heat by heat generation.

According to the sixth aspect of the present invention, the through holes are formed in the bonded substrate and the patterns are formed on both surfaces, whereby the pattern can be routed and the electrical characteristics can be improved.

According to the present invention, the bumps, the adhesive conductive member, or the anisotropic conductive member are interposed between the connecting portion and the electrode pad, whereby the connecting portion and the electrode pad are connected. The reliability of the electrical connection can be ensured.

According to the tenth aspect of the present invention, the metal foil is formed on the flexible member forming the bonded substrate and then the hole is formed to form the connection portion in the hole. By forming the, and electrically connecting the connection portion and the electrode pad and performing chip bonding, a semiconductor device having good testability and transportability can be manufactured at low cost.

According to the invention of claim 11, the test pad and the hole are formed in the outer region on the flexible member, and the test pad and the hole are cut and removed after the test, so that the test and the transportation can be easily performed.

According to the twelfth aspect of the invention, the through holes are formed in the flexible member and the patterns are formed on both sides, whereby the pattern can be easily routed and the electrical characteristics can be improved.

According to the thirteenth to fifteenth inventions, the connection between the connection portion and the electrode pad is thermocompression bonded, or the connection portion is formed in the hole after the formed hole and the electrode pad are aligned with each other, or the connection is established. By forming a bump on the portion and a thermosetting conductive member, the reliability of the electrical connection between the connection portion and the electrode pad can be ensured.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a first embodiment of the present invention.

FIG. 2 is a manufacturing explanatory view of FIG. 1.

FIG. 3 is a plan view of the semiconductor device of FIG. 1 when set in a carrier.

FIG. 4 is a cross-sectional view of the semiconductor device after the test.

FIG. 5 is a configuration diagram of a second embodiment of the present invention.

FIG. 6 is a configuration diagram of a third embodiment of the present invention.

FIG. 7 is a configuration diagram of a fourth embodiment of the present invention.

FIG. 8 is a configuration diagram of a fifth embodiment of the present invention.

FIG. 9 is a configuration diagram of a sixth embodiment of the present invention.

FIG. 10 is a cross-sectional view of a conventional μBGA package semiconductor device.

[Explanation of symbols]

21 _{A to} 21 _F Semiconductor device 22 Semiconductor chip 23 Electrode pad 24 Resin film 25 Hole 26 Connection part 27, 27a pattern 28 External pad 29 Test pad 30 External terminal 31 Bump 32 Resin 33 Resist 34 Hole 41 Carrier 42 Base part 43 Holding claw 44 Projection 46 Protective Frame 51 Anisotropic Conductive Sheet 53 Through Hole 54 Conductive Paste

Claims (15)

[Claims] 1. A semiconductor chip having a predetermined number of electrode pads formed thereon, a predetermined number of connecting portions arranged on the semiconductor chip and electrically connected to the electrode pads, and a pattern formed by the connecting portions. And a bonding substrate on which external terminals connected to each other are formed. 2. The bonding substrate has test pads, which are connected to each other via a pattern from the connecting portion, are formed in an outer region of the semiconductor chip, and a test region which is cut and removed after the test is formed. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device. 3. The semiconductor device according to claim 1, wherein the semiconductor substrate is sealed between the bonding substrate and the semiconductor chip. 4. The semiconductor device according to claim 1, wherein a protective frame is formed around at least a side portion of the semiconductor chip. 5. The semiconductor device according to claim 4, wherein the protective frame is formed of a heat conductive heat dissipation member. 6. The semiconductor device according to claim 1, wherein the joint substrate has a pattern formed on both sides by through holes. 7. The semiconductor device according to claim 1, wherein a bump is interposed between the electrode pad of the semiconductor chip and the connection portion of the bonding substrate. 8. The adhesive conductive member is interposed between the electrode pad of the semiconductor chip and the connection portion of the bonding substrate or the bump, according to claim 1, 6, or 7. The semiconductor device according to any one of claims. 9. An anisotropic conductive member is interposed between an electrode pad of the semiconductor chip and a connection portion of the bonding substrate or the bump, and the anisotropic conductive member is interposed between the electrode pad and the bump. The semiconductor device according to claim 1. 10. A step of forming a metal foil on a flexible member and forming a hole corresponding to an electrode pad of a semiconductor chip to be connected later, and filling the hole with a metal member to form a connection portion. A step, a step of forming a bonding substrate by forming a predetermined pattern extending the metal foil from the connection portion by a predetermined process, and an external terminal, and a connection portion of the electrode pad of the semiconductor chip and the bonding substrate A step of electrically connecting and integrally performing chip bonding, and a method of manufacturing a semiconductor device. 11. In forming the bonding substrate, the flexible member has an external region of the semiconductor chip that is cut and removed after a test, a pad for performing a test in the external region, and a continuous state or 11. A predetermined number of holes for carrying and carrying a carrier are formed.
The manufacturing method of the semiconductor device described in the above. 12. The method of manufacturing a semiconductor device according to claim 10, wherein in forming the pattern on the flexible member, a through hole is formed to form the pattern on both surfaces. 13. The method of manufacturing a semiconductor device according to claim 10, wherein in performing the chip bonding, the connection portion and the electrode pad are connected by thermocompression bonding. 14. The method according to claim 10, wherein when the chip bonding is performed, the electrode pad and the hole are aligned with each other, and then the connection portion is formed in the hole for electrical connection. Manufacturing method of semiconductor device. 15. In performing the chip bonding, a bump is interposed between the connecting portion and the electrode pad to perform pressure bonding, or a thermosetting conductive member is formed on the connecting portion or the bump. 11. The method for manufacturing a semiconductor device according to claim 10, wherein the electrical connection is made by electrical connection.