JPH0864866A - Manufacture of semiconductor light emitting device - Google Patents

Manufacture of semiconductor light emitting device

Info

Publication number
JPH0864866A
JPH0864866A JP19685194A JP19685194A JPH0864866A JP H0864866 A JPH0864866 A JP H0864866A JP 19685194 A JP19685194 A JP 19685194A JP 19685194 A JP19685194 A JP 19685194A JP H0864866 A JPH0864866 A JP H0864866A
Authority
JP
Japan
Prior art keywords
compound semiconductor
gallium nitride
layer
semiconductor layer
protective film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19685194A
Other languages
Japanese (ja)
Other versions
JP3325713B2 (en
Inventor
Yukio Shakuda
幸男 尺田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP19685194A priority Critical patent/JP3325713B2/en
Priority to US08/509,231 priority patent/US5814533A/en
Publication of JPH0864866A publication Critical patent/JPH0864866A/en
Application granted granted Critical
Publication of JP3325713B2 publication Critical patent/JP3325713B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE: To provide a method for manufacturing a semiconductor light emitting device by which crystal defects and the dislocation caused by mismatching of lattice constants and a difference in a thermal expansion coefficient can be prevented and thereby the number of processes can be decreased. CONSTITUTION: A gallium nitride compound semiconductor layer which includes at least n-type layers 3, 4 and p-type layers 6, 7 and a light emitting section (active layer) 5 is deposited on a substrate 1. After that, an atmosphere is made into an N atmosphere and an ambient temperature is reduced to temperatures at which a GaAs compound semiconductor can be formed by vapor phase epitaxy and the n-type layers of the gallium nitride compound semiconductor layer can be annealed. Then, in the N atmosphere, an Mg-doped GaAs, GaP, InAs, or InP protective film 10 is formed on the surface of the gallium nitride compound semiconductor layer and at the same time, the p-type layers of the gallium nitride compound semiconductor layer are annealed and after that the protective film is removed by etching.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体発光素子の製法に
関する。さらに詳しくは、青色発光に好適なチッ化ガリ
ウム系化合物半導体を用いた半導体発光素子の製法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor light emitting device. More specifically, it relates to a method for manufacturing a semiconductor light emitting device using a gallium nitride based compound semiconductor suitable for blue light emission.

【0002】ここにチッ化ガリウム系化合物半導体と
は、III 族元素のGaとV族元素のNとの化合物または
III 族元素のGaの一部がAl、Inなど他のIII 族元
素と置換したものおよび/またはV族元素のNの一部が
P、Asなど他のV族元素と置換した化合物からなる半
導体をいう。
Here, a gallium nitride compound semiconductor is a compound of a group III element Ga and a group V element N or
A semiconductor made of a compound in which a part of Ga of the group III element is replaced with another group III element such as Al and In and / or a part of N of the group V element is replaced with another group V element such as P and As. Say.

【0003】また、半導体発光素子とは、pn接合また
はpinなどダブルヘテロ接合を有する発光ダイオード
(以下、LEDという)、スーパルミネッセントダイオ
ード(SLD)または半導体レーザダイオード(LD)
などの光を発生する半導体素子をいう。
A semiconductor light emitting device is a light emitting diode (hereinafter referred to as LED) having a double heterojunction such as a pn junction or a pin, a super luminescent diode (SLD) or a semiconductor laser diode (LD).
A semiconductor element that emits light.

【0004】[0004]

【従来の技術】従来青色のLEDは赤色や緑色に比べて
輝度が小さく実用化に難点があったが、近年チッ化ガリ
ウム系化合物半導体を用い、Mgをドーパントした低抵
抗のp型半導体層がえられたことにより、輝度が向上し
脚光をあびている。
2. Description of the Related Art Conventionally, blue LEDs have a lower brightness than red and green and are difficult to put into practical use. In recent years, however, gallium nitride compound semiconductors have been used, and a low resistance p-type semiconductor layer doped with Mg has been formed. As a result, the brightness is improved and it is in the limelight.

【0005】従来のチッ化ガリウム系化合物半導体のL
EDの製法はつぎに示されるような工程で行われ、その
完成したチッ化ガリウム系化合物半導体LEDの斜視図
を図2に示す。
L of a conventional gallium nitride-based compound semiconductor
The manufacturing method of the ED is performed in the following steps, and a perspective view of the completed gallium nitride based compound semiconductor LED is shown in FIG.

【0006】まず、サファイア(Al2 3 単結晶)な
どからなる基板21に400〜700℃の低温で有機金
属化合物気相成長法(以下、MOCVD法という)によ
りキャリアガスH2 とともに有機金属化合物ガスである
トリメチルガリウム(以下、TMGという)、アンモニ
ア(NH3 )およびドーパントとしてのSiH4 などを
供給し、n型のGaN層からなる低温バッファ層22を
0.01〜0.2μm程度形成し、ついで700〜12
00℃の高温で同じガスを供給し同じ組成のn型のGa
Nからなる高温バッファ層23を2〜5μm程度形成す
る。
First, a substrate 21 made of sapphire (Al 2 O 3 single crystal) or the like is used at a low temperature of 400 to 700 ° C. at a low temperature of 400 to 700 ° C. with a carrier gas H 2 together with a carrier gas H 2 by an organometallic compound vapor phase growth method (hereinafter referred to as MOCVD method). Trimethylgallium (hereinafter referred to as TMG) which is a gas, ammonia (NH 3 ) and SiH 4 as a dopant are supplied to form a low temperature buffer layer 22 composed of an n-type GaN layer in a thickness of about 0.01 to 0.2 μm. , Then 700-12
The same gas is supplied at a high temperature of 00 ° C, and n-type Ga of the same composition is supplied.
The high temperature buffer layer 23 made of N is formed in a thickness of about 2 to 5 μm.

【0007】ついで前述のガスにさらにトリメチルアル
ミニウム(以下、TMAという)の原料ガスを加え、n
型ドーパントのSiを含有したn型Alx Ga1-x
(0<x<1)層を成膜し、ダブルヘテロ接合形成のた
めのn型クラッド層24を0.1〜0.3μm程度形成
する。
Then, a raw material gas of trimethylaluminum (hereinafter referred to as TMA) is further added to the above gas, and n
N - type Al x Ga 1-x N containing Si as a type dopant
A (0 <x <1) layer is formed, and an n-type cladding layer 24 for forming a double heterojunction is formed to have a thickness of about 0.1 to 0.3 μm.

【0008】つぎに、バンドギャップエネルギーがクラ
ッド層のそれより小さくなる材料、たとえば前述の原料
ガスのTMAに代えてトリメチルインジウム(以下、T
MIという)を導入し、Gay In1-y N(0<y≦
1)からなる活性層25を0.05〜0.1μm程度形
成する。
Next, a material having a bandgap energy smaller than that of the clad layer, for example, trimethylindium (hereinafter, T
MI) is introduced, and Ga y In 1-y N (0 <y ≦
The active layer 25 composed of 1) is formed to a thickness of about 0.05 to 0.1 μm.

【0009】さらに、n型クラッド層24の形成に用い
たガスと同じ原料のガスで不純物原料ガスをSiH4
代えてp型不純物としてのMgまたはZnのためのシク
ロペンタジエニルマグネシウム(以下、Cp2 Mgとい
う)またはジメチル亜鉛(以下、DMZnという)を加
えて反応管に導入し、p型クラッド層26であるp型A
x Ga1-x N層を気相成長させる。これによりn型ク
ラッド層24と活性層25とp型クラッド層26とによ
りダブルヘテロ接合が形成される。
Further, cyclopentadienylmagnesium for Mg or Zn as a p-type impurity (hereinafter, referred to as a p-type impurity by replacing SiH 4 as an impurity source gas with the same source gas as the gas used for forming the n-type cladding layer 24). Cp 2 Mg) or dimethylzinc (hereinafter referred to as DMZn) is added to the reaction tube, and the p-type cladding layer 26 of p-type A
The l x Ga 1-x N layer is vapor-grown. As a result, the n-type cladding layer 24, the active layer 25, and the p-type cladding layer 26 form a double heterojunction.

【0010】ついでキャップ層27形成のため、前述の
バッファ層23と同様のガスで不純物原料ガスとしてC
2 MgまたはDMZnを供給してp型のGaN層を
0.1〜2μm程度成長させる。
Next, to form the cap layer 27, a gas similar to that used for the buffer layer 23 is used as an impurity source gas, ie, C.
By supplying p 2 Mg or DMZn, a p-type GaN layer is grown to about 0.1 to 2 μm.

【0011】そののちSiO2 やSi3 4 などの保護
膜を半導体層の成長層表面全面に設け、400〜800
℃、20〜60分間程度のアニールを行い、p型クラッ
ド層26およびキャップ層27の活性化を図る。このア
ニールが行われるのはつぎの理由による。すなわち、チ
ッ化ガリウム系化合物半導体のp型層はドーパントとし
てMgなどがドーピングされているが、Mgなどはドー
ピングの際、キャリアガスのH2 や反応ガスのNH3
Hと化合し、ドーパントの働きをせず高抵抗になる。そ
こでMgとHを切り離しHを放出して低抵抗化するた
め、アニール工程が設けられている。
After that, a protective film such as SiO 2 or Si 3 N 4 is provided on the entire surface of the growth layer of the semiconductor layer, and 400 to 800
The p-type cladding layer 26 and the cap layer 27 are activated by annealing at 20 ° C. for 20 to 60 minutes. The reason why this annealing is performed is as follows. That is, the p-type layer of the gallium nitride based compound semiconductor is doped with Mg or the like as a dopant, but Mg or the like is mixed with H 2 of the carrier gas or H of NH 3 of the reaction gas at the time of doping to change the dopant High resistance without working. Therefore, an annealing process is provided to separate Mg from H and release H to reduce the resistance.

【0012】ついで、保護膜を除去したのち、n側の電
極を形成するため、レジストを塗布してパターニングを
行い、成長した各半導体層の一部をドライエッチングに
より除去してn型GaN層であるバッファ層23を露出
させる。ついで、Au、Alなどの金属膜をスパッタリ
ングなどにより形成してp側およびn側の両電極29、
30を形成し、ダイシングすることによりLEDチップ
を形成している。
After removing the protective film, a resist is applied and patterned to form an n-side electrode, and a part of each grown semiconductor layer is removed by dry etching to form an n-type GaN layer. A certain buffer layer 23 is exposed. Then, a metal film of Au, Al or the like is formed by sputtering or the like to form both p-side and n-side electrodes 29,
The LED chip is formed by forming 30 and dicing.

【0013】つぎに、電極金属のAlなどとチッ化ガリ
ウム系化合物半導体とのあいだをオーミック接触にする
ため、H2 雰囲気中で300℃程度の熱処理をして合金
化する。
Next, in order to make ohmic contact between the electrode metal such as Al and the gallium nitride based compound semiconductor, heat treatment is performed at about 300 ° C. in an H 2 atmosphere to form an alloy.

【0014】[0014]

【発明が解決しようとする課題】従来のチッ化ガリウム
系化合物半導体を用いた半導体発光素子の製法では、前
述のように、SiO2 などの保護膜を半導体層の表面に
設けたのちにアニールを行うが、SiO2 などの保護膜
形成はMOCVD装置とは異なるCVD装置により行わ
れるため、MOCVDを行った後に一旦温度を室温まで
下げてからCVD装置に入れ替え、再度300℃程度ま
で昇温しなければならない。しかもサファイア基板とチ
ッ化ガリウム系化合物半導体結晶とでは、格子定数や熱
膨張係数の差がともに大きく、高温にして室温に戻す温
度衝撃を繰り返すと、膨張と縮小が繰り返され、サファ
イア基板と接するバッファ層にクラックなどの結晶欠陥
や転位などが発生し、その結晶欠陥や転位が発光層側に
進展し発光効率が低下するとともに、寿命も低下すると
いう問題がある。
In the conventional method for manufacturing a semiconductor light emitting device using a gallium nitride-based compound semiconductor, as described above, after providing a protective film such as SiO 2 on the surface of the semiconductor layer, annealing is performed. However, since a protective film such as SiO 2 is formed by a CVD device different from the MOCVD device, the temperature must be temporarily lowered to room temperature after MOCVD, then replaced by the CVD device, and the temperature must be raised to about 300 ° C again. I have to. Moreover, the sapphire substrate and the gallium nitride-based compound semiconductor crystal have large differences in lattice constant and thermal expansion coefficient, and when temperature shocks are repeated at high temperature to return to room temperature, expansion and contraction are repeated, and the buffer in contact with the sapphire substrate is repeated. There is a problem that crystal defects such as cracks and dislocations are generated in the layer, and the crystal defects and dislocations propagate to the light emitting layer side to reduce the luminous efficiency and also reduce the life.

【0015】本発明はこのような問題を解決し、格子定
数の不整合および熱膨張係数の差に基づく結晶欠陥や転
位の発生を抑制するとともに、製造工程を短縮すること
ができる半導体発光素子の製法を提供することを目的と
する。
The present invention solves such a problem, suppresses the generation of crystal defects and dislocations due to the mismatch of lattice constants and the difference in thermal expansion coefficient, and can shorten the manufacturing process. The purpose is to provide a manufacturing method.

【0016】[0016]

【課題を解決するための手段】本発明の半導体発光素子
の製法は、(a)基板上に少なくともn型層とp型層を
有し、発光部を形成するチッ化ガリウム系化合物半導体
層を有機金属化合物気相成長法により積層し、(b)該
チッ化ガリウム系化合物半導体層を積層後チッ素ガス雰
囲気にするとともに周囲温度を、GaAs化合物を気相
成長することができ、かつ、前記チッ化ガリウム系化合
物半導体のp型層をアニールすることができる温度まで
下げ、(c)前記チッ化ガリウム系化合物半導体層の表
面にMgがそれぞれドーピングされたGaAs、Ga
P、InAs、InPおよびこれらのIII 族元素の一部
がAlと置換したものよりなる群から選ばれた少なくと
も1種を前記チッ素雰囲気中で保護膜として成膜し、
(d)前記保護膜の成膜とともに前記チッ化ガリウム系
化合物半導体層のp型層をアニールし、アニール完了後
室温まで下げて前記保護膜をエッチング除去することを
特徴とする。
According to the method of manufacturing a semiconductor light emitting device of the present invention, (a) a gallium nitride compound semiconductor layer having at least an n-type layer and a p-type layer on a substrate and forming a light emitting portion is formed. (B) after stacking the gallium nitride based compound semiconductor layer on the gallium nitride-based compound semiconductor layer, a GaAs compound can be vapor-grown at an ambient temperature and a nitrogen gas atmosphere. The temperature is lowered to a temperature at which the p-type layer of gallium nitride based compound semiconductor can be annealed, and (c) GaAs or Ga in which the surface of the gallium nitride based compound semiconductor layer is doped with Mg, respectively.
At least one selected from the group consisting of P, InAs, InP and those in which a part of these Group III elements is replaced with Al is formed as a protective film in the nitrogen atmosphere,
(D) The p-type layer of the gallium nitride based compound semiconductor layer is annealed together with the formation of the protective film, and after the annealing is completed, the temperature is lowered to room temperature and the protective film is removed by etching.

【0017】ここに発光部とは、ダブルヘテロ接合の活
性層や、pn接合の電子と正孔が結合して光を発生する
部分を意味する。
Here, the light emitting portion means a double heterojunction active layer or a portion of a pn junction where electrons and holes are combined to generate light.

【0018】前記保護膜の成膜の時間をアニール時間と
合わせて0.1〜2μmの厚さに成膜されるように原料
ガスを導入することが、アニールをしているあいだ中雰
囲気ガスにN2 のみならず、GaなどIII 族やV族の原
料がガスとして存在し、チッ化ガリウム系化合物半導体
からのGaやNの蒸発を抑制できるので好ましい。
Introducing the source gas so as to form a film having a thickness of 0.1 to 2 .mu.m, including the time for forming the protective film and the annealing time, makes it possible to change the atmosphere gas during the annealing. Not only N 2 but also a Group III or V group material such as Ga exists as a gas, and it is preferable because evaporation of Ga and N from the gallium nitride based compound semiconductor can be suppressed.

【0019】[0019]

【作用】本発明の半導体発光素子の製法によれば、MO
CVD工程でチッ化ガリウム系化合物半導体層を積層し
たのちに、ただちにチッ素ガス雰囲気にして700℃程
度まで温度を下げ、Mgをドーピングしたヒ化ガリウム
系の化合物半導体層を保護膜として成膜しながらアニー
ルを行うため、チッ化ガリウム系化合物半導体層の表面
にGaやAsなどのIII 族およびV族の元素の化合物が
被膜され、しかもN2 のほかIII 族やV族の元素が有機
化合物として雰囲気に存在するため、有効なマスクとし
て働き、チッ化ガリウム系化合物半導体層からGaやN
などを逃がすことなくアニールを行うことができる。そ
のため、MOCVD後保護膜を成膜するCVD工程を必
要とせず、熱処理工程がMOCVDのみの1回ですむ。
その結果、温度変化の繰返しがなく、熱衝撃が加わらな
いため、結晶欠陥や転位が発生しにくく、発光効率が向
上するとともに信頼性も向上する。
According to the method of manufacturing the semiconductor light emitting device of the present invention, the MO
After stacking the gallium arsenide-based compound semiconductor layer in the CVD process, immediately in a nitrogen gas atmosphere, the temperature is lowered to about 700 ° C., and a gallium arsenide-based compound semiconductor layer doped with Mg is formed as a protective film. However, since annealing is performed, compounds of group III and V elements such as Ga and As are coated on the surface of the gallium nitride based compound semiconductor layer, and in addition to N 2 , elements of group III and group V are used as organic compounds. Since it exists in the atmosphere, it functions as an effective mask, and Ga or N is removed from the gallium nitride compound semiconductor layer.
Annealing can be performed without letting go of the above. Therefore, a CVD process for forming a protective film after MOCVD is not required, and the heat treatment process only needs to be performed once by MOCVD.
As a result, there is no repeated temperature change and no thermal shock is applied, so that crystal defects and dislocations are less likely to occur, and the luminous efficiency is improved and the reliability is also improved.

【0020】[0020]

【実施例】つぎに添付図面を参照しながら本発明の半導
体発光素子の製法を説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a semiconductor light emitting device of the present invention will be described below with reference to the accompanying drawings.

【0021】図1〜図2は本発明の半導体発光素子の製
法の一実施例の工程断面説明図である。
1 to 2 are process cross-sectional explanatory views of an embodiment of a method for manufacturing a semiconductor light emitting device according to the present invention.

【0022】まず、図1(a)に示されるように、サフ
ァイアなどからなる基板1に、MOCVD法によりたと
えばn型GaNなどのチッ化ガリウム系化合物半導体層
からなる低温バッファ層2を400〜700℃で、高温
バッファ層3を700〜1200℃でそれぞれ0.01
〜0.2μm、2〜5μm程度づつ成長する。そのの
ち、n型クラッド層4、ノンドープまたはn型もしくは
p型の活性層5、p型クラッド層6、キャップ層7を順
次積層する。クラッド層4、6は通常0.1〜0.3μ
m程度、活性層5は0.05〜0.1μm程度の厚さに
それぞれ形成する。これらのチッ化ガリウム系化合物半
導体層の成膜は従来技術で説明したのと同様の原料ガス
を導入し、反応させて成長する。
First, as shown in FIG. 1A, a low-temperature buffer layer 2 made of a gallium nitride-based compound semiconductor layer such as n-type GaN is formed on a substrate 1 made of sapphire or the like by MOCVD to 400 to 700. ℃, the high temperature buffer layer 3 at 700 ~ 1200 ℃ 0.01
The growth is about 0.2 μm and about 2 to 5 μm. After that, the n-type cladding layer 4, the non-doped or n-type or p-type active layer 5, the p-type cladding layer 6, and the cap layer 7 are sequentially laminated. The clad layers 4 and 6 are usually 0.1 to 0.3 μ
m, and the active layer 5 is formed to a thickness of about 0.05 to 0.1 μm. The film formation of these gallium nitride based compound semiconductor layers is performed by introducing the same source gas as described in the prior art and reacting to grow.

【0023】前述のクラッド層4をn型に形成するため
には、Si、Ge、SnをSiH4、GeH4 、SnH
4 などのガスとして反応ガス内に混入し、クラッド層6
をp型に形成するためにはMgやZnをCp2 MgやD
MZnの有機金属ガスとして原料ガスに混入する。キャ
ップ層7は電極金属とのオーミック接触のためのもの
で、p型GaNなどからなり、0.2μm以上の厚さに
成膜される。
In order to form the above-mentioned cladding layer 4 into an n type, Si, Ge and Sn are replaced with SiH 4 , GeH 4 and SnH.
The gas such as 4 is mixed into the reaction gas and the cladding layer 6
In order to form p-type, Mg and Zn are replaced by Cp 2 Mg and D
It is mixed in the raw material gas as an organometallic gas of MZn. The cap layer 7 is for ohmic contact with the electrode metal, is made of p-type GaN, etc., and is formed to a thickness of 0.2 μm or more.

【0024】チッ化ガリウム系化合物半導体層を積層
後、チッ素ガス雰囲気中にするとともに、周囲温度をG
aAs化合物を気相成長することができ、かつ、前記チ
ッ化ガリウム系化合物半導体層のp型層をアニールする
ことができる温度、550〜800℃程度まで下げる。
ここでチッ素ガス雰囲気にするのは、GaN層中のNを
外に逃げにくくするためである。また、Gaも逃げる可
能性があるために、たとえばGaAs、GaP、InA
s、InPまたはこれらの化合物のIII 族元素の一部も
しくは全部がAlと置換したものなどからなる保護膜1
0をMOCVD法により0.1〜2μm程度成膜する
(図1(b)参照)。保護膜10の成膜とともに前記チ
ッ化ガリウム系化合物半導体層のp型層をアニールし、
ドーパントのMgと化合しているHを切り離して外部に
放出し、p型層を低抵抗化する。保護膜10の成膜後さ
らにN2 雰囲気下の同温度でアニールを続けてもよい
が、保護膜10の成膜時間とアニール時間が同じ30〜
60分程度で0.1〜2μm程度の保護膜が成膜するよ
うに反応ガスの流量を調整すれば、アニールをしている
あいだに、雰囲気ガスにIII 族およびV族の元素の有機
ガスが存在することになり、チッ化ガリウム系化合物半
導体層からいずれの組成の元素も逃げにくくなるため好
ましい。
After stacking the gallium nitride-based compound semiconductor layer, the atmosphere is set to G and the ambient temperature is set to G.
The temperature at which the aAs compound can be vapor-grown and the p-type layer of the gallium nitride based compound semiconductor layer can be annealed is lowered to about 550 to 800 ° C.
The nitrogen gas atmosphere is used here to prevent N in the GaN layer from escaping to the outside. Further, since Ga may escape, for example, GaAs, GaP, InA
s, InP, or a protective film 1 made of these compounds in which some or all of the group III elements are replaced by Al
0 is deposited to a thickness of about 0.1 to 2 μm by the MOCVD method (see FIG. 1B). When the protective film 10 is formed, the p-type layer of the gallium nitride based compound semiconductor layer is annealed,
H combined with the dopant Mg is separated and released to the outside to reduce the resistance of the p-type layer. After forming the protective film 10, the annealing may be continued at the same temperature under N 2 atmosphere, but the film forming time of the protective film 10 is the same as the annealing time of 30 to 30.
If the flow rate of the reaction gas is adjusted so that a protective film having a thickness of about 0.1 to 2 μm is formed in about 60 minutes, the organic gas of the group III and group V elements is added to the atmosphere gas during the annealing. Since it is present, it becomes difficult for elements of any composition to escape from the gallium nitride based compound semiconductor layer, which is preferable.

【0025】そののちアニールが完了すると、温度を室
温まで下げて、保護膜10をウエットエッチングするこ
とにより除去する。エッチングの条件は、保護膜の材料
により異なり、たとえばGaAs、GaP層であればエ
ッチング液は硫酸と過酸化水素水との混合液、硝酸と塩
酸との混合液などで、エッチングの際の温度は10〜5
0℃、1〜10分間程度である。InAs、InP層の
ばあいはエッチング液が硫酸と過酸化水素水との混合
液、塩酸と過酸化水素水との混合液などで、エッチング
の際の温度は10〜50℃、1〜10分間である。
After that, when the annealing is completed, the temperature is lowered to room temperature and the protective film 10 is removed by wet etching. The etching conditions differ depending on the material of the protective film. For example, in the case of GaAs and GaP layers, the etching solution is a mixed solution of sulfuric acid and hydrogen peroxide solution, a mixed solution of nitric acid and hydrochloric acid, and the etching temperature is 10-5
The temperature is 0 ° C. for about 1 to 10 minutes. In the case of the InAs and InP layers, the etching solution is a mixed solution of sulfuric acid and hydrogen peroxide solution, a mixed solution of hydrochloric acid and hydrogen peroxide solution, and the temperature during etching is 10 to 50 ° C. for 1 to 10 minutes. Is.

【0026】その結果、p型層のドーパントであるMg
とHとの接合が切られて活性化が達成され、p型層の低
抵抗化が図られた少なくともn型層とp型層を含むチッ
化ガリウム系化合物半導体の積層膜がえられる。
As a result, Mg which is a dopant for the p-type layer
The junction between H and H is cut, activation is achieved, and a laminated film of a gallium nitride-based compound semiconductor including at least an n-type layer and a p-type layer is obtained in which the resistance of the p-type layer is reduced.

【0027】ついで、n側の電極を形成するため、レジ
ストを塗布してパターニングを行い、図1(c)に示さ
れるようにレジスト膜11の開口された部分からチッ化
ガリウム系化合物半導体層の一部をドライエッチングに
より除去し、n型GaN層である高温バッファ層3を露
出させる。ついでAu、Alなどの金属膜をスパッタリ
ングなどにより形成し、積層された化合物半導体層の表
面でp型層に電気的に接続されるp側電極8、露出した
高温バッファ層3の表面でn型層に電気的に接続される
n側電極9を形成する(図1(d)参照)。つぎに、各
チップにダイシングして、LEDチップが形成される。
Next, in order to form the n-side electrode, a resist is applied and patterned, and as shown in FIG. 1C, the gallium nitride based compound semiconductor layer is formed from the opened portion of the resist film 11. A part is removed by dry etching to expose the high temperature buffer layer 3 which is an n-type GaN layer. Then, a metal film of Au, Al or the like is formed by sputtering or the like, the p-side electrode 8 electrically connected to the p-type layer on the surface of the laminated compound semiconductor layer, and the n-type on the exposed surface of the high temperature buffer layer 3. An n-side electrode 9 electrically connected to the layer is formed (see FIG. 1D). Next, LED chips are formed by dicing each chip.

【0028】前記実施例はダブルヘテロ結合のLEDで
あったが、通常のpn接合のLEDや種々の構造のレー
ザダイオードなどでもチッ化ガリウム系化合物半導体を
用いるものについては、本発明を同様に適用できる。さ
らに、チッ化ガリウム系化合物半導体についても、前述
の組成の材料に限定されず、一般にAlp Gaq In
1-p-q N(0<p≦1、0<q≦1、0<p+q≦1)
からなり、たとえば活性層のバンドギャップエネルギー
がクラッド層のバンドギャップエネルギーより小さくな
るように各組成の比率が選定されるように、p、qの選
定により組成を変化させたものでもよい。また前記Al
p Gaq In1-p-q NのNの一部または全部をAsおよ
び/またはPなどで置換した材料でも同様に本発明を適
用できる。
Although the above-mentioned embodiment is a double hetero-coupled LED, the present invention is similarly applied to a normal pn-junction LED, a laser diode of various structures, and the like which use a gallium nitride based compound semiconductor. it can. Further, the gallium nitride based compound semiconductor is not limited to the material having the above-mentioned composition, and is generally Al p Ga q In.
1-pq N (0 <p ≦ 1, 0 <q ≦ 1, 0 <p + q ≦ 1)
For example, the composition may be changed by selecting p and q so that the ratio of each composition is selected so that the bandgap energy of the active layer becomes smaller than the bandgap energy of the clad layer. In addition, the Al
The present invention can be similarly applied to a material obtained by substituting a part or all of N of p Ga q In 1 -pq N with As and / or P or the like.

【0029】[0029]

【発明の効果】本発明の半導体発光素子の製法によれ
ば、p型化合物半導体層のアニール工程と、積層された
チッ化ガリウム系化合物半導体の積層膜の表面への保護
膜形成工程とを同時に行うので、アニール中にチッ化ガ
リウム系化合物半導体の元素の逃げがなくなるととも
に、MOCVDによる成膜後一旦室温に戻して保護膜を
形成する必要がないため、工数削減とともに工期の短縮
を図ることができるうえ、温度変化の繰返しにより発生
する結晶欠陥や転位を防ぐことができる。その結果発光
特性がよく、信頼性の高い、しかも安価な半導体発光素
子がえられる。
According to the method for manufacturing a semiconductor light emitting device of the present invention, the step of annealing the p-type compound semiconductor layer and the step of forming the protective film on the surface of the laminated gallium nitride compound semiconductor layer are performed simultaneously. Since it is carried out, the elements of the gallium nitride based compound semiconductor do not escape during the annealing, and it is not necessary to return to room temperature once to form the protective film after forming by MOCVD. In addition, it is possible to prevent crystal defects and dislocations caused by repeated temperature changes. As a result, it is possible to obtain a semiconductor light emitting device having good light emitting characteristics, high reliability, and low cost.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体発光素子の製法の一実施例を示
す工程断面図である。
FIG. 1 is a process sectional view showing an example of a method for manufacturing a semiconductor light emitting device of the present invention.

【図2】従来の半導体発光素子の一例を示す斜視図であ
る。
FIG. 2 is a perspective view showing an example of a conventional semiconductor light emitting device.

【符号の説明】[Explanation of symbols]

1 基板 2 低温バッファ層 3 高温バッファ層 4 n型クラッド層 5 活性層 6 p型クラッド層 7 キャップ層 10 保護膜 1 substrate 2 low temperature buffer layer 3 high temperature buffer layer 4 n-type clad layer 5 active layer 6 p-type clad layer 7 cap layer 10 protective film

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 (a)基板上に少なくともn型層とp型
層を有し、発光部を形成するチッ化ガリウム系化合物半
導体層を有機金属化合物気相成長法により積層し、
(b)該チッ化ガリウム系化合物半導体層を積層後チッ
素ガス雰囲気にするとともに周囲温度を、GaAs化合
物を気相成長することができ、かつ、前記チッ化ガリウ
ム系化合物半導体層のp型層をアニールすることができ
る温度まで下げ、(c)前記チッ化ガリウム系化合物半
導体層の表面にp型ドーパントがそれぞれドーピングさ
れたGaAs、GaP、InAs、InPおよびこれら
のIII 族元素の一部がAlと置換したものよりなる群か
ら選ばれた少なくとも1種を前記チッ素雰囲気中で保護
膜として成膜し、(d)前記保護膜の成膜とともに前記
チッ化ガリウム系化合物半導体層のp型層をアニール
し、アニール完了後室温まで下げて前記保護膜をエッチ
ング除去することを特徴とする半導体発光素子の製法。
1. A method comprising: (a) laminating a gallium nitride compound semiconductor layer having at least an n-type layer and a p-type layer on a substrate and forming a light emitting portion by a metal organic chemical vapor deposition method;
(B) A p-type layer of the gallium nitride-based compound semiconductor layer, which is capable of vapor-depositing a GaAs compound at a surrounding temperature while stacking the gallium nitride-based compound semiconductor layer in a nitrogen gas atmosphere. To a temperature at which GaN can be annealed, and (c) GaAs, GaP, InAs, InP and p-type dopants each having a p-type dopant doped on the surface of the gallium nitride-based compound semiconductor layer, and part of these Group III elements are Al. And at least one selected from the group consisting of those substituted with a protective film in the nitrogen atmosphere, and (d) the protective film and the p-type layer of the gallium nitride-based compound semiconductor layer. Is annealed, and after the annealing is completed, the temperature is lowered to room temperature and the protective film is removed by etching.
【請求項2】 前記保護膜の成膜の時間をアニール時間
と合わせて0.1〜2μmの厚さに成膜されるように原
料ガスを導入する請求項1記載の半導体発光素子の製
法。
2. The method for manufacturing a semiconductor light emitting device according to claim 1, wherein the source gas is introduced so that the time for forming the protective film and the annealing time are combined to form a film having a thickness of 0.1 to 2 μm.
JP19685194A 1994-08-09 1994-08-22 Manufacturing method of semiconductor light emitting device Expired - Fee Related JP3325713B2 (en)

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JP19685194A JP3325713B2 (en) 1994-08-22 1994-08-22 Manufacturing method of semiconductor light emitting device
US08/509,231 US5814533A (en) 1994-08-09 1995-07-31 Semiconductor light emitting element and manufacturing method therefor

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EP0805500A1 (en) * 1995-08-31 1997-11-05 Kabushiki Kaisha Toshiba Blue light emitting device and production method thereof
EP0828302A3 (en) * 1996-09-06 1998-12-23 Sharp Kabushiki Kaisha Gallium nitride group compound semiconductor light-emitting device and method for fabricating the same
WO1999013499A3 (en) * 1997-09-12 1999-05-06 Sdl Inc In-situ acceptor activation in group iii-v nitride compound semiconductors
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Publication number Priority date Publication date Assignee Title
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Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05183189A (en) * 1991-11-08 1993-07-23 Nichia Chem Ind Ltd Manufacture of p-type gallium nitride based compound semiconductor

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