JPH0851235A - Manufacture of semiconductor light emitting element - Google Patents

Manufacture of semiconductor light emitting element

Info

Publication number
JPH0851235A
JPH0851235A JP18734194A JP18734194A JPH0851235A JP H0851235 A JPH0851235 A JP H0851235A JP 18734194 A JP18734194 A JP 18734194A JP 18734194 A JP18734194 A JP 18734194A JP H0851235 A JPH0851235 A JP H0851235A
Authority
JP
Japan
Prior art keywords
layer
light emitting
type
type layer
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18734194A
Other languages
Japanese (ja)
Inventor
Yukio Shakuda
幸男 尺田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP18734194A priority Critical patent/JPH0851235A/en
Priority to US08/509,231 priority patent/US5814533A/en
Publication of JPH0851235A publication Critical patent/JPH0851235A/en
Pending legal-status Critical Current

Links

Landscapes

  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To provide a manufacturing method of a semiconductor light emitting element whereby the generations of its crystal defects and dislocations are suppressed even with mismatching of lattice constants and the differences of thermal expansion coefficients which are present among its semiconductor layers and electrodes, and whereby the lengths and times of its manufacturing processes can be contracted. CONSTITUTION:(a) On a substrate 1, gallium nitride based compound semiconductor layers wherein at least an n-type layer 4 and a p-type layer 6 are provided and a light emitting layer 5 is formed are formed. (b) n-side and p-side electrodes 9, 8 which are connected electrically with the respective n-type and p-type layers 4, 6 are formed. (c) After the formations of both the electrodes 9, 8, the whole of the gallium nitride based compound semiconductor layers is subjected to a heat treatment at a temperature not lower than 400 deg.C. Thereby, both the annealing of the p-type layer 6 and the alloyings of the electrodes 9, 8 with the semiconductor layers are performed concurrently.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体発光素子の製法に
関する。さらに詳しくは、青色発光に好適なチッ化ガリ
ウム系化合物半導体を用いた半導体発光素子の製法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor light emitting device. More specifically, it relates to a method for manufacturing a semiconductor light emitting device using a gallium nitride based compound semiconductor suitable for blue light emission.

【0002】ここにチッ化ガリウム系化合物半導体と
は、III 族元素のGaとV族元素のNとの化合物または
III 族元素のGaの一部がAl、Inなど他のIII 族元
素と置換したものおよび/またはV族元素のNの一部が
P、Asなど他のV族元素と置換した化合物からなる半
導体をいう。
Here, a gallium nitride compound semiconductor is a compound of a group III element Ga and a group V element N or
A semiconductor made of a compound in which a part of Ga of the group III element is replaced with another group III element such as Al and In and / or a part of N of the group V element is replaced with another group V element such as P and As. Say.

【0003】また、半導体発光素子とは、pn接合また
はpinなどダブルヘテロ接合を有する発光ダイオード
(以下、LEDという)、スーパルミネッセントダイオ
ード(SLD)または半導体レーザダイオード(LD)
などの光を発生する半導体素子をいう。
A semiconductor light emitting device is a light emitting diode (hereinafter referred to as LED) having a double heterojunction such as a pn junction or a pin, a super luminescent diode (SLD) or a semiconductor laser diode (LD).
A semiconductor element that emits light.

【0004】[0004]

【従来の技術】従来青色のLEDは赤色や緑色に比べて
輝度が小さく実用化に難点があったが、近年チッ化ガリ
ウム系化合物半導体を用い、Mgをドーパントした低抵
抗のp型半導体層がえられたことにより、輝度が向上し
脚光をあびている。
2. Description of the Related Art Conventionally, blue LEDs have a lower brightness than red and green and are difficult to put into practical use. In recent years, however, gallium nitride compound semiconductors have been used, and a low resistance p-type semiconductor layer doped with Mg has been formed. As a result, the brightness is improved and it is in the limelight.

【0005】従来のチッ化ガリウム系のLEDの製法
は、たとえば図3〜4に示されるような工程で行われ
る。
A conventional gallium nitride-based LED manufacturing method is carried out, for example, in the steps shown in FIGS.

【0006】まず、図3(a)に示されるように、サフ
ァイア(Al2 3 単結晶)などからなる基板21に4
00〜700℃の低温で有機金属化合物気相成長法(以
下、MOCVD法という)によりキャリアガスH2 とと
もに有機金属化合物ガスであるトリメチルガリウム(以
下、TMGという)、アンモニア(NH3 )およびドー
パントとしてのSiH4 などを供給し、n型のGaN層
からなる低温バッファ層22を0.01〜0.2μm程
度形成し、ついで900〜1200℃の高温で同じガス
を供給し同じ組成のn型のGaNからなる高温バッファ
層23を2〜5μm程度形成する。
First, as shown in FIG. 3A, a substrate 21 made of sapphire (Al 2 O 3 single crystal) or the like is formed on the substrate 21.
As a metalorganic compound gas, trimethylgallium (hereinafter, referred to as TMG), ammonia (NH 3 ) and a dopant together with a carrier gas H 2 by a metalorganic vapor phase growth method (hereinafter, referred to as MOCVD method) at a low temperature of 00 to 700 ° C. SiH 4 or the like is supplied to form the low-temperature buffer layer 22 made of an n-type GaN layer to a thickness of about 0.01 to 0.2 μm, and then the same gas is supplied at a high temperature of 900 to 1200 ° C. The high temperature buffer layer 23 made of GaN is formed to have a thickness of about 2 to 5 μm.

【0007】ついで前述のガスにさらにトリメチルアル
ミニウム(以下、TMAという)の原料ガスを加え、n
型ドーパントのSiを含有したn型Alx Ga1-x
(0<x<1)層を成膜し、ダブルヘテロ接合形成のた
めのn型クラッド層24を0.1〜0.3μm程度形成
する。
Then, a raw material gas of trimethylaluminum (hereinafter referred to as TMA) is further added to the above gas, and n
N - type Al x Ga 1-x N containing Si as a type dopant
A (0 <x <1) layer is formed, and an n-type cladding layer 24 for forming a double heterojunction is formed to have a thickness of about 0.1 to 0.3 μm.

【0008】つぎに前述の原料ガスのTMAに代えてト
リメチルインジウム(以下、TMIという)を導入し、
バンドギャップエネルギーがクラッド層のそれより小さ
くなる材料、たとえばGay In1-y N(0<y≦1)
からなる活性層25を0.05〜0.1μm程度形成す
る。
Next, trimethylindium (hereinafter referred to as TMI) is introduced in place of the above-mentioned source gas TMA,
A material whose band gap energy is smaller than that of the cladding layer, for example, Ga y In 1-y N (0 <y ≦ 1)
And the active layer 25 is formed to have a thickness of about 0.05 to 0.1 μm.

【0009】さらに、n型クラッド層24の形成に用い
たガスと同じ原料のガスで不純物原料ガスをSiH4
代えてp型不純物としてのMgまたはZnのためのシク
ロペンタジエニルマグネシウム(以下、Cp2 Mgとい
う)またはジメチル亜鉛(以下、DMZnという)を加
えて反応管に導入し、p型クラッド層26であるp型A
x Ga1-x N層を気相成長させる。これによりn型ク
ラッド層24と活性層25とp型クラッド層26とによ
りダブルヘテロ接合が形成される。
Further, cyclopentadienylmagnesium for Mg or Zn as a p-type impurity (hereinafter, referred to as a p-type impurity by replacing SiH 4 as an impurity source gas with the same source gas as the gas used for forming the n-type cladding layer 24). Cp 2 Mg) or dimethylzinc (hereinafter referred to as DMZn) is added to the reaction tube, and the p-type cladding layer 26 of p-type A
The l x Ga 1-x N layer is vapor-grown. As a result, the n-type cladding layer 24, the active layer 25, and the p-type cladding layer 26 form a double heterojunction.

【0010】ついでキャップ層27形成のため、前述の
バッファ層23と同様のガスで不純物原料ガスとしてC
2 MgまたはDMZnを供給してp型のGaN層を
0.3〜1μm程度成長させる。
Next, to form the cap layer 27, a gas similar to that used for the buffer layer 23 is used as an impurity source gas, ie, C.
By supplying p 2 Mg or DMZn, a p-type GaN layer is grown to about 0.3 to 1 μm.

【0011】そののちSiO2 などの保護膜28を半導
体層の成長層表面全面に設け(図3(b)参照)、40
0〜800℃、20〜60分間程度のアニールを行い
(図3(c)参照)、p型クラッド層26およびキャッ
プ層27の活性化を図る。このアニールが行われるのは
つぎの理由による。すなわち、チッ化ガリウム系化合物
半導体のp型層はドーパントとしてMgなどがドーピン
グされているが、Mgなどはドーピングの際、キャリア
ガスのH2 や反応ガスのNH3 のHと化合し、ドーパン
トの働きをせず高抵抗になる。そこでMgとHを切り離
しHを放出して低抵抗化するため、アニール工程が設け
られている。
After that, a protective film 28 such as SiO 2 is provided on the entire surface of the growth layer of the semiconductor layer (see FIG. 3B), 40.
Annealing is performed at 0 to 800 ° C. for 20 to 60 minutes (see FIG. 3C) to activate the p-type cladding layer 26 and the cap layer 27. The reason why this annealing is performed is as follows. That is, the p-type layer of the gallium nitride based compound semiconductor is doped with Mg or the like as a dopant, but Mg or the like is mixed with H 2 of the carrier gas or H of NH 3 of the reaction gas at the time of doping to change the dopant High resistance without working. Therefore, an annealing process is provided to separate Mg from H and release H to reduce the resistance.

【0012】ついで、保護膜28を除去したのち、n側
の電極を形成するため、レジストを塗布してパターニン
グを行い図4(d)に示されるように、成長した各半導
体層の一部をドライエッチングにより除去してn型Ga
N層であるバッファ層23を露出させる。ついで、A
u、Alなどの金属膜をスパッタリングなどにより形成
してp側およびn側の両電極29、30を形成し、ダイ
シングすることによりLEDチップを形成している。
Next, after removing the protective film 28, in order to form an n-side electrode, a resist is applied and patterning is performed to partially remove each of the grown semiconductor layers as shown in FIG. 4 (d). N-type Ga removed by dry etching
The buffer layer 23, which is the N layer, is exposed. Then, A
A metal film of u, Al or the like is formed by sputtering or the like to form both the p-side and n-side electrodes 29, 30 and the LED chip is formed by dicing.

【0013】つぎに、電極金属のAlなどとチッ化ガリ
ウム系化合物半導体とのあいだをオーミック接触にする
ため、H2 雰囲気中で300℃程度の熱処理をして合金
化する(図4(e)参照)。
Next, in order to make ohmic contact between the electrode metal such as Al and the gallium nitride based compound semiconductor, heat treatment is carried out at about 300 ° C. in an H 2 atmosphere to form an alloy (FIG. 4 (e)). reference).

【0014】[0014]

【発明が解決しようとする課題】従来のチッ化ガリウム
系化合物半導体を用いた半導体発光素子の製法では、前
述のようにアニール処理と合金化処理の2回の熱処理を
行わなければならない。しかもサファイア基板とチッ化
ガリウム系半導体結晶とでは、格子定数や熱膨張係数の
差がともに大きく、熱処理をして室温に戻す温度衝撃を
繰り返すと、膨張と縮小が繰り返され、サファイア基板
と接するバッファ層にクラックなどの結晶欠陥や転位な
どが発生し、その結晶欠陥や転位は動作層であるクラッ
ド層や活性層にも進展し、発光効率が低下するととも
に、寿命も低下するという問題がある。
In the conventional method for manufacturing a semiconductor light emitting device using a gallium nitride based compound semiconductor, it is necessary to perform the heat treatment twice, that is, the annealing treatment and the alloying treatment as described above. Moreover, the sapphire substrate and the gallium nitride-based semiconductor crystal have large differences in the lattice constant and the thermal expansion coefficient, and repeated thermal shock of returning to room temperature by heat treatment causes repeated expansion and contraction, resulting in a buffer contact with the sapphire substrate. Crystal defects such as cracks and dislocations are generated in the layer, and the crystal defects and dislocations also propagate to the clad layer and the active layer, which are the operating layers, and the luminous efficiency is reduced and the life is also shortened.

【0015】本発明はこのような問題を解決し、格子定
数の不整合および熱膨張係数の差に基づく結晶欠陥や転
位の発生を抑制するとともに、製造工程を短縮すること
ができる半導体発光素子の製法を提供することを目的と
する。
The present invention solves such a problem, suppresses the generation of crystal defects and dislocations due to the mismatch of lattice constants and the difference in thermal expansion coefficient, and can shorten the manufacturing process. The purpose is to provide a manufacturing method.

【0016】[0016]

【課題を解決するための手段】本発明の半導体発光素子
の製法は、(a)基板上に少なくともn型層とp型層を
含み、発光層を有するチッ化ガリウム系化合物半導体層
を積層し、(b)前記n型層およびp型層に電気的に接
続されるn側電極およびp側電極を形成し、(c)該両
電極の形成後に熱処理をすることにより、p型層のアニ
ールおよび電極と半導体層との合金化を同時に行うこと
を特徴とする。
According to the method of manufacturing a semiconductor light emitting device of the present invention, (a) a gallium nitride compound semiconductor layer having at least an n-type layer and a p-type layer and having a light emitting layer is laminated on a substrate. And (b) forming an n-side electrode and a p-side electrode electrically connected to the n-type layer and the p-type layer, and (c) annealing the p-type layer by performing heat treatment after forming the both electrodes. And alloying the electrode and the semiconductor layer at the same time.

【0017】前記半導体発光素子の製法においては、前
記基板にサファイア基板を用い、前記n側電極またはp
側電極の一方を前記積層された化合物半導体層の表面に
形成し、他方の電極を前記積層された化合物半導体層の
一部をエッチングし、該他方の電極と電気的に接続され
るn型層またはp型層の露出した面に形成することがで
きる。
In the method of manufacturing the semiconductor light emitting device, a sapphire substrate is used as the substrate, and the n-side electrode or the p-side electrode is used.
An n-type layer in which one of the side electrodes is formed on the surface of the stacked compound semiconductor layer, the other electrode is formed by etching a part of the stacked compound semiconductor layer, and is electrically connected to the other electrode. Alternatively, it can be formed on the exposed surface of the p-type layer.

【0018】前記熱処理前に前記化合物半導体層の表面
を保護膜で被膜することがチッ化ガリウム系化合物半導
体層中のNやGaが抜けにくく、かつ、電極材料の融点
がアニール温度より低くても電極材料が溶融して流れる
ことなく保持されるため好ましい。
It is difficult to remove N and Ga in the gallium nitride based compound semiconductor layer by coating the surface of the compound semiconductor layer with a protective film before the heat treatment, and even if the melting point of the electrode material is lower than the annealing temperature. It is preferable because the electrode material is melted and held without flowing.

【0019】[0019]

【作用】本発明の製法によれば、アニールを行うと同時
に、n側とp側の両方の電極を化合物半導体層の表面と
合金化することができるため、アニール工程と電極の合
金化の工程を一つにまとめることができ、工数を減らす
ことができる。さらに、一度低温にした化合物半導体層
を再び高温にする必要がないため、異なる材料の基板に
積層されたチッ化ガリウム系化合物半導体の膨張、縮小
の繰返しにより発生するチッ化ガリウム系化合物半導体
層の結晶欠陥や転位の発生を抑制することができる。
According to the manufacturing method of the present invention, both the n-side electrode and the p-side electrode can be alloyed with the surface of the compound semiconductor layer at the same time when annealing is performed. Therefore, the annealing step and the electrode alloying step can be performed. Can be combined into one, and man-hours can be reduced. Further, since it is not necessary to raise the temperature of the compound semiconductor layer once lowered to high temperature again, the gallium nitride based compound semiconductor layer generated by repeated expansion and contraction of gallium nitride based compound semiconductors laminated on the substrate of different materials Generation of crystal defects and dislocations can be suppressed.

【0020】[0020]

【実施例】つぎに、図面を参照しながら本発明の半導体
発光素子の製法を説明する。
Next, a method for manufacturing a semiconductor light emitting device of the present invention will be described with reference to the drawings.

【0021】図1は本発明の半導体発光素子の製法の一
実施例の工程断面説明図、図2は図1の製法により製造
されたLEDチップの断面図である。
FIG. 1 is a sectional view showing the steps of an embodiment of a method for manufacturing a semiconductor light emitting device of the present invention, and FIG. 2 is a sectional view of an LED chip manufactured by the manufacturing method of FIG.

【0022】まず、図1(a)に示されるように、サフ
ァイアなどからなる基板1に、MOCVD法によりたと
えばn型GaNなどのチッ化ガリウム系半導体層からな
る低温バッファ層2および高温バッファ層3をそれぞれ
0.01〜0.2μm、2〜5μm程度成長する。その
のち、n型クラッド層4、ノンドープまたはn型もしく
はp型の活性層5、p型クラッド層6、キャップ層7を
順次形成する。クラッド層4、6は通常0.1〜0.3
μm程度、活性層5は0.05〜0.1μm程度の厚さ
にそれぞれ形成される。これらのチッ化ガリウム系半導
体層の成膜は従来技術で説明したのと同様の原料ガスを
導入し、反応させて成長する。
First, as shown in FIG. 1A, a low temperature buffer layer 2 and a high temperature buffer layer 3 made of a gallium nitride based semiconductor layer such as n-type GaN are formed on a substrate 1 made of sapphire by MOCVD. Of 0.01 to 0.2 μm and 2 to 5 μm, respectively. After that, the n-type cladding layer 4, the non-doped or n-type or p-type active layer 5, the p-type cladding layer 6, and the cap layer 7 are sequentially formed. The clad layers 4 and 6 are usually 0.1 to 0.3.
The active layer 5 is formed to have a thickness of about 0.05 μm and a thickness of about 0.05 to 0.1 μm. The film formation of these gallium nitride based semiconductor layers is performed by introducing the same raw material gas as described in the prior art and reacting it to grow.

【0023】前述のクラッド層4をn型に形成するため
には、Si、Ge、TeなどをSiH4 、GeH4 、T
eH4 などのガスとして反応ガス内に混入し、クラッド
層6をp型に形成するためにはMgやZnをCp2 Mg
やDMZnの有機金属ガスとして原料ガスに混入する。
キャップ層7は電極との接触抵抗を減少させるためのも
ので、p型GaNなどからなり、0.2μm以上の厚さ
に成膜される。
In order to form the above-mentioned cladding layer 4 into an n-type, Si, Ge, Te, etc. are replaced with SiH 4 , GeH 4 , T.
In order to form the cladding layer 6 into a p-type by mixing it as a gas such as eH 4 into the reaction gas, Mg or Zn is added to Cp 2 Mg.
It is mixed in the source gas as an organic metal gas such as DMZn or DMZn.
The cap layer 7 is for reducing the contact resistance with the electrode and is made of p-type GaN or the like, and is formed to a thickness of 0.2 μm or more.

【0024】つぎに、各半導体層の一部を、たとえばC
2 プラズマによるドライエッチングを行って高温バッ
ファ層3を露出させる。ついでAu、Alなどからなる
金属膜をスパッタリングなどにより成膜しパターニング
することにより、積層された化合物半導体層の表面でp
型層に電気的に接続されるp側電極8、露出した高温バ
ッファ層3の表面でn型層に電気的に接続されるn側電
極9を形成する(図1(b)参照)。
Next, a part of each semiconductor layer, for example, C
The high temperature buffer layer 3 is exposed by performing dry etching with l 2 plasma. Then, a metal film made of Au, Al, or the like is formed by sputtering or the like and patterned to form p on the surface of the stacked compound semiconductor layers.
A p-side electrode 8 electrically connected to the mold layer and an n-side electrode 9 electrically connected to the n-type layer on the exposed surface of the high temperature buffer layer 3 are formed (see FIG. 1B).

【0025】電極8、9の形成後、SiO2 、Si3
4 などからなる保護膜10を前記半導体層表面にCVD
法、PCVD法などにより設け(図1(c)参照)、ア
ニール処理を行う(図1(d)参照)。アニール処理
は、N2 雰囲気中、400〜800℃で0.5〜1時間
程度行われる。この方法によれば、保護膜10が存在す
るためチッ化ガリウム系化合物からNやGaが抜けにく
く好ましいが、10気圧程度のN2 雰囲気の高圧下にお
き、400〜800℃程度でアニールする方法でも同様
の効果がえられる。しかし、保護膜が形成されている方
が、電極材料の融点が熱処理温度より低くても熱処理時
に流れ落ちないで合金化が充分になされるため好まし
い。その結果、p型層のドーパントであるMgとHとの
接合が切られて活性化が達成され、p型層の低抵抗化が
図られる。そのうえ、電極と半導体層間の合金化も同時
に行うことができ、オーミック接触をうることができ
る。
After forming the electrodes 8 and 9, SiO 2 and Si 3 N
CVD of a protective film 10 made of 4 or the like on the surface of the semiconductor layer
Method, PCVD method or the like (see FIG. 1C), and an annealing treatment is performed (see FIG. 1D). The annealing treatment is performed in an N 2 atmosphere at 400 to 800 ° C. for about 0.5 to 1 hour. According to this method, N and Ga are less likely to escape from the gallium nitride-based compound due to the presence of the protective film 10. However, the method is to place it under a high pressure of N 2 atmosphere of about 10 atm and anneal at about 400 to 800 ° C. However, the same effect can be obtained. However, it is preferable that the protective film is formed because even if the melting point of the electrode material is lower than the heat treatment temperature, it does not flow down during the heat treatment and alloying is sufficiently performed. As a result, the junction between Mg and H, which are the dopants of the p-type layer, is cut and activation is achieved, and the resistance of the p-type layer is reduced. In addition, alloying between the electrode and the semiconductor layer can be performed at the same time, and ohmic contact can be obtained.

【0026】アニール処理が終了すると、保護膜10を
フッ酸系溶液によりエッチングすることにより取り除
き、各チップに分離して、図2に示されるような半導体
発光素子チップが形成される。
When the annealing treatment is completed, the protective film 10 is removed by etching with a hydrofluoric acid solution, and the chips are separated into semiconductor light emitting device chips as shown in FIG.

【0027】この半導体発光素子チップをリードフレー
ムに設置し、ワイヤボンディングしたのちエポキシ樹脂
でモールドすることによりLEDが完成する。
The semiconductor light emitting device chip is placed on a lead frame, wire bonded, and then molded with an epoxy resin to complete an LED.

【0028】前述の例では、電極8および9の形成をキ
ャップ層7表面側に設けたが、基板1にGaAs系、G
aN系などからなる半導体基板などを使用すれば、導電
性にすることができ、化合物半導体層の裏面すなわち基
板1側に電極を形成することもできる。
In the above-mentioned example, the electrodes 8 and 9 are formed on the surface side of the cap layer 7.
If a semiconductor substrate made of aN-based or the like is used, it can be made conductive, and an electrode can be formed on the back surface of the compound semiconductor layer, that is, the substrate 1 side.

【0029】また前述の実施例ではAlx Ga1-x N、
Gay In1-y Nのダブルヘテロ接合のLEDであった
が、通常のホモまたはヘテロのpn接合のLEDや前述
の構造でストライプを形成してレーザダイオードとした
り、材料もチッ化ガリウム系化合物半導体で屈折率やバ
ンドギャップエネルギーの関係を満たすように、Alp
Gaq In1-p-q N(0≦p<1、0<q≦1、0<p
+q≦1)の一般式で組成を変えたもの、この一般式の
Nの一部または全部をAsおよび/またはPなどで置換
したものでも同様の工程で製造することができる。
In the above embodiment, Al x Ga 1-x N,
Although it was a Ga y In 1 -y N double heterojunction LED, it is a normal homo or hetero pn junction LED or a laser diode formed by forming a stripe with the above-mentioned structure, and the material is a gallium nitride compound. In order to satisfy the relationship of refractive index and band gap energy in semiconductors, Al p
Ga q In 1-pq N (0 ≦ p <1, 0 <q ≦ 1, 0 <p
+ Q ≦ 1) having a different composition in the general formula, and a part or all of N in the general formula being substituted with As and / or P or the like can be produced in the same process.

【0030】[0030]

【発明の効果】本発明の半導体発光素子の製法は、p型
化合物半導体層のアニール工程と電極の合金化の工程を
一回の熱処理で済ませることができるため、温度差の繰
返しにより発生する結晶欠陥や転位を防ぐことができ、
発光効率がよく信頼性のある半導体発光素子をうること
ができる。また、熱処理工程が1回で済むので、熱処理
工程を減らすことができコストも低減できる。
According to the method of manufacturing the semiconductor light emitting device of the present invention, the annealing process for the p-type compound semiconductor layer and the alloying process for the electrodes can be completed by a single heat treatment. Can prevent defects and dislocations,
It is possible to obtain a highly reliable semiconductor light emitting device with high luminous efficiency. Further, since the heat treatment step is only required once, the heat treatment step can be reduced and the cost can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体発光素子の製法の一実施例を示
す工程断面図である。
FIG. 1 is a process sectional view showing an example of a method for manufacturing a semiconductor light emitting device of the present invention.

【図2】図1の製造工程により製造されたLEDチップ
の断面図である。
FIG. 2 is a cross-sectional view of an LED chip manufactured by the manufacturing process of FIG.

【図3】従来の半導体発光素子の製法の一例を示す工程
断面図である。
FIG. 3 is a process sectional view showing an example of a conventional method for manufacturing a semiconductor light emitting device.

【図4】従来の半導体発光素子の製法の一例を示す工程
断面図である。
FIG. 4 is a process sectional view showing an example of a conventional method for manufacturing a semiconductor light emitting device.

【符号の説明】[Explanation of symbols]

1 基板 2 低温バッファ層 3 高温バッファ層 4 n型クラッド層 5 活性層 6 p型クラッド層 7 キャップ層 10 保護膜 1 substrate 2 low temperature buffer layer 3 high temperature buffer layer 4 n-type clad layer 5 active layer 6 p-type clad layer 7 cap layer 10 protective film

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 (a)基板上に少なくともn型層とp型
層を含み、発光層を有するチッ化ガリウム系化合物半導
体層を積層し、(b)前記n型層およびp型層に電気的
に接続されるn側電極およびp側電極を形成し、(c)
該両電極の形成後に熱処理をすることによりp型層のア
ニールおよび電極と半導体層との合金化を同時に行うこ
とを特徴とする半導体発光素子の製法。
1. A method comprising: (a) laminating a gallium nitride-based compound semiconductor layer having at least an n-type layer and a p-type layer and having a light emitting layer on a substrate; and (b) electrically connecting the n-type layer and the p-type layer. An n-side electrode and a p-side electrode that are electrically connected, (c)
A method for manufacturing a semiconductor light emitting device, characterized in that a heat treatment is performed after the formation of the both electrodes to anneal the p-type layer and alloy the electrode and the semiconductor layer at the same time.
【請求項2】 前記基板にサファイア基板を用い、前記
n側電極またはp側電極の一方を前記積層された化合物
半導体層の表面に形成し、他方の電極を前記積層された
化合物半導体層の一部をエッチングし、該他方の電極と
電気的に接続されるn型層またはp型層の露出した面に
形成する請求項1記載の半導体発光素子の製法。
2. A sapphire substrate is used as the substrate, one of the n-side electrode and the p-side electrode is formed on the surface of the laminated compound semiconductor layer, and the other electrode is formed of the laminated compound semiconductor layer. 2. The method for manufacturing a semiconductor light emitting device according to claim 1, wherein the portion is etched and formed on the exposed surface of the n-type layer or p-type layer electrically connected to the other electrode.
【請求項3】 前記熱処理前に前記化合物半導体層およ
び電極の表面を保護膜で被覆する請求項1または2記載
の半導体発光素子の製法。
3. The method for producing a semiconductor light emitting device according to claim 1, wherein the surface of the compound semiconductor layer and the electrode are covered with a protective film before the heat treatment.
JP18734194A 1994-08-09 1994-08-09 Manufacture of semiconductor light emitting element Pending JPH0851235A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP18734194A JPH0851235A (en) 1994-08-09 1994-08-09 Manufacture of semiconductor light emitting element
US08/509,231 US5814533A (en) 1994-08-09 1995-07-31 Semiconductor light emitting element and manufacturing method therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18734194A JPH0851235A (en) 1994-08-09 1994-08-09 Manufacture of semiconductor light emitting element

Publications (1)

Publication Number Publication Date
JPH0851235A true JPH0851235A (en) 1996-02-20

Family

ID=16204309

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18734194A Pending JPH0851235A (en) 1994-08-09 1994-08-09 Manufacture of semiconductor light emitting element

Country Status (1)

Country Link
JP (1) JPH0851235A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10173222A (en) * 1996-12-06 1998-06-26 Rohm Co Ltd Manufacture of semiconductor light emitting element
JPH11251687A (en) * 1998-03-06 1999-09-17 Matsushita Electric Ind Co Ltd Manufacture of semiconductor and semiconductor device
US6291840B1 (en) 1996-11-29 2001-09-18 Toyoda Gosei Co., Ltd. GaN related compound semiconductor light-emitting device
GB2412234A (en) * 2004-03-18 2005-09-21 Sharp Kk Manufacture of a semiconductor light-emitting device
JP2009094337A (en) * 2007-10-10 2009-04-30 Toyota Central R&D Labs Inc Method of manufacturing semiconductor element
US7718450B2 (en) 2005-05-09 2010-05-18 Rohm Co., Ltd. Method for manufacturing nitride semiconductor device
JP2010537436A (en) * 2007-08-31 2010-12-02 ラティス パワー (チアンシ) コーポレイション Method for fabricating low resistivity ohmic contacts to p-type III-V nitride semiconductor material at low temperature
JP2012204362A (en) * 2011-03-23 2012-10-22 Sharp Corp Method of manufacturing nitride semiconductor light-emitting element
US8513694B2 (en) 2009-03-04 2013-08-20 Panasonic Corporation Nitride semiconductor device and manufacturing method of the device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04321280A (en) * 1991-04-19 1992-11-11 Nichia Chem Ind Ltd Blue color light-emitting diode
JPH0563237A (en) * 1991-08-30 1993-03-12 Toshiba Corp Light semiconductor device
JPH05183189A (en) * 1991-11-08 1993-07-23 Nichia Chem Ind Ltd Manufacture of p-type gallium nitride based compound semiconductor
JPH06112531A (en) * 1992-09-29 1994-04-22 Toshiba Corp Semiconductor light emitting element
JPH06232450A (en) * 1993-02-02 1994-08-19 Nichia Chem Ind Ltd Gallium nitride compound semiconductor and forming method of electrode thereof
JPH06237012A (en) * 1993-02-10 1994-08-23 Nichia Chem Ind Ltd Semiconductor light emitting element of gallium nitride compound

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04321280A (en) * 1991-04-19 1992-11-11 Nichia Chem Ind Ltd Blue color light-emitting diode
JPH0563237A (en) * 1991-08-30 1993-03-12 Toshiba Corp Light semiconductor device
JPH05183189A (en) * 1991-11-08 1993-07-23 Nichia Chem Ind Ltd Manufacture of p-type gallium nitride based compound semiconductor
JPH06112531A (en) * 1992-09-29 1994-04-22 Toshiba Corp Semiconductor light emitting element
JPH06232450A (en) * 1993-02-02 1994-08-19 Nichia Chem Ind Ltd Gallium nitride compound semiconductor and forming method of electrode thereof
JPH06237012A (en) * 1993-02-10 1994-08-23 Nichia Chem Ind Ltd Semiconductor light emitting element of gallium nitride compound

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6291840B1 (en) 1996-11-29 2001-09-18 Toyoda Gosei Co., Ltd. GaN related compound semiconductor light-emitting device
US6500689B2 (en) 1996-11-29 2002-12-31 Toyoda Gosei Co., Ltd. Process for producing GaN related compound semiconductor
US6573117B2 (en) 1996-11-29 2003-06-03 Toyoda Gosei Co., Ltd. GaN related compound semiconductor and process for producing the same
JPH10173222A (en) * 1996-12-06 1998-06-26 Rohm Co Ltd Manufacture of semiconductor light emitting element
JPH11251687A (en) * 1998-03-06 1999-09-17 Matsushita Electric Ind Co Ltd Manufacture of semiconductor and semiconductor device
GB2412234A (en) * 2004-03-18 2005-09-21 Sharp Kk Manufacture of a semiconductor light-emitting device
JP2005268800A (en) * 2004-03-18 2005-09-29 Sharp Corp Manufacturing method of semiconductor light-emitting device
US7718450B2 (en) 2005-05-09 2010-05-18 Rohm Co., Ltd. Method for manufacturing nitride semiconductor device
JP2010537436A (en) * 2007-08-31 2010-12-02 ラティス パワー (チアンシ) コーポレイション Method for fabricating low resistivity ohmic contacts to p-type III-V nitride semiconductor material at low temperature
JP2009094337A (en) * 2007-10-10 2009-04-30 Toyota Central R&D Labs Inc Method of manufacturing semiconductor element
US8513694B2 (en) 2009-03-04 2013-08-20 Panasonic Corporation Nitride semiconductor device and manufacturing method of the device
JP2012204362A (en) * 2011-03-23 2012-10-22 Sharp Corp Method of manufacturing nitride semiconductor light-emitting element

Similar Documents

Publication Publication Date Title
JP3974667B2 (en) Manufacturing method of semiconductor light emitting device
JP3973799B2 (en) Gallium nitride compound semiconductor light emitting device
KR101423459B1 (en) A method of growing semiconductor heterostructures based on gallium nitride
US6617061B2 (en) Group III nitride compound semiconductor device and group III nitride compound semiconductor light-emitting device
JP2002231997A (en) Nitride semiconductor light-emitting device
JP3325713B2 (en) Manufacturing method of semiconductor light emitting device
JPH0851235A (en) Manufacture of semiconductor light emitting element
JP2713094B2 (en) Semiconductor light emitting device and method of manufacturing the same
JP3458007B2 (en) Semiconductor light emitting device
JPH10173236A (en) Manufacture of gallium nitride-based compound semiconductor light emitting element
JP3571401B2 (en) Manufacturing method of semiconductor light emitting device
JP2002299686A (en) Semiconductor light emitting element and manufacturing method thereof
JP3504976B2 (en) Semiconductor light emitting device
JP3589000B2 (en) Gallium nitride based compound semiconductor light emitting device
JPH0864912A (en) Semiconductor light emitting element and its manufacture
JPH0864913A (en) Semiconductor light emitting element and its manufacture
JP2000174341A (en) Gallium nitride based compound semiconductor light- emitting element
JPH08116092A (en) Semiconductor light emitting element and its manufacture
JPH0897469A (en) Semiconductor light emitting device
JPH0883956A (en) Semiconductor light-emitting device
JPH0883928A (en) Semiconductor light emitting element and manufacture thereof
JP2950316B2 (en) Gallium nitride based compound semiconductor light emitting device and method of manufacturing the same
JPH11214750A (en) Manufacture of gallium nitride compound semiconductor light-emitting device
JP3615384B2 (en) Semiconductor device and manufacturing method thereof
JP3684841B2 (en) Gallium nitride compound semiconductor light emitting device