JPH0856002A - Diode - Google Patents

Abstract

PURPOSE:To provide a diode which can prevent the concentration of leakage current in a junction region when a reverse bias is impressed. CONSTITUTION:In a diode formed by a junction of a first conductive type (n<+>) diffusion layer 14 and a second conductive type (p<+>) diffusion layer 15, a junction region 16 of the first conductive type diffusion layer 14 and the second conductive type diffusion layer 15 is arranged so that angle beta inside the junction region 16 formed by two adjacent sides in its planar shape is formed under 90 degrees.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a diode which can be used as, for example, a Zener diode.

[0002]

2. Description of the Related Art A conventional planar Zener diode is
For example, it has the structure shown in the layout diagram of FIG. 7 and the sectional view of FIG.

That is, an element forming region 52 is provided on the p-type substrate 50 by the LOCOS oxide film 51, and an n well 53 is formed in the element forming region 52. In the element formation region 52, the first conductivity type (n ⁺ type) diffusion layer 5 is formed.
4 is formed, and the n ⁺ -type diffusion layer 54 is provided with a region (hereinafter, referred to as a rectangular region) 54a which is substantially rectangular in plan view and in which n ⁺ -type impurities are not implanted. In addition, the rectangular area 54
A second conductivity type (p ⁺ -type) diffusion layer 55 having a substantially rectangular shape in plan view and having a larger area than the rectangular region 54a in plan view is formed at the formation position of a. Then, the planar pn junction region 56 obtained by removing the rectangular region 54a from the p ⁺ type diffusion layer 55 is used.
Are formed to form a Zener diode.

[0004]

By the way, in the junction region 56 of the Zener diode as shown in FIG.
The angle α of the corner 56a of the ⁺ type diffusion layer 54 on the rectangular region 54a side is an obtuse angle. The angle α of the corner portion 56a referred to here is an angle in the joining region 56 formed by two adjacent sides in the planar shape of the joining region 56 and an angle on the side of the rectangular region 54a.

However, since the angle α of the corner 56a is an obtuse angle, the profile of the impurity concentration becomes steep near the corner 56a of the junction region 56. Therefore, when a reverse bias is applied to the Zener diode, leak current concentrates on the corner 56a. Then, due to the concentration of the leak current, there arises a reliability problem that the withstand voltage is lowered as the Zener diode is used.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a diode capable of preventing the concentration of leak current in a junction region when a reverse bias is applied.

[0007]

The present invention is a diode formed by joining a first conductive type diffusion layer and a second conductive type diffusion layer. In such a diode, the junction region between the first-conductivity-type diffusion layer and the second-conductivity-type diffusion layer is formed such that the angle in the joint region formed by two adjacent sides in the plan view is 90 degrees or less. Like

[0008]

In the present invention, the joint area has an angle in the joint area of two adjacent sides of 90 degrees or less. Therefore, the profile of the impurity concentration does not become sharp near the corner formed by the two adjacent sides of the junction region.

[0009]

Embodiments of the diode according to the present invention will be described below with reference to the drawings. 1 is a layout diagram showing an example of the present invention, and FIG. 2 is a sectional view taken along the line AA1 in FIG.

Reference numeral 10 in the drawing denotes a p-type substrate, and an element formation region 12 is formed on the p-type substrate 10 by a LOCOS oxide film 11 as in the conventional case. An n well 13 is formed in the element forming region 12. Further, in the element formation region 12, the first conductivity type (n
^{The (+} type) diffusion layer 14 and the second conductivity type (p ⁺ type) diffusion layer 15 are formed so as to partially overlap with each other to form a pn junction region 16.

A feature of the present invention is that the joining region 16 is formed in a state where the angle β in the joining region 16 formed by two adjacent sides in the plan view is 90 degrees or less. Is. That is, the angles β of the corners 16a formed in the bonding area 16 are all 9
The point is that it is formed at 0 degrees or less.

In this embodiment, for example, the n ⁺ type diffusion layer 14 is used.
Is formed in the element forming region 12 having a region (hereinafter, referred to as a rectangular region) 14a which is substantially rectangular in plan view and in which n ⁺ type impurities are not implanted. The p ⁺ type diffusion layer 15 is formed in a substantially rectangular shape in plan view at the position where the rectangular region 14a is formed.

At this time, the p ⁺ type diffusion layer 15 is formed so that the area of its planar shape is at least approximately equal to that of the rectangular region 14a. Further, p ⁺ type diffusion layer 15
Is formed in a state in which the rectangular area 14a is rotated by about 45 degrees about the center of the rectangular area 14a. Therefore, the joining region 16 having a substantially triangular shape in plan view is formed, and the angle β of the corner portion 16a in the joining region 16 is 90 degrees or less.

In the Zener diode having the above structure, the angle β of the corner 16a of the junction region 16 is formed to be 90 degrees or less. Therefore, the profile of the impurity concentration does not become steep near the corner 16a of the junction region 16,
It is possible to avoid concentration of the leak current near the corner 16a when the reverse bias is applied. Therefore, it is possible to prevent the breakdown voltage from being lowered when the zener diode is used for a long period of time, resulting in a Zener diode having improved reliability.

Next, a method of forming the Zener diode of the above-mentioned embodiment will be described with reference to the process charts shown in (No. 1) of FIG. 3 and (No. 2) of FIG. 3 and 4, (a) is a sectional view and (b) is a plan view.

First, as shown in (a) and (b) of FIG. 3A, a LOCOS oxide film 11 is formed on the p-type substrate 10 so as to surround the element formation region 12 by the LOCOS method. Then, after forming a first resist film (not shown) on the p-type substrate 10, the first resist film is patterned by lithography and etching. Then, for example, phosphorus (P) is ion-implanted using the first resist film as a mask to form the n-well 13 in the element formation region 12. Then, the first resist film is removed.

Next, as shown in (a) and (b) of FIG. 3B, after forming a second resist film 17 on the p-type substrate 10, the second resist film 17 is subjected to lithography and etching. Pattern by.

Next, using the second resist film 17 as a mask, for example, P is ion-implanted to form the n ⁺ -type diffusion layer 14 in the element forming region 12 with the rectangular region 14a.
By forming the n ⁺ type diffusion layer 14 with the rectangular region 14a provided, the angle γ of the corner 14b on the rectangular region 14 side of the n ⁺ type diffusion layer 14 becomes an obtuse angle. Then, the second cyst film 17 is removed.

Subsequently, as shown in (a) and (b) of FIG. 4C, after forming a third resist film 18 on the p-type substrate 10, the third resist film 18 is subjected to lithography and etching. Pattern by. Then, the resist film 18 at the position of the rectangular region 14 of the n ⁺ type diffusion layer 14 is provided with an opening 18a having a substantially rectangular shape in plan view. At that time, the opening 18a is formed in a state where the planar shape has at least an area approximately equal to that of the rectangular region 14a. Further, the opening 18a is formed in a state in which the rectangular area 14a is rotated about 45 degrees about the center of the rectangular area 14a.

That is, the rectangular region 14 of the n ⁺ type diffusion layer 14
Since the angle γ of the side corner 14b is an obtuse angle, this corner 1
A pattern of the third resist film 18 is formed so as to cover the portion 4b.

Then, boron (B), for example, is ion-implanted using the third resist film 18 as a mask. Then, in the rectangular region 14 position of the n ⁺ type diffusion layer 14 of the element forming region 12,
The p ⁺ -type diffusion layer 15 having a substantially rectangular shape in plan view is formed in a state in which the rectangular region 14a is rotated about 45 degrees about the center of the rectangular region 14a. After that, the third cyst film 18 is removed.

Through the above steps, as shown in (a) and (b) of FIG. 4D, the joint region 16 having a substantially triangular shape in plan view, in which the angle β of the corner 16a is 90 degrees or less, is formed. To be done. Even if a reverse bias is applied, the corner 16
It is possible to obtain a Zener diode with improved reliability in which leakage current does not concentrate near a.

By the way, when the wiring is provided on the p-type substrate 10 in which the junction region 16 is formed in this way, it can be formed as shown in the sectional view of FIG. 5, for example. That is,
First, the interlayer film 19 is deposited on the entire surface of the p-type substrate 10 by, for example, a chemical vapor deposition method. Then, the n ⁺ -type diffusion layer 14 and p
Contact holes 20 reaching the ⁺ type diffusion layer 15 are formed.

Then, for example, by a sputtering method,
A conductive material is formed on the interlayer film 19 in a state of filling the contact hole 20. A general wiring material such as aluminum (Al) is used as the conductive material. And
The conductive film is patterned by lithography and etching to form the wiring 21.

Further, in the above embodiment, the case where the bonding region 16 is formed in a substantially triangular shape in plan view has been described. However, the angle β of the corner 16a in the joining region 16 is 90
It is possible to form the joining region 26 as in the modification shown in FIG.

That is, in the element forming region 12, the n ⁺
The first conductivity type (n ⁺ type) diffusion layer 24 similar to the type diffusion layer 14
Are formed. Therefore, the n ⁺ type diffusion layer 24 has a rectangular region 24a, and the angle θ of the corner portion 24b on the rectangular region 24a side is formed as an obtuse angle. A second conductivity type (p ⁺ type) diffusion layer 25 is formed in a substantially cross shape in a plan view at the formation position of the rectangular region 24a.

At this time, in a plan view, the p ⁺ -type diffusion layer 25 is formed in a state in which each tip end of the cross shape is arranged at a position where the corner portion 24b of the n ⁺ -type diffusion layer 24 is removed. . Further, each cross-shaped tip side is formed so as to overlap the n ⁺ type diffusion layer 24. Therefore, the joining region 26 having a substantially rectangular shape in plan view is formed, and the corner portion 2 in the joining region 26 is formed.
The angle φ of 6a is 90 degrees or less.

Even in the Zener diode having the above structure, since the angle φ of the corner 26a of the junction region 26 is 90 degrees or less, the profile of the impurity concentration does not become sharp near the corner 26a of the junction region 26. Therefore, the zener diode has improved reliability in which the withstand voltage does not decrease even if it is used for a long period of time.

In the above-mentioned embodiments and modified examples, the first conductivity type diffusion layers 14 and 24 are of n ⁺ type and the second conductivity type diffusion layers 15 and 25 are of p ⁺ type, but the present invention is not limited to this case.
For example, if the first conductivity type diffusion layers 14 and 24 are p ⁺ type,
The conductivity type diffusion layers 15 and 25 may be of n ⁺ type.

Further, in the above-mentioned embodiments and modified examples, the case where the first conductive type diffusion layers 14 and 24 and the second conductive type diffusion layers 15 and 25 are provided in the lateral direction to each other has been described. However, it goes without saying that the present invention can be applied to a bipolar type structure in which the first conductive type diffusion layers 14 and 24 and the second conductive type diffusion layers 15 and 25 are provided in the vertical direction.

[0031]

As described above, in the diode of the present invention, the junction region is formed such that the angle formed in the junction region by two adjacent sides is 90 degrees or less. For this reason, the profile of the impurity concentration does not become steep in the vicinity of the corner formed by the two adjacent sides of the junction region, so that the concentration of leak current when reverse bias is applied can be avoided. Therefore, it is possible to prevent the breakdown voltage from being lowered when the diode is used for a long period of time, and it is possible to realize a diode with improved reliability.

[Brief description of drawings]

FIG. 1 is a layout diagram showing an example of the present invention.

FIG. 2 is a sectional view taken along the line AA1 in FIG.

FIG. 3 is a process drawing (1) showing the forming method of the example of the present invention.

FIG. 4 is a process diagram (2) showing the forming method of the example of the present invention.

FIG. 5 is a cross-sectional view showing an example of forming wiring.

FIG. 6 is a layout diagram showing a modified example of the shape of the joining region.

FIG. 7 is a layout diagram showing a conventional example of a Zener diode.

8 is a sectional view taken along line BB1 in FIG.

[Explanation of symbols]

14, 24 First conductivity type (n ⁺ type) diffusion layer 15, 25 Second conductivity type (p ⁺ type) diffusion layer 16, 26 Junction region

Claims (1)

[Claims] 1. A junction region between the first conductivity type diffusion layer and the second conductivity type diffusion layer, wherein the junction region between the first conductivity type diffusion layer and the second conductivity type diffusion layer is formed. The diode in which the angle formed by the two adjacent sides in the plane shape is 90 degrees or less in the junction region.