JPH0837162A - Method and apparatus for ion implantation - Google Patents

Abstract

PURPOSE:To reduce the number of ion implantation processes used to form symmetric ion-implanted regions and to lower production costs by adjusting the cross-sectional intensity distribution of an ion beam regarding an ion implantation method and an ion implantation apparatus. CONSTITUTION:The cross-sectional intensity distribution of an ion beam is adjusted in such a way that the intensity of the beam in the central part is small and that the intensity of the beam in the beam peripheral part is large. The ion beam is endowed with a desired spread angle theta with reference to a semiconductor substrate 1. A gate electrode 4 which is installed on the surface of the semiconductor substrate 1 is used as a mask, ions are implanted from directions 5, at a tilt angle of 0 deg. with reference to the normal line of the semiconductor substrate 1, and symmetric lightly doped regions 6 are formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ion implantation method and an ion implantation apparatus used therefor, and in particular, the number of manufacturing steps of a semiconductor device having an impurity region having a symmetrical structure by adjusting a cross-sectional intensity distribution of an ion beam. The present invention relates to an ion implantation method and an ion implantation apparatus capable of reducing the amount of impurities.

[0002]

2. Description of the Related Art Ion implantation is an indispensable means as a means for introducing an impurity element into a semiconductor substrate along with a vapor phase diffusion method or a solid phase diffusion method, but the ion implantation method is a vapor phase diffusion method or a solid phase diffusion method. Compared with the phase diffusion method, it is superior in controllability of the impurity implantation amount (dose amount) and the impurity implantation depth, so that it is used especially in the manufacturing process of a highly integrated semiconductor device.

Ions used for ion implantation are designated by passing through a mass analysis slit (Mass Resolving Slit) after accelerating a solid or gas ion source into plasma in an ion source and accelerating it. The semiconductor substrate is injected along the injection angle.

The ion implantation apparatus is roughly classified into a high current apparatus and a medium current apparatus according to the dose amount used. Further, the medium current apparatus is divided into a non-parallel machine and a parallel machine depending on the method of irradiating the semiconductor substrate with ions. .

Among them, in the case of a non-parallel machine, ions are implanted into the entire surface of the semiconductor substrate by electrostatically scanning in the directions orthogonal to each other, that is, usually in the direction parallel to the orientation flat and the direction perpendicular thereto. To do.

In the case of a parallel machine, when the ions are mass-separated and then scanned by the scanning mechanism,
The direction of the ion beam is corrected by passing through the scanning mechanism and then through the angle collector, and scanning is performed in parallel on the surface of the semiconductor substrate, but since the structure is generally more complicated than non-parallel machines, There is a drawback that the device price is high.

On the other hand, as the degree of integration and miniaturization of semiconductor integrated circuits progresses, the problem of hot carriers has begun to be noticed in, for example, MOS transistors, and a so-called LD is used as a solution to alleviate the electric field near the drain.
The D (Lightly Doped Drain) structure was adopted.

In this LDD structure, a region having a low impurity concentration, that is, a region having a low carrier concentration is provided at the end of the diffusion region near the drain where a high electric field is likely to occur, and the electric field is relaxed in this portion. Usually, a region having a low carrier concentration is also formed on the source region side at the same time.

When the LDD structure is formed by using the gate structure as a mask using a non-parallel machine, the ion implantation angle is different between the peripheral portion and the central portion of the semiconductor substrate, and the ion implantation angle is different in the peripheral portion of the semiconductor substrate having a large implantation angle. Since the two-dimensional distribution is different on the left and right, the manufactured MOS transistor has drawbacks such as asymmetric IV characteristics and variations in device life.

In order to improve this drawback, a parallel machine is used to form an LDD structure in the related art, and first, as shown in FIG. 7, a gate structure consisting of a gate insulating film 3 and a gate electrode 4 is used as a mask. When implanting ions into the Si semiconductor substrate 1, the tilt angle (angle formed by the normal to the semiconductor substrate 1 and the ion implantation direction 5) is set to about 7 ° to prevent so-called channeling, and the source / drain regions are The low impurity concentration region 6 forming the LDD region was formed by ion implantation twice from the left and right sides of the gate structure so as to be bilaterally symmetric (FIGS. 7A to 7C).

In this case, in an actual semiconductor wafer, the gate electrodes 4 are not formed so as to be aligned only in one direction, and therefore, in order to maintain symmetry in all the devices, the first left and right implantation directions should be set. The ion implantation is also performed from the second left and right implantation directions selected so that the angle formed by is 90 °, that is, the twist angle is 90 °, and ion implantation is performed from a total of 4 directions (Fig. (Not shown).

Next, after forming the side wall 7 on the side surface of the gate electrode 4, impurity ions are implanted using the gate structure including the side wall 7 as a mask to form the source / drain regions 8 [FIG. d) to (f)].

[0013]

However, the MOS
In the manufacturing process of the semiconductor integrated circuit device including the FET, it is necessary to use the parallel machine in order to form the LDD structure, although it is not necessary to use the parallel machine with high device cost in most of the steps. And, because it is necessary to perform four-direction injection that changes the twist angle four times,
There is a problem that the number of manufacturing processes increases, that is, a problem that manufacturing cost rises and a device price rises.

Therefore, according to the present invention, a manufacturing process of a semiconductor device having a symmetric impurity region without using a parallel machine having a high device cost or even when the tilt angle is set to other than 0 ° by using the parallel machine. The purpose is to reduce the number.

[0015]

According to the present invention, the cross-sectional intensity distribution of an ion beam is made small at the beam central portion and large at the beam peripheral portion (see FIG. 2), and the ion beam is applied to a non-irradiated body. The feature is that ion implantation is performed with a desired spread angle.

The present invention also provides a semiconductor substrate (1 in FIG. 1).
At least one convex structure (3 in FIG. 1) provided on the surface.
4) is used as a mask, and ions are implanted into the semiconductor substrate by using an ion beam having the above-mentioned cross-sectional intensity distribution.

Further, the present invention is an ion implantation apparatus or an ion source having an ion beam shaping section in which a quadrupole [10 in FIG. 3 (a)] is installed at a position after the ion beam has passed through the acceleration tube. The ion implanter having an ion beam forming section having two or more ion outlets [20, 21 in FIG. 5] from [13 in FIG. 5] is also characterized.

[0018]

In the present invention, an ion beam is used which has a cross-sectional intensity distribution such that the beam intensity in the central portion is small and the beam intensity in the peripheral portion is large, and has a divergence with respect to the non-irradiated body. Therefore, two components of 7 ° and −7 ° are ion-implanted even when the tilt angle is 0 °.

In particular, in the case of forming an impurity region that requires left-right symmetry, particularly when forming an LDD structure, ion implantation is performed twice from one side of the gate structure by performing implantation along one direction. As a result, the number of steps required in the conventional four-direction implantation can be reduced to two as a whole.

Further, in the ion implantation apparatus having the ion beam shaping section in which the quadrupole is installed, the cross-sectional intensity distribution of the ion beam is made small at the beam center by using the magnetic field formed by the quadrupole, and It is formed so that it becomes large in the peripheral portion of the beam.

Further, in an ion implantation apparatus having an ion beam shaping section having two or more ion extraction ports according to the required cross-sectional shape of the ion beam, the cross-sectional intensity distribution of the ion beam can be changed by the arrangement structure of the ion extraction ports. It is formed so that it is small at the center of the beam and large at the periphery of the beam. For example, when a large number of ion extraction ports are arranged at equal intervals on the circumference, it has a concentric cross-sectional strength distribution. An ion beam is obtained.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an LDD structure MO according to an embodiment of the present invention.
FIG. 3C is a diagram showing a manufacturing process of a highly integrated semiconductor integrated circuit device including an SFET as a constituent element, and particularly showing an ion implantation process for forming an LDD structure.

First, after forming the field oxide film 2 on the Si semiconductor substrate 1, the field oxide film 2 in the element formation region is formed.
Is removed to form the gate insulating film 3 in the removed portion, and then,
A gate electrode 4 is formed by depositing and patterning a high-melting point metal such as polycrystalline Si or W to be a gate electrode, a high-melting point metal silicide, or a multilayer laminated film of the above conductive films such as polycide.

When performing ion implantation to form a laterally symmetrical LDD structure having a low impurity concentration in this semiconductor substrate 1, the beam intensity of the central portion shown in FIGS. Ion implantation is performed using an ion beam that is small and has a cross-sectional intensity distribution in which the beam intensity in the peripheral portion is large, the central axis of the beam is perpendicular to the semiconductor substrate 1, and the divergence angle θ is 14 °. .

When the tilt angle of an ion beam having a divergence angle θ of 14 ° is set to 0 °, the beam intensity at the central portion is very low, and therefore 2 ° of 7 ° and −7 ° with respect to the tilt angle.
Since the component 5 becomes dominant and the ion beams injected in a series of scanning steps overlap,
As a result, the two components 5 of 7 ° and -7 ° are ion-implanted into the semiconductor substrate 1 from the left and right.

Therefore, for the MOSFET group in which the gate electrodes are aligned in the first direction, the first ion implantation step can form the low impurity concentration region 6 which is bilaterally symmetrical with respect to the gate electrode 4. 1 (a)-
(B)]. The divergence angle θ is not limited to 14 °, but may be in the range of 0 ° <θ ≦ 14 °.

Next, the semiconductor substrate 1 is rotated in order to form the symmetrical low impurity concentration region 6 with respect to the MOSFET group in which the gate electrodes are aligned in the second direction different from the first direction. A second ion implantation is performed along the second direction as described above (not shown).

The rotation angle of the semiconductor substrate 1 in this case, that is,
The twist angle depends on the dose amount and the second dose in the first ion implantation.
Is set in the range of 45 ° to 135 ° by controlling the dose amount in the ion implantation of 1), and the twist angle is set when the dose amount of the first ion implantation is equal to the dose amount of the second ion implantation. Set to 90 °.

The above-mentioned two times of ion implantation conditions are
1 x 10¹²cm^-2~ 1 × 10 ¹⁴cm^-2And then accelerate
The energy of each ion species is P⁺2 keV ~
10 keV, As⁺In the case of, 2 keV to 10 keV, B
F₂ ⁺In the case of 5 keV to 15 keV, B⁺In case of 2
It was set to keV to 6 keV.

Next, a sidewall 7 is formed on the side portion of the gate electrode by depositing a CVD insulating film and subsequent anisotropic etching, and then a third ion implantation is performed using this sidewall 7 as a mask to form a high ion beam. A source / drain region 8 having an impurity concentration is formed [FIG.
(E)].

The ion beam used for carrying out the present invention is not limited to the ion beam having the cross-sectional intensity distribution as shown in FIG. 3, and the ion density is low at the central portion as shown in FIG. Alternatively, an ion beam having a concentric cross-sectional intensity distribution with a high ion density in the peripheral portion may be used.

When the ion beam shown in FIG. 4 is used, the cross-sectional intensity distribution has very good symmetry, so that the unidirectional implantation is performed without rotating the semiconductor substrate 1 in the first direction. It is possible to form a low impurity concentration region 6 which is bilaterally symmetric with respect to all the MOSFETs whose gate electrodes are arranged in two directions different from the second direction.

Now, a method of forming an ion beam having a cross-sectional intensity distribution used for carrying out the present invention and an embodiment of an ion implantation apparatus for forming the same will be described. FIG. 6 is a schematic view of an ion implantation apparatus used for carrying out the present invention.
(A) and FIG. 5 are views showing a first embodiment and a second embodiment of the ion beam shaping section provided in the ion implantation apparatus, respectively.

The ion implanter used in the embodiment of the present invention shown in FIG. 6 is an ion source 13, an analyzer magnet 24, an aperture 25, a slit 26, an accelerating tube 27, and Y.
Scan plate 28 and X scan plate 29
(1 is a semiconductor substrate, 22 is a vacuum chamber, and 23 is an ion beam) Is an ion beam shaping unit 30 having a quadrupole installed instead of the Q lens provided at the exit of the acceleration tube 27 of the ordinary ion implantation apparatus? Alternatively, as the manipulator (ion extraction port) provided in the vicinity of the ion source 13, the ion beam shaping section 31 provided with two or more ion extraction ports arranged according to the beam shape to be obtained is installed. Although both are illustrated for convenience in FIG. 6, only one of them is actually provided.

Next, FIG. 3 (a) is a diagram showing a first embodiment of the ion beam shaping section of the ion implantation apparatus used in the present invention, in which the quadruples symmetrically attached to the beam line 9 are shown. The ion beam shaping unit having the pole 10 is installed at a position after the ion beam has passed through the accelerating tube, and the cross-sectional intensity distribution 12 of the ion beam is controlled by the magnetic field (11 is a magnetic field line) of the quadrupole 10. Fig. 3 (b)
The cross-sectional strength distribution having the bimodal characteristics shown in FIG.

FIG. 5 is a diagram showing a second embodiment of the ion beam shaping section of the ion implantation apparatus used in the present invention. The ion beam shaping section provided with a plurality of ion extraction ports is used for introducing gas. Mouth 14, vaporizer 15, arc chamber 16, positive electrode 17, negative electrode 18, and
The ion source 13 composed of the filament 19 is provided with two ion outlets 20 and 21.

For example, when an ion source is put in the vaporizer 15, a carrier gas such as argon is introduced from the gas inlet 14 and the ion source from the vaporizer 15 is ionized in the arc chamber 16 for ionization. The extracted ions are extracted from the ion extraction ports 20 and 21 as an ion beam having a predetermined cross-sectional intensity distribution.

When BF ₃ is used, without using the vaporizer 15, BF ₃ is introduced from the gas inlet 14 and ionized in the arc chamber 16 to produce BF _2.
⁺ Is generated and extracted from the ion extraction ports 20 and 21 as a BF ₂ ⁺ ion beam having a predetermined cross-sectional intensity distribution.

In the description of the second embodiment of the ion beam shaping section of the ion implantation apparatus shown in FIG. 5, although there are two ion extraction ports, a large number of ion extraction ports can be used depending on the required cross-sectional strength distribution. An ion outlet may be provided,
Ion beams having various sectional intensity distributions can be obtained by the arrangement structure of the ion outlets. For example, if the ion outlets are arranged on the circumference, the ion beam having the concentric sectional intensity distribution shown in FIG. Is obtained.

In the above embodiment, the case of using the high current ion implanter has been described, but the present invention is not limited to this, and the ion beam forming unit of the present invention can be applied to a parallel machine which is a medium current ion implanter. May be provided to form an ion beam having the cross-sectional intensity distribution as described above, and the ion implantation may be performed.

Further, in the ion beam shaping section shown in FIG. 3, the ion beam is shaped using a magnetic field.
It may be molded by using an electric field, or may be molded by both a magnetic field and an electric field by combining a plurality of pairs of quadrupoles.

Further, the embodiment of the above-mentioned ion implantation method is L
Although the manufacturing process of the DDD structure has been described, the present invention is not limited to this.
ET manufacturing process or MOSF with symmetrical DSA structure
MOS having a single source / drain region that requires a manufacturing process of the base region of ET or a high degree of symmetry
It also covers the manufacturing process of the FET.

In the above embodiment, the Si semiconductor is used as the semiconductor substrate, but the present invention is not limited to this. The present invention is also applicable to other semiconductor substrates such as III-V group compound semiconductors. To do.

[0044]

According to the present invention, by adjusting the cross-sectional intensity distribution of the ion beam so that the beam intensity in the central portion is small and the beam intensity in the peripheral portion is large, a parallel machine with a high apparatus cost can be obtained. Since the LDD structure can be produced without using it, or even if a parallel machine is used, the number of steps can be reduced, so that the manufacturing cost can be reduced.

[Brief description of drawings]

FIG. 1 is an example of an ion implantation method of the present invention, MO
It is a figure which shows the manufacturing process for forming the LDD structure of SFET.

FIG. 2 is a diagram showing an intensity distribution of an ion beam used for implementing the present invention.

FIG. 3 is a diagram showing a first embodiment of an ion beam shaping section in the ion implantation apparatus of the present invention and an intensity distribution of a first ion beam formed thereby.

FIG. 4 is a diagram showing an intensity distribution of a second ion beam used for implementing the present invention.

FIG. 5 is a diagram showing a second embodiment of the ion beam shaping unit in the ion implantation apparatus of the present invention.

FIG. 6 is a schematic view of an ion implantation apparatus used for implementing the present invention.

FIG. 7 is a diagram showing an ion implantation process for forming an LDD structure of a conventional MOSFET.

[Explanation of symbols]

1 semiconductor substrate 2 field oxide film 3 gate insulating film 4 gate electrode 5 ion implantation direction 6 low impurity concentration region 7 sidewall 8 source / drain region 9 beam line 10 quadrupole 11 magnetic field line 12 ion beam cross-sectional intensity distribution 13 ion source 14 Gas Inlet 15 Vaporizer 16 Arc Chamber 17 Positive Electrode 18 Negative Electrode 19 Filament 20 First Ion Outlet 21 Second Ion Outlet 22 Vacuum Chamber 23 Ion Beam 24 Analyzer Magnet 25 Aperture 26 Slit 27 Accelerator 28 Y Scan plate 29 X Scan plate 30 Ion beam shaping unit having a quadrupole 312 Ion beam shaping unit provided with two or more ion extraction ports

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H01L 29/78 301 L 301P

Claims (11)

[Claims] 1. Ion implantation, characterized in that the cross-sectional intensity distribution of an ion beam is made small at the beam center and made large at the beam periphery so that the ion beam has a desired divergence angle with respect to a non-irradiated body. Method. 2. The non-irradiation body is a semiconductor substrate, and ions are implanted into the semiconductor substrate using at least one convex structure formed on the surface of the semiconductor substrate as a mask. The ion implantation method described. 3. The ion implantation method according to claim 2, wherein the spread angle θ is 0 ° <θ ≦ 14 °. 4. The ion according to claim 1, wherein the ion implantation is performed along at least two directions, and an angle formed by the two directions is 45 ° to 135 °. Injection method. 5. The dose of one ion implantation in the ion implantation is 1 × 10 ¹² cm ⁻² to 1 × 10 ¹⁴ cm ⁻² , and the acceleration energy and the ion species are 2 keV to 10 k.
eV P ⁺ , ² keV to 10 keV As ⁺ , 5 keV
5. The ion implantation method according to claim 1, wherein the ion implantation method is any one of BF ₂ ⁺ of ˜15 keV and B ⁺ of ₂ keV to 6 keV. 6. The ion implantation method according to claim 2, wherein the convex structure is a gate electrode of a transistor. 7. The ion implantation is ion implantation for forming the low impurity concentration region portion of a source / drain region having a high impurity concentration region portion and a low impurity concentration region portion of the transistor. The ion implantation method according to claim 6. 8. After forming a low impurity concentration region portion of the source / drain region, a sidewall is formed on a side portion of the gate electrode, and the ion implantation is further performed using the sidewall and the gate electrode as a mask. 8. The ion according to claim 7, further comprising the step of implanting ions having a higher dose amount than when forming the low impurity concentration region portion to form the high impurity concentration region portion of the source / drain region. Injection method. 9. The ion implantation method according to claim 1, wherein the cross-sectional intensity distribution of the ion beam is concentric. 10. A quadrupole is installed at a position after the ion beam has passed through an accelerating tube, and a magnetic field formed by the quadrupole is used to reduce the cross-sectional intensity distribution of the ion beam at the beam central portion, and An ion implantation apparatus, characterized in that the ion beam is made larger at the periphery of the beam, and the ion beam has a divergence angle. 11. An ion outlet from the ion source is 2
An ion implantation apparatus characterized in that the cross-sectional intensity distribution of the ion beam is made smaller at the beam central portion and larger at the beam peripheral portion by providing one or more, and the ion beam has a divergence angle.