JPH0834760B2 - Flat display device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat display such as a liquid crystal display device, and more particularly to an active matrix type flat display in which each display element is provided with an active element.

[Background of the Invention]

In recent years, there has been a great deal of research on this type of display.
For example, Nikkei Electronics September 11, 1984 issue 211
As described on the page.

Such a display has a structure in which drive wirings and signal wirings are arranged in a matrix, and each display element arranged in each region surrounded by each wiring is driven by individual active elements for switching driving. Therefore, when the active element is switched on, the image information is displayed on the display element, and when the active element is switched off, the information is held.

However, since the flat display having such a structure has one thin film transistor for one display element, if the ON current of the thin film transistor is insufficient, a black dot defect appears on the display image of the display element. If it occurs and the off-current is large, a white spot defect occurs.

Further, in a thin film transistor using polysilicon as an active layer as an active element as disclosed in Japanese Patent Application Laid-Open No. 58-171860, in order to prevent a leak current at a grain boundary, a plurality of transistors are provided with gates thereof. Although they are connected in series in common, they are not intended for redundancy. Therefore, when the off-current of one of the transistors becomes large, there is a drawback that white spot defects occur. Other known examples include JP-A-55-530 and JP-A-56-77887.
No. 58, JP-A-58-143377, JP-A-58-144888, JP-A-SHO
59-15282, JP-A-59-57217, JP-A-59-81621
JP-A-59-188283 and JP-A-60-169837, all of which describe the structure in which the gates of all thin film transistors in one pixel are connected to one drive wiring corresponding to the pixel. There is no. Japanese Unexamined Patent Publication No. 60-26991 does not describe the use of a plurality of thin film transistors having active layers separated in a switch element. As a prior application, there is JP-A-61-292683, but there is no description of a thin film transistor configured so that an electric field is generated in the active layer by the signal wiring in a direction perpendicular to the longitudinal direction of the active layer. JP-A-61-67095, JP-A-61-121034 and JP-A-61-290490 disclose a structure in which the gates of a plurality of thin film transistors in one pixel are connected to one drive wiring corresponding to the pixel. Is not stated.

[Object of the Invention]

The present invention has been made to solve the above-mentioned problems of the prior art, and an object of the present invention is to prevent the occurrence of a black dot defect due to a shortage of the ON current of a thin film transistor and prevent the occurrence of a pixel defect. It is to provide a possible flat display.

Another object of the present invention is to provide a flat display capable of preventing the occurrence of a white spot defect due to a large off current of a thin film transistor and the occurrence of a pixel defect.

[Outline of Invention]

According to one embodiment of the present invention, by connecting a plurality of thin film transistors to one display element, a flat display in which the active element circuit has redundancy is provided.

Example of Invention

 Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit configuration diagram showing an active matrix type flat display. In the figure, 1 is a drive wiring, 2 is a signal wiring, 3 is a thin film transistor (hereinafter referred to as a transistor) as an active element, 4 is a display element such as a liquid crystal display element or an EL (electro luminescence), The transistor 3 and the display element 4 constitute one pixel 5.

In the flat display according to the present invention, as shown in FIG. 2, each pixel 5'connects the first transistor 3a and the second transistor 3b in parallel between the drive wiring 1, the signal wiring 2 and the display element 4. Is configured.

According to such a configuration, even if one of the first transistor 3a and the second transistor 3b, which drive the display element 4 by switching, has a defect that the on-current is small, the other one supplies the on-current. Therefore, the black dot defect does not occur.

Calculating the probability of defective black spots, a flat display having 1000 × 1000 pixels usually has about 10 defective black spots and is not a good product. Here, when the transistors are connected in parallel as described above, the number of defective transistors whose on-state current is small is 20, and the probability that they are gathered on the same pixel surface is the probability that a pixel becomes a black dot. give.

20 (pieces) × 19 ÷ (2 × 10 ⁶ ) = 1.9 × 10 ⁻⁴ That is, the yield for black dot pixels is calculated to be about 99.98%, which is extremely effective.

FIG. 3 is a plan configuration diagram showing a specific example in which the transistors described in FIG. 2 are connected in parallel, and the same reference numerals as those in the above-mentioned figures indicate the same parts. In the same figure, transistors 3a and 3b to which source electrodes 7a and 7b are connected are formed respectively on two sides where the drive wiring 1 and the signal wiring 2 intersect, and the source electrodes 7a and 7b are connected to the source electrodes. 7a and 7b are formed by being connected in parallel to the pixel electrode 8 of the display element. The transistors 3a and 3b thus formed are configured such that an electric field is generated by the signal line 2 in a direction perpendicular to the longitudinal direction of the active layers 6a and 6b, and the on-current is controlled by the drive line 1. . Further, as shown in FIG. 3, a part of the signal wiring 2 is provided so as to overlap the driving wiring 1 with the active layers 6a and 6b interposed therebetween.

FIG. 4 is a circuit configuration diagram showing another embodiment of the present invention. In the flat display shown in the figure, each pixel 5 ″ has a first transistor 3a and a second transistor 3b.
And are connected in series.

With such a configuration, even if a defect in which the off-current of the first transistor 3a or the second transistor 3b becomes large is generated, the other transistors connected in series guarantee the off-characteristics. Can be prevented.

FIG. 5 is a plan configuration diagram showing a concrete example in which the transistors described in FIG. 4 are connected in series. In FIG. 5, amorphous silicon is used as an active layer 6a between the signal line 2 and the pixel electrode 8. The first transistor 3a and the second transistor 3b, which are 6b, are formed by being connected in series.

FIG. 6 is a circuit configuration diagram showing still another embodiment of the present invention. In the flat display shown in the figure, each pixel 5 has a first transistor 3a and a second transistor 3b connected in series, and a third transistor 3c.
And a fourth transistor 3d are connected in parallel. That is, four transistors 3a, 3b, 3c, 3d are connected in series.

With such a configuration, the first transistor 3a and the second transistor 3b connected in series can prevent the occurrence of a white dot defect, and the third transistor connected in parallel can be used.
Occurrence of a black dot defect can be prevented by 3c and the fourth transistor 3d. That is, it is possible to simultaneously prevent the occurrence of white spot and black spot defects.

FIG. 7 is a plan configuration diagram showing a specific example in which the transistors described in FIG. 6 are connected in series and parallel. In FIG.
Two sets of transistors 3a, 3b and 3c, 3d are connected by intermediate electrodes 9a, 9b on two sides where the drive wiring 1 and the signal wiring 2 intersect with each other, and are connected in series and parallel to the pixel electrode 8.

In addition, in the above-described embodiment, the case where the thin film transistor having amorphous silicon as an active layer is used as the active element has been described, but the same effect can be obtained by using a thin layer transistor having polysilicon as an active layer. Of course.

〔The invention's effect〕

As described above, according to the present invention, by providing a plurality of switching transistors in one pixel of a display element, it is possible to prevent pixel defects such as white spot defects and black spot defects due to transistor defects. It has an extremely excellent effect such as obtaining a high-quality display image.

As shown in FIG. 3, since two thin film transistors having separate active layers are used, there is no active layer between the two thin film transistors, and the photocurrent generated by light irradiation can be reduced. .

Further, as shown in FIG. 3, the gates of all the thin film transistors in one pixel are connected to one drive wiring corresponding to the pixel, and the active layers of all the thin film transistors in the pixel correspond to the pixel. Even if a plurality of thin film transistors are provided in one pixel by connecting to one signal wiring, the aperture ratio is not damaged.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing an active matrix type flat display, and FIGS. 2 and 3 are main circuit diagrams, plan configuration diagrams, and FIG. 4 showing an embodiment of the flat display according to the present invention. FIG. 5 is a circuit diagram of a main part showing another embodiment of the present invention, a plan configuration diagram, and FIG. 6 and FIG. 7 are a circuit diagram of a main part showing another embodiment of the present invention. is there. 1 …… Drive wiring, 2 …… Signal wiring, 3,3a, 3b, 3c, 3d ……
Thin film transistor, 4 ... Display element, 5,5 ', 5 ", 5 ...
... Pixels, 6a, 6b ... Active layers, 7a, 7b ... Source electrodes, 8 ...
… Pixel electrodes, 9a, 9b …… Intermediate electrodes.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Mikio Takahashi 3300 Hayano, Mobara-shi, Chiba Hitachi Mobara factory (72) Inventor Hirofumi Kunito 3300 Hayano, Mobara-shi, Chiba Hitachi Mobara plant, Inc. (56) References JP-A-56-77887 (JP, A)

Claims (4)

[Claims] 1. A plurality of drive wirings and a plurality of signal wirings, wherein the plurality of drive wirings and the plurality of signal wirings are arranged in a matrix and surrounded by the plurality of drive wirings and the plurality of signal wirings. Pixels are formed in the respective individual regions, and each pixel has a display element and a switch element, and the switch element is composed of a plurality of thin film transistors whose active layers are separated, and The gate of the thin film transistor is connected to one of the drive wirings corresponding to the pixel, the active layers of the plurality of thin film transistors in one pixel are connected to one of the signal wirings corresponding to the pixel, respectively. Is configured such that an electric field is generated in the active layer by the signal wiring in a direction perpendicular to the longitudinal direction of the active layer. Spray equipment. 2. The flat display device as claimed in claim 1, wherein the active layer is made of amorphous silicon. 3. The flat display device according to claim 1, wherein the signal line is overlapped with the drive line across the active layer. 4. The flat display device according to claim 1, wherein the thin film transistor is provided in each of the branched portion of the drive wiring and the branched portion of the signal wiring.