JPH08329833A - Electron emitting element - Google Patents

Abstract

PURPOSE: To return the excessively heightened electron emission energy density into the design range by a self-control process when the emitter of an electron emitting element furnished with a disc-form emitter emits electrons with an energy density exceeding the design range. CONSTITUTION: A substrate 1, emitter wiring layer 2, insulating layer 3, and gate 4 are laminated one over another, wherein the gate 4 and insulative layer 3 are provided with an opening A attaining the emitter wiring layer 2, and on the layer 2 within the hole A, an emitter underlay layer 5 and an emitter 6 are installed in such a way that the gate 4 is not touched and that the peripheral part 6c of the emitter 6 protrudes toward the gate 4 from the underlay layer 5. Thus an electron emitting electrode of field emission type is accomplished, wherein the emitter 6 is composed of an emitter under-layer 6a and over-layer 6b, and the under-layer 6a is made of material having a smaller coefficient of thermal expansion that the over-layer 6b.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission type electron-emitting device which emits electrons by a strong electric field. More specifically, an FEA (Field Emitter Array) in the form of an array, which constitutes a flat display, as an electron generator or electron gun for an optical printer, an electron microscope, an electron beam exposure device, or the like, or as an ultra-small illumination source for an illumination lamp The present invention relates to an electron-emitting device useful as an electron source.

[0002]

2. Description of the Related Art Conventionally, a cathode ray tube has been widely used as an electronic display device. However, the cathode ray tube consumes a large amount of energy in order to emit thermoelectrons from the cathode of an electron gun, and has a large structure. There was a problem such as requiring a volume.

For this reason, there has been a demand for a flat-panel display in which cold electrons, rather than hot electrons, can be used to reduce energy consumption as a whole and the device itself is miniaturized. It is also strongly required to realize high-speed response and high resolution in such a flat panel display.

As a structure of such a flat-type display utilizing cold electrons, it is considered promising to arrange minute electron-emitting devices in an array in a high vacuum flat plate cell. And as an electron-emitting device used for that,
A field emission type electron-emitting device utilizing the field emission phenomenon has been attracting attention.

In the field emission type electron-emitting device, when the intensity of the electric field applied to the substance is increased, the width of the energy barrier on the surface of the substance is gradually narrowed according to the intensity, and the electric field intensity is 10%.
^When a strong electric field of ⁷ V / cm or more is reached, electrons in the substance can break through the energy barrier due to the tunnel effect, so that the substance emits electrons. In this case, since the electric field follows Poisson's equation, if a portion where the electric field is concentrated is formed in a member (emitter electrode) that emits electrons, cold electrons can be efficiently emitted with a relatively low extraction voltage.

As a general example of such a field emission type electron-emitting device, as shown in FIG. 5, an electron-emitting device having a cone-shaped emitter with a pointed tip can be exemplified (J. Applied physics, Vol.39, No.7,3504-3505 (1
968), Japanese Patent Laid-Open No. 61-221783, etc.). In this element, the insulating substrate 51, the emitter wiring layer 52, the insulating layer 53
And the gate 54 are sequentially stacked, and the insulating layer 53 is formed.
An opening A reaching the emitter wiring layer 52 is formed in the gate 54. Then, on the emitter wiring layer 52 in the opening A, a cone-shaped emitter 55 (cone-type emitter) having point projections Po is formed so as not to contact at least the gate 54. In this case, in order to further improve the electron emission efficiency, the gate 54
The surface of the cone-shaped emitter 55 is located at a position higher than the point-like projection Po of the emitter 55. In such an electron-emitting device, the voltage applied to the cone-type emitter 55 is efficiently concentrated on the point-like projections Po, so that cold electrons can be emitted at a relatively low applied voltage.

However, when an electron-emitting device having a cone type emitter 55 as shown in FIG. 5 is applied to an FEA used for a large area flat display,
A large number of emitters 55 having point projections Po having a radius of curvature of several tens to several hundreds nm or less in the opening A having a diameter of 1 μm or less.
Is desired to be formed uniformly without variation while keeping the relative positional relationship with the gate 54 constant, but in practice, there is a problem that such formation is extremely difficult.

For this reason, as shown in FIG. 6, it has been proposed to use a disk-type emitter 56 (disk-type emitter) having good uniform workability, instead of having a cone-type emitter. In this disc-type emitter 56, an electric field is concentrated on the ring-shaped peripheral edge Pe of the disc-type emitter 56 which is a boundary line between the emitter surface 56a and the emitter peripheral surface 56b, and cold electrons are emitted from the electric field. An emitter underlayer 57 is generally formed between the disc-type emitter 56 and the emitter wiring layer 52. In this case, the peripheral edge portion 56c of the disk-shaped emitter 56 is processed so as to protrude toward the gate 54 side from the emitter base layer 57 so that the electric field is easily concentrated on the peripheral edge Pe of the disk-shaped emitter 56.

An electron-emitting device having such a disk-type emitter 56 is manufactured as described below.

That is, an emitter wiring layer material thin film such as a Cr film is formed on an insulating substrate 51 such as a glass substrate,
The emitter wiring layer 52 is formed by patterning by photolithography or the like. Further, an emitter underlayer material thin film 57 'such as an Al film and an emitter material thin film 56' such as a Cr film are continuously formed thereon. Further, a resist material is applied and patterned to form a resist layer 58 which also functions as a lift-off material (FIG. 7A).

Then, using the resist layer 58 as an etching mask, the emitter material thin film 56 'and the emitter underlayer material thin film 57' are sequentially etched to form the emitter underlayer 57 and the emitter 56. At this time, the peripheral edge portion 56c of the emitter 56 is covered by the emitter base layer 5
7 is more overhanged in the plane direction of the substrate than that in FIG. 7 (FIG. 7B).

Next, an insulating layer material such as SiO ₂ and a gate material such as a Cr film are sequentially deposited on the entire surface in the vertical direction of the substrate 51, and the insulating layer 53 is formed around the emitter 56.
And the gate 54 are sequentially formed (FIG. 7C).

Next, the resist layer 58 is peeled and removed together with the insulating layer material layer 53 'and the gate material layer 54' thereon. As a result, an electron-emitting device including the disc-type emitter 56 shown in FIG. 7D is obtained.

[0014]

However, in the case of the electron-emitting device having the disk-type emitter shown in FIG. 6, as described above, it is difficult to uniformly manufacture a plurality of devices on a large-area common substrate. Although it is easier than an electron-emitting device provided with a cone-type emitter, there is a problem that it is not sufficient to make it uniformly at a practical level.
Therefore, electrons are not uniformly emitted from all the elements,
Energy density range (design range) intended by some devices
There is a tendency to constantly emit electrons at energy densities above. Therefore, there is a problem in that the flat display composed of a large number of electron-emitting devices including such defective devices is insufficient in terms of image resolution and image quality.

The present invention is intended to solve the above-mentioned problems of the prior art, and when an electron-emitting device provided with a disk-type emitter emits electrons at an energy density exceeding the design range, it is excessive. The purpose of the present invention is to provide a structure in which the electron emission energy density increased to within the design range is returned to the design range in a self-controlled manner.

[0016]

Means for Solving the Problems The present inventor has (1) the phenomenon that when the distance between the emitter and the gate is increased, the electric field strength at the periphery of the emitter is decreased and the electron emission energy density is decreased. (2) Therefore, if the emitter that emits electrons at an energy density exceeding the design range is separated from the gate, the too high electron emission energy density can be returned to within the design range, and (3) and for that, The inventors have found that the structure of the emitter should be a bimetal-like structure in which electrons are emitted at an energy density exceeding the design range and the peripheral edge of the heated emitter is deformed away from the gate, and the present invention has been completed. It was

That is, the present invention provides a substrate, an emitter wiring layer,
An insulating layer and a gate are sequentially stacked, and an opening reaching the emitter wiring layer is provided in the gate electrode and the insulating layer,
A field emission type sequentially provided on the emitter wiring layer in the opening so that the emitter underlayer and the emitter do not contact the gate and the peripheral edge of the emitter projects toward the gate side from the emitter underlayer. In the electron-emitting device, the emitter is composed of an emitter lower layer and an emitter upper layer, and the emitter lower layer has a smaller coefficient of thermal expansion than the emitter upper layer.

The present invention will be described in detail below with reference to the drawings.

FIG. 1 is a sectional view of the electron-emitting device of the present invention. As shown in the figure, in the electron-emitting device of the present invention, the substrate 1, the emitter wiring layer 2, the insulating layer 3 and the gate 4 are sequentially stacked, and the gate wiring 4 and the insulating layer 3 are formed on the emitter wiring layer 2. Aperture A reaching is provided, and the aperture A
An emitter underlayer 5 is provided on the inside of the emitter wiring layer 2,
On the emitter underlayer 5, the emitter 6 composed of the emitter lower layer 6a and the emitter upper layer 6b is prevented from coming into contact with the gate 4, and the peripheral edge portion 6c of the emitter 6 is projected toward the gate 4 side from the emitter underlayer 5. They are provided in sequence. Here, the emitter lower layer 6a is formed of a material having a smaller thermal expansion coefficient than the emitter upper layer 6b. Therefore, the emitter 6 heated by emitting electrons with an energy density exceeding the design range is curved toward the substrate 1 so that the peripheral edge portion 6c thereof is separated from the gate 4 (FIG. 2), and therefore the peripheral edge of the emitter 6 is curved. The electric field intensity of Pe is reduced, the electron emission energy density is reduced, and the electron emission energy density is restored within the design range in a self-controlled manner.

In the present invention, the substrate 1 is used as a supporting substrate for an electron-emitting device, and an insulating substrate whose area can be easily enlarged can be preferably used. As such an insulating substrate, a quartz substrate, a ceramic substrate,
A glass substrate or the like can be used. Note that a substrate having an insulating film formed on the surface of single crystal Si can also be used.

The emitter wiring layer 2 is formed of a material having a low wiring resistance and a good adhesion with the substrate 1. Further, it is formed from a material having high resistance to the RIE condition used when forming the emitter 6 described later. This is to cause the emitter wiring layer 2 to function as an etching stopper when forming the emitter. As such a metal material, Cr or Al / Cr alloy can be particularly preferably cited.

The thickness of the emitter wiring layer 2 is not particularly limited as long as sufficient wiring resistance and adhesion can be obtained, but it is usually 0.05 to 0.5 μm, preferably 0.1 to 0.3 μm.
m.

The insulating layer 3 includes the emitter wiring layer 2 and the gate 4.
It is a layer for electrically insulating and. Such an insulating layer 3 can be formed of a known material used as an insulating layer of an electron-emitting device, but it has a good insulating property and can be formed by an anisotropic vapor deposition method. Can be mentioned.

With respect to the thickness of the insulating layer 3, it suffices that a sufficient insulating property is maintained between the emitter wiring layer 2 and the gate 4.
For example, 0.2 to 2 μm, preferably 0.3 to 0.7 μm
m.

The gate 4 is an electrode for concentrating a strong electric field on an emitter 6 described later. As the material of the gate 4, a refractory metal can be used from the viewpoint of current resistance, and preferably Cr, W, Ta or Nb can be mentioned. Above all, it is preferable to use Cr.

The thickness of the gate 4 can be appropriately determined according to need, but is 0.1 to 0.5 μm.

The emitter base layer 5 is a layer for facilitating the concentration of an electric field on the peripheral portion 6c of the emitter 6 formed thereon and for establishing electrical continuity between the emitter wiring layer 2 and the emitter 6. In this case, the width T1 of the emitter underlayer 5 in the planar direction of the substrate 1 is smaller than the width T0 of the emitter 6 in order to easily concentrate the electric field on the peripheral portion 6c of the emitter 6.

In order to make the emitter underlayer 5 have such a shape, the etching rate when the emitter underlayer 5 is formed by etching is set to be significantly higher than the etching rate of the emitter 6 under the etching conditions. The etching conditions may be selected appropriately.

The material of the emitter underlayer 5 may be silicon or the like, although it depends on the material of the emitter 6 and etching conditions. In particular, it is preferable to use silicon, which has a relatively high exothermicity. As a result, the emitter 6 can be curved more efficiently.

In the present invention, the emitter 6 functions as a member that directly emits electrons from its surface (in particular, the peripheral edge Pe), and is composed of an emitter lower layer 6a and an emitter upper layer 6b. In this case, as the emitter lower layer 6a, a material having a smaller thermal expansion coefficient than that of the emitter upper layer 6b is used. As materials for the emitter lower layer 6a and the emitter upper layer 6b, those having a small work function, good electron emission characteristics, high voltage resistance, and a high melting point can be appropriately selected and used. Specific examples of the material that can be used for the gate 4 include Cr, W, Mo, Ta, Nb, and Ni. As a preferable combination of the emitter lower layer 6a and the emitter upper layer 6b, the former is tungsten (coefficient of thermal expansion 4.5 × 10 ⁻⁶ ) and the latter is nickel (coefficient of thermal expansion 13.4 × 10 ⁻⁶ ). Can be mentioned.

The thickness of the emitter 6 can be appropriately determined if necessary, but is usually 0.05 to 0.5 μm.
It is preferably m.

Further, as shown in FIG. 3, the electron-emitting device of the present invention has a region 5 near the emitter lower layer of the emitter underlayer 5.
a, the width of the emitter base layer 5 is the emitter lower layer 6a.
It is preferable to have a structure in which the width becomes narrower as
This makes the bending of the emitter 6 easier.

The electron-emitting device of the present invention can be manufactured by using the conventional electron-emitting device manufacturing method as shown in FIG. For example, the electron-emitting device having the structure shown in FIG. 1 can be manufactured as shown in FIG.

First, a thin film of an emitter wiring layer material is formed on the substrate 1 by a sputtering method or the like, and patterned by using a photolithography method to form the emitter wiring layer 2. Subsequently, the emitter underlayer material thin film 5 ', the emitter lower layer material thin film 6a', and the emitter upper layer material thin film 6 are formed by a sputtering method or the like.
b'is continuously formed. Then, a resist is applied thereon by a spin coating method or the like and patterned by using a photolithography method to form a resist layer 7 (FIG. 4A).

Next, using the resist layer 7 as an etching mask, the emitter upper layer material thin film 6b 'and the emitter lower layer material thin film 6a' are subjected to reactive ion etching (RI).
Etching is performed by anisotropic dry etching such as E) to form the emitter 6 including the emitter lower layer 6a and the emitter upper layer 6b (FIG. 4B).

Next, the emitter underlayer material thin film 5'is R
Etching is performed by combining anisotropic etching such as IE and isotropic etching such as plasma etching.
The emitter base layer 5 is formed so that the peripheral edge portion 6c of the emitter 6 is in an overhang state (FIG. 4C).

Next, the insulating layer 3 and the gate 4 are vertically formed on the entire surface of the substrate 1 (FIG. 4D). As a film forming method, a reactive evaporation method, an electron beam evaporation method, or the like can be used depending on the material used.

Next, the resist layer 7 is removed with a stripping solution together with the insulating material layer 3'and the gate material layer 4'formed thereon. In this case, the resist layer 7 functions as a lift-off layer. As a result, the electron-emitting device shown in FIG. 4 (e) is obtained.

[0039]

In the electron-emitting device of the present invention, the emitter is composed of an emitter lower layer and an emitter upper layer having different thermal expansion coefficients. Moreover, the lower layer of the emitter has a smaller coefficient of thermal expansion than the upper layer of the emitter. Therefore, when the emitter emits electrons at an energy density higher than the design (in other words, a current larger than intended flows to the emitter) and the emitter heats up, the heat causes the peripheral edge of the emitter to move downward from the gate. Bend to. For this reason, the electric field strength at the peripheral portion of the emitter is reduced, the current amount is reduced, and the electron emission amount is also reduced. As a result, the electron emission energy density of the emitter is reset within the design range in a self-controlled manner. become. This makes it possible to manufacture a large number of electron-emitting devices that self-control so that the electron emission energy density falls within a certain range on a large-area common substrate.
Further, it becomes possible to widen the allowable range of the electron emission characteristics of the electron-emitting device, and it becomes possible to relax the manufacturing conditions and improve the manufacturing yield.

[0040]

EXAMPLES A production example of the electron-emitting device of the present invention will be specifically described below with reference to examples.

Example A Cr film (material thin film for emitter wiring layer) having a thickness of 200 nm was formed on a glass substrate by a sputtering method, and patterned by a photolithography method to form an emitter wiring layer. Then, by a sputtering method, an 800 nm-thick silicon layer (emitter underlayer material thin film) which also functions as a heating resistance layer, a 100 nm-thick tungsten thin film (emitter lower layer material thin film) having a thermal expansion coefficient of 4.5 × 10 ^−6. ), And a 100 nm-thick nickel thin film (material thin film for upper emitter layer) having a thermal expansion coefficient of 13.4 × 10 ⁻⁶ was continuously formed. Here, the nickel thin film was formed after the temperature of the formed tungsten thin film was returned to room temperature.

Next, a positive photoresist (OFPR-8600, manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied on the nickel thin film by spin coating and patterned by photolithography to form a 1.7 μm thick resist layer. did.

Next, using the resist layer as an etching mask, the nickel thin film (emitter upper layer material thin film) and the tungsten thin film (emitter lower layer material thin film) are subjected to reactive ion dry etching to form an emitter upper layer and an emitter lower layer. An emitter was made (etching equipment used;
Wafer etcher WF616, GCA: Gas S
F ₆ / Pressure; 80mTorr / High frequency power 110W
(RIE mode)).

Next, for the silicon film which also functions as the heating resistance layer, reactive ion dry etching which is anisotropic etching (use etching apparatus; wafer etcher WF616, manufactured by GCA: use gas SF ₆ / pressure; 80
mTorr / High frequency power 110W (RIE mode))
And plasma etching that is isotropic etching (etching equipment used; wafer etcher WF616, GCA
Made by company: used gas SF ₆ / pressure; 80 mTorr / high frequency power 110 W (plasma mode)). This formed the emitter base layer. At this time, the peripheral portion of the emitter was in a state of overhanging with respect to the emitter underlayer.

Next, on the emitter underlayer side surface of the substrate, in a vertical direction, a reaction using SiO charged in the crucible as an evaporation source in a mixed gas atmosphere of oxygen and ozone (about 10 ⁻⁵ torr). A SiO ₂ insulating layer having a thickness of 1 μm was formed by a vapor deposition method. Then, by electron beam heating evaporation method,
A gate of Cr having a thickness of 200 nm was continuously formed.

Next, the resist layer was stripped using a stripping solution (104, manufactured by Tokyo Ohka Kogyo Co., Ltd.), and SiO ₂ was formed thereon.
Lifted off together with the thin film and the Cr thin film. This allows
The electron-emitting device of the example was obtained.

It is to be noted that 200 n
An electron-emitting device of a comparative example was manufactured by the same operation as described above except that an emitter made of a Cr layer having a thickness of m was formed.

Arrays in each of which 200 electron-emitting devices of Examples or Comparative Examples thus obtained were integrated were manufactured as prototypes and tested and evaluated as follows.

That is, a glass plate member having a transparent electrode (anode) coated with a phosphor is placed at a distance of 30 mm for an element having a structure in which the distance between the emitter and the gate of each element is designed to be about 0.3 ± 0.05 μm. With a polarity such that the gate side is positive between the emitter and the gate, and the extraction voltage is 120V.
Was applied, the entire surface of the phosphor screen emitted light with substantially uniform brightness in the case of the array of the example, but in the case of the array of the comparative example, a number of parts having higher brightness than the surroundings were observed. . From this, it was found that the individual electron-emitting devices forming the array of the example adjust the electron-emitting energy density in a self-controlled manner.

[0050]

According to the electron-emitting device having the disk-type emitter of the present invention, even when electrons are emitted at an energy density exceeding the design range, the excessively high electron emission energy density can be controlled within the design range. Can be returned to.

[Brief description of drawings]

FIG. 1 is a sectional view of an electron-emitting device of the present invention.

FIG. 2 is a sectional view of an electron-emitting device of the present invention.

FIG. 3 is a sectional view of an electron-emitting device of the present invention.

FIG. 4 is a manufacturing process diagram of the electron-emitting device of the present invention.

FIG. 5 is a sectional view of an electron-emitting device having a conventional cone-type emitter.

FIG. 6 is a cross-sectional view of an electron-emitting device including a conventional disc-type emitter.

FIG. 7 is a manufacturing process diagram of an electron-emitting device including a conventional disk-type emitter.

[Explanation of symbols] 1 substrate 2 emitter wiring layer 3 insulating layer 4 gate 5 emitter underlayer 6 emitter 6a emitter lower layer 6b emitter upper layer

Claims (3)

[Claims] 1. A substrate, an emitter wiring layer, an insulating layer, and a gate are sequentially laminated, and an opening portion reaching the emitter wiring layer is provided in the gate and the insulating layer, and the emitter wiring layer in the opening portion. In the field emission type electron-emitting device, in which the emitter underlayer and the emitter do not come into contact with the gate, and the peripheral edge of the emitter protrudes more toward the gate side than the emitter underlayer, the emitter is the emitter. An electron-emitting device comprising a lower layer and an upper emitter layer, wherein the lower emitter layer has a smaller coefficient of thermal expansion than the upper emitter layer. 2. The electron-emitting device according to claim 1, wherein the width of the emitter underlayer is narrowed toward the emitter underlayer in the region near the emitter underlayer of the emitter underlayer. 3. The electron-emitting device according to claim 1, wherein the material of the emitter underlayer is silicon, the material of the lower emitter layer is tungsten, and the material of the upper emitter layer is nickel.