JPH08329626A - Device for interpolating digital data, reproducing device, recorder and method of interpolation - Google Patents

Abstract

PURPOSE: To restore the defective data by interpolation, etc., in ΣΔ modulation if abnormality occurs in a transmission system, and the defective data occurs. CONSTITUTION: A moving average processing device 36 multiplies a defective data block by a fixed coefficient, and multiplies the data of front/rear of the defective data block by a variable coefficient. A number of pieces estimation operation device 37 estimates the number of pieces of '1' and '0' constituting the defective data block from the output of the moving average processing device 6. An interpolation data generation device 38 decides the arrangement pattern of the interpolation data of the defective data block based on the result estimated by the number of pieces estimation operation device 37 to generate the interpolation data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital data interpolating device, a reproducing device, a recording device, and an interpolating device for interpolating defective data of a predetermined number of samples generated when transmitting digital data digitized by 1 bit. Regarding the method.

[0002]

2. Description of the Related Art For example, a method of converting an analog audio signal into a digital signal for recording, reproducing and transmitting is as follows.
A recording / reproducing apparatus using a recording medium such as an optical disc typified by a compact disc (CD), a magnetic tape typified by a digital audio tape (DAT), and the like,
It is implemented by digital broadcasting such as satellite broadcasting. In the conventional digital audio transmission device as described above, when exchanging digital signals, formats such as sampling frequencies of 48 kHz and 44.1 kHz and a quantization bit number of 16 bits were specified.

However, in the conventional digital audio transmission device as described above, the number of quantization bits of digital audio data generally defines the dynamic range of the demodulated audio signal. Therefore, in order to transmit a higher quality audio signal, it is necessary to expand the number of quantization bits from the current 16 bits to 20 bits or 24 bits. However, once the quantized bit is defined as a fixed value, the signal processing system is also provided correspondingly, so that there is a disadvantage that the number of quantized bits cannot be easily expanded.

As a method of digitizing an audio signal, a method called sigma delta (ΣΔ) modulation has been proposed (Acoustic Society of Japan, Vol. 46, No. 3 (1990)).
Pp. 251-257 [AD / DA converter and digital filter (Yoshio Yamazaki)] etc.).

FIG. 9 shows the configuration of a circuit for performing 1-bit ΣΔ modulation, for example. In FIG. 9, the input audio signal from the input terminal 91 is supplied to the integrator 9 through the adder 92.
3 is supplied. The signal from the integrator 93 is the comparator 9
4 and is compared with the midpoint potential of the input audio signal, for example, and is quantized by 1 bit for each sample period. The frequency of the sampling period (sampling frequency) is 48kHz and 44.1kHz,
A frequency that is 64 times or 128 times that frequency is used. The quantization may be 2 bits or 4 bits.

This quantized data is a 1-sample delay unit 95.
And is delayed by one sample period. This delay data is converted into an analog signal by, for example, a 1-bit D / A converter 96 and supplied to an adder 92, and an input terminal 91
Is added to the input audio signal from. The quantized data output from the comparator 94 is output to the output terminal 97. According to the ΣΔ modulation performed by the ΣΔ modulation circuit, as described in the above document, by sufficiently increasing the frequency of the sampling period (sampling frequency), a wide dynamic range can be obtained even with a small number of bits, for example, 1 bit. An audio signal can be obtained. Moreover, it is possible to have a wide transmittable frequency band. Further, since the ΣΔ modulation circuit has a circuit configuration suitable for integration and the accuracy of A / D conversion can be obtained relatively easily, it has been conventionally used often in an A / D converter. .
The ΣΔ modulated signal can be converted back into an analog audio signal by passing through a simple analog low pass filter. Therefore, the ΣΔ modulation circuit can be applied to a recorder that handles high-quality data and data transmission by taking advantage of these features.

[0007]

By the way, in the above digital audio data, if an abnormality occurs in the transmission system and defective data occurs, the data is fixed to "1" or "0". Successive "1" and "0" in the digital audio data correspond to the maximum positive value and the maximum negative value, respectively, as the demodulated signal.
If a part of the signal becomes defective in the transmission system, the maximum level of noise is generated in the defective part, and there is a risk of damaging the monitor amplifier or speaker.

Therefore, in a conventional CD, DAT, or the like which uses digital data whose format is defined as the number of quantization bits such as 16 bits, continuous "1" or "0" is the maximum level of the demodulated signal. The signal format is set so that it does not become an intermediate value, for example. Therefore, even if the above-mentioned data defect occurs, the maximum level of noise is prevented from occurring. Further, by providing an error correction code in the data, for example, even if a defect occurs in the data, the data can be repaired up to a predetermined range. Further, for a defect or the like that exceeds the capability of the error correction code, interpolation processing is performed by using the preceding and following data, and the immediately preceding data is held, so that no audible problem occurs.

An example of such interpolation processing is shown in FIG.
Processing using linear interpolation as shown in 0 is performed. FIG.
At 0, for example, the number of defective data is N, the data immediately before that data is D _A , and the data immediately after that is D _B , interpolation data D _n (n = 1 to N is an integer) is calculated by the following equation. To be D _n = D _A + n × (D _B −D _A ) / N (1) However, in the above-mentioned ΣΔ modulation, since the word length of each data is short, for example, 1 bit, as described above. Interpolation processing cannot be performed using the data before and after.
Therefore, for example, as shown in FIG. 11, a method (prefix hold) of replacing a block of immediately preceding data having the same length as the defective data portion with the defective data portion can be considered. However, this method is not practical because the connection between the replaced data sometimes fails and extremely large noise is generated.

Further, it is conceivable to convert the data obtained by the above-mentioned ΣΔ modulation into a conventional signal format such as CD or DAT by using a decimation filter. As described above, once converted to the conventional signal format, it is possible to prevent an auditory problem from occurring by performing interpolation processing in the same method as the conventional method or holding the immediately preceding data. However, with such a method, the characteristics of the signal to be processed become the same as those of the conventional CD, DAT, etc., and the characteristics such as the wide band and high dynamic range that the original ΣΔ signal has cannot be utilized.

Therefore, conventionally, if abnormality occurs in the transmission system and defective data occurs, the ΣΔ modulation has no means for restoring it by interpolation or the like. Therefore, in a general transmission system, ΣΔ Utilizing modulation has been extremely difficult.

The present invention has been made in view of the above circumstances, and is a digital data interpolating device, a reproducing device, a recording device and a digital data interpolating device for interpolating a defective portion generated in ΣΔ-modulated 1-bit digital data by a simple operation. The purpose is to provide an interpolation method.

[0013]

In order to solve the above-mentioned problems, a digital data interpolating apparatus according to the present invention has a ΣΔ
In a digital data interpolating device for interpolating a defective data block composed of predetermined bits generated when transmitting digital data digitized by modulation,
A first average value of a data string that is located before the defective data block and does not include a defective data block, and a second average value of a data string that is located after the defective data block and does not include the defective data block. , A first arithmetic unit for obtaining a third average value based on data located immediately before and immediately after the defective data block in the data string including the defective data block, and calculated by the first arithmetic unit A second computing unit that computes the interpolation data based on the first average value and the second average value, the interpolation data computed by the second computing unit, and the first computing unit obtained by the first computing unit. A generator that generates an array pattern of the defective data block based on the average value of 3 and an interpolation data of the defective data block based on the array pattern generated by the generator. Consisting of Te Bei and the interpolation data generator.

In order to solve the above-mentioned problems, the digital data reproducing apparatus according to the present invention reproduces the digital data from a recording medium on which the digital data digitized by ΣΔ modulation is recorded. In the reproducing apparatus, a detector for detecting a defective data block in the reproduced digital data, a first average value of a data string which does not include the defective data block located in front of the defective data block, and the defective data block A third average value based on a second average value of a data string that does not include a defective data block located at the rear and data located immediately before and immediately after the defective data block in the data string that includes the defective data block. A first arithmetic unit for obtaining the first and the first arithmetic unit calculated by the first arithmetic unit
A second arithmetic unit for generating interpolation data based on the average value and the second average value, the interpolation data generated by the second arithmetic unit, and the third arithmetic unit obtained by the first arithmetic unit. A generator that generates an array pattern of the defective data block based on an average value, an interpolation data generator that determines interpolation data of the defective data block from the array pattern generated by the generator, and a detection result by the detector. And a switcher for selecting the reproduced digital data and the digital data via the interpolation generator.

Further, in order to solve the above-mentioned problems, the digital data recording apparatus according to the present invention is a digital data recording apparatus for recording digital data digitized by ΣΔ modulation on a recording medium. A detector that detects a defective data block therein, a first average value of a data string that does not include a defective data block that is located in front of the defective data block that is detected by the detector, and that is located after the defective data block. A first average value is calculated based on a second average value of a data string that does not include a defective data block and data located immediately before and after the defective data block in a data string that includes the defective data block. And the interpolating data based on the first average value and the second average value calculated by the first arithmetic unit. An array pattern of the defective data blocks based on a second arithmetic unit for generating data, the interpolation data generated by the second arithmetic unit, and the third average value obtained by the first arithmetic unit. , A interpolation data generator that determines the interpolation data of the defective data block from the array pattern generated by the generator, and the reproduced digital data and the interpolation based on the detection result of the detector. It comprises a switcher for selecting digital data via a data generator and a recording means for recording the digital data from the switcher on a recording medium.

Further, in order to solve the above-mentioned problems, the digital data interpolation method according to the present invention has a defective data block composed of predetermined bits generated when transmitting digital data digitized by ΣΔ modulation. In a method of interpolating digital data, the first average value of a data string located before the defective data block and not including the defective data block and the defective data block located behind the defective data block are Calculating a third average value based on the second average value of the data string not included and the data located immediately before and after the defective data block in the data string including the defective data block; A step of calculating interpolation data based on the first average value and the second average value; And a step of determining an array pattern candidate of the defective data block based on the average value of 3, and a step of determining interpolated data of the defective data block from the candidate sequence of the determined array pattern.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a digital data interpolating apparatus, reproducing apparatus, recording apparatus and interpolating method according to the present invention will be described below with reference to the drawings.

In this embodiment, an input audio signal is .SIGMA..DELTA. Modulated and recorded in the form of 1-bit digital data on a recording medium such as a magnetic tape, and the 1-bit digital data is reproduced from the recording medium to produce an analog audio signal. It is a preferable interpolation device applied to a digital audio recording / reproducing device for outputting, and interpolates a defective data block that cannot be subjected to a normal error correction process.

As shown in FIG. 1, the interpolation device 13 is
Multiply the above bad data block by a constant coefficient,
A moving average processor 36 which is a multiplication means for multiplying the coefficient before and after the defective data block by a changing coefficient.
Based on the result estimated by the number estimation calculator 37 and the number estimation calculator 37 that estimates the number of “1” and “0” forming the defective data block from the output of the moving average processor 36, And an interpolation data generator 38 for determining an array pattern of the interpolation data of the defective data block and generating the interpolation data. The operation of the interpolation device 13 will be described later.

A digital audio recording / reproducing apparatus to which this interpolating apparatus 13 is applied, uses ΣΔ for an input audio signal.
Modulation processing is performed to obtain 1-bit digital data.
A recording unit 1 as shown in FIG. 2 for recording bit digital data together with a synchronization signal and an error correction code for every predetermined number of units.
0, and a reproducing unit 20 as shown in FIG. 3 for reproducing 1-bit digital data for each predetermined number of units reproduced from the magnetic tape 9 of the recording unit 10. The interpolation device 1
3 is provided in the reproducing unit 20, but for convenience of description, the recording unit 10 will be described first.

As shown in FIG. 2, in this recording unit 10,
The input audio signal from the input terminal 1 is supplied to the integrator 3 via the adder 2. The signal from the integrator 3 is supplied to the comparator 4, and is compared with, for example, the midpoint potential (“0V”) of the input audio signal and quantized by 1 bit for each sampling period. Here, the frequencies during the sampling period (sampling frequency) are 48 kHz and 44.1 kHz of the conventional one.
, 64 times or 128 times that frequency is used.

This quantized data is supplied to the one-sample delay unit 5 and delayed by one sample period. This delay data is a 1-bit digital / analog (D / A) converter 6
Is supplied to the adder 2 through and is added to the input audio signal from the input terminal 1. As a result, the comparator 4 outputs quantized data in which the input audio signal is ΣΔ modulated. The quantized data output from the comparator 4 is supplied to the synchronization signal and error correction code (ECC) addition circuit 7 and converted into quantized data for each predetermined number of samples, as in the recording format shown in FIG. A sync signal and an error correction code are added. In the recording format shown in FIG. 4, 1-bit digital data, which is 1-bit quantized data, is grouped into four pieces such as data D _{0 to} D ₃ , and a synchronization signal is generated for each of these 4 pieces of 1-bit digital data. S ₀ and S ₁ and error correction codes P ₀ and P ₁ are added. The sync signals S ₀ and S ₁ and the error correction codes P ₀ and P ₁ in FIG. 4 are added by the sync signal and ECC adding circuit 7. With the error correction codes P ₀ and P ₁ , it is possible to detect and correct transmission errors that occur during recording and reproduction.

Next, in the reproducing section 20 shown in FIG. 3, the reproducing head 11 reproduces the 1-bit digital data recorded on the magnetic tape 9. Since this 1-bit digital data is recorded in a format to which the sync signal and the error correction code are added, when supplied to the sync separation / error correction circuit 12, the sync signal is separated and the error correction processing is performed. Then, only 1-bit digital data in units of 4 obtained by subjecting the input audio signal to ΣΔ modulation is extracted.

However, at the time of recording / reproducing, by the error correction processing in the sync separation and error correction circuit 12, 1 of 4 units is used.
A defective data block including defective data that cannot be corrected as bit digital data may occur.
The failure of the digital audio recording / reproducing apparatus and its peripherals, the damage of the magnetic tape 9 as a recording medium, the disconnection in data transmission, etc. are considered to be the cause of the defective data block.

Therefore, in this digital audio recording / reproducing apparatus, the sync separation and error correction circuit 1 is used at the time of recording / reproducing.
When a defective data block that cannot be completely corrected in 2 occurs, the interpolation device 13 is caused to output the interpolation data of the defective data block. This interpolator 13 has four defective data blocks consisting of 1-bit digital data, data located before and after the defective data block, a coefficient having a constant value over the defective data block width, and the preceding and following positions. The number of defective data blocks “1” and “0” is estimated by multiplying each of the data to be changed by “0” while maintaining the total energy amount of the four 1-bit digital data. Interpolation processing for determining the arrangement pattern of "" and "1" is performed. The interpolation processing of the interpolation device 13 is controlled by the interpolation processing control circuit 23. The interpolator 13 outputs non-interpolated data instead of the interpolated data when there is no defective data block that cannot be completely corrected by the error correction of the sync separation and error correction circuit 12. The non-interpolation data is
It is four 1-bit digital data that are not defective data blocks.

The interpolated data or non-interpolated data output from the interpolator 13 is returned to the analog audio signal by the analog filter 14. This analog audio signal is taken out from the monitor terminal 15.

The interpolated data or non-interpolated data output from the interpolating device 13 is processed by a digital filter 16 which is a decimation filter, into an arbitrary CD or DAT.
Is converted into a signal format such as. The signal converted into the arbitrary format is passed through an ordinary D / A converter through a reproducing system 17 of a digital recorder of an arbitrary format, a reproducing system 18 of a CD or DAT, a reproducing system 19 of a magneto-optical disk, or the like. 21. An analog audio signal is taken out from the output terminal 22.

Details of the interpolation device 13 will be described with reference to FIG. The 4-bit unit 1-bit digital data supplied from the synchronization separation / error correction circuit 12 shown in FIG. 3 via the input terminal 30 is temporarily delayed by the delay unit 31. The 4-bit 1-bit digital data delayed by the delay unit 31 is interpolated by the interpolation processing unit 32.
And the selector 33 for selectively switching and outputting the interpolation data from the interpolation processing unit 32 and the non-interpolation data from the delay unit 31. The interpolation processing unit 32 is
It is composed of a moving average processor 36, a number estimation calculator 37, and an interpolation data generator 38.

The selector 33 synchronizes with one selected terminal a to which the non-interpolation data from the delay unit 31 is supplied and the other selected terminal b to which the interpolation data from the interpolation processing section 32 is supplied. A movable piece whose connection to one selected terminal a or the other selected terminal b is selectively switched according to an interpolation on / off control signal supplied from the separation and error correction circuit 12 via a control signal terminal 34. It consists of c and.

When the sync separation and error correction circuit 12 determines that the 4-bit unit 1-bit digital data reproduced by the reproduction head 11 is a defective data block that cannot be completely corrected by the error correction processing, the interpolation ON / OFF is performed. The control signal is supplied to the control signal terminal 34. The selector 33 connects the movable piece c to the selected terminal b and outputs the interpolation data, which has been subjected to the interpolation processing by the interpolation device 13, to the output terminal 35. On the other hand, when the sync separation and error correction circuit 12 determines that the reproduced 4-bit 1-bit digital data is not a defective data block, the interpolation off control signal is supplied via the control signal terminal 34. Is supplied to the selector 33. The selector 33 connects the movable piece c to the selected terminal a and outputs the non-interpolated data that has not been subjected to the interpolation processing from the output terminal 35.

The operation principle of the interpolation processing section 32 will be described with reference to FIGS. In the 1-bit digital data reproduced from the magnetic tape 9 by the reproducing head 11, as shown in FIG. 5 (A), a defect composed of four 1-bit digital data D ₁₂ , D ₁₃ , D ₁₄ and D _15. Data block B
_Suppose that _b has occurred.

First, the moving average processor 36 corrects the correct 11 before the defective data block B _b shown in FIG.
1-bit digital audio data D _{1 to} D ₁₁
Is subjected to a two-stage moving average filter process consisting of 4 taps and 8 taps to derive a moving average value M _A at point P _A shown in FIG. The 4-tap moving average processing described above means that D _{1 to} D ₄ , D ₂ to D ₁ to D ₁ to D _{1 to} D ₁₁ shown in FIG.
D ₅ , D _{3 to} D ₆ , D _{4 to} D ₇ , D _{5 to} D ₈ , D _{6 to} D ₉ , D ₇ to
As shown in FIG. 5B, the moving average process is performed with 4 bits as one set, such as D ₁₀ , D _{8 to} D ₁₁ .
This is a process of generating four 4-tap moving average process outputs. The moving average processor 36 further sets these 4 taps moving average processing outputs as one set, performs 8 taps moving average processing on this, and outputs the 8 taps moving average processing output as shown in FIG. 5C. Then, the moving average value M _A at the point P _A shown in FIG. 5D is derived.

The above two-stage moving average filter is expressed by the following equation.
Can be represented. M_A= ｛(D₁+ D₂+ D₃+ D_Four) / 4 + (D₂+ D₃+ D_Four+ D_Five) / 4 + (D₃+ D_Four+ D_Five+ D₆) / 4 + (D_Four+ D_Five+ D₆+ D₇) / 4 + (D_Five+ D₆+ D₇+ D₈) / 4 + (D₆+ D₇+ D₈+ D₉) / 4 + (D₇+ D₈+ D₉+ D_Ten) / 4 + (D₈+ D ₉ + D_Ten+ D₁₁) / 4} / 8 (2) The above two-stage moving average filter is a 4-tap FIR filter.
It may be configured with a filter and an 8-tap FIR filter, but
To simplify the configuration, for example, the 11-tap FI shown in FIG.
It can be composed of an R filter.

The output of the 11-tap FIR filter shown in FIG. 7 can be expressed by the following equation. M _A = D ₁ × k ₀ + D ₂ × k ₁ + D ₃ × k ₂ + D ₄ × k ₃ + D ₅ × k ₄ + D ₆ × k ₅ + D ₇ × k ₆ + D ₈ × k ₇ + D ₉ × k ₈ + D ₁₀ Expanding _{× k 9 + D 11 × k} 10 ···· (3) where _{(2), M a = (D 1 +} D 2 × 2 + D 3 × 3 + D 4 × 4 + D 5 × 4 + D 6 × 4 + D 7 × 4 + D ₈ × 4 + D ₉ × 3 + D ₁₀ × 2 + D ₁₁ × 1) / 32 (4)

Here, for example, the 11-tap F shown in FIG.
If a 1/32 multiplier is inserted as a multiplier in the input stage of the IR filter, the two-stage moving average filter is the 11-tap filter shown in FIG. 7 by setting the coefficients K _{1 to} K ₁₀ as follows. Can be achieved with. K ₁ = 1, K ₂ = 2, K ₃ = 3, K ₄ = 4, K ₅ = 4, K ₆ =
4, K ₇ = 4, K ₈ = 3, K ₉ = 2, K ₁₀ = 1 Therefore, the moving average value M _A is set by setting the coefficients K _{1 to} K ₁₀ of the FIR filter shown in FIG. 7 as described above. It can be obtained by inputting 1-bit digital audio data D _{1 to} D ₁₀ .

The moving average processor 36 also performs the above-described two-stage moving average processing on the 11 correct 1-bit digital audio signals D _{17 to} D ₂₇ after the defective data block B _b , as shown in FIG. The moving average value M _B of the point P _B shown in is derived.

The moving average value M _B at the point P _B can also be calculated by the 11-tap FIR filter shown in FIG. 7 as with the moving average value M _A. Also in this case, the coefficients K _{1 to} K ₁₀ of the FIR filter have the same values as above.

Next, the moving average value M _A of these two points obtained
And M _B are used to set the center point M _C 'of the error data as M _C '
= (M _A + M _B ) / 2 is calculated by linear interpolation.

Here, 1 including the defective data block B _b
The moving average value M _C is also derived from one piece of 1-bit digital data D _{9 to} D ₁₉ . This moving average value M _C can be calculated by using the FIR filter shown in FIG. 7 as follows: M _C = {D ₉ × k ₀ + D ₁₀ × k ₁ + D ₁₁ × k ₂ + D ₁₂ × k ₃ + D ₁₃ × k ₄ + D ₁₄ × _{k 5 + D 15 × k 6} + D 16 × k 7 + D 17 × k 8 + D 18 × k 9 + D 19 × k 10} / 32 ··· · (5) become.

The above two stages by the moving average processor 36
In the moving average processing of the floor, 1-bit digital data D₉
~ D₁₉On the other hand, D₉~ D₁₂, D_Ten~ D₁₃, D₁₁~ D₁₄,
D₁₂~ D_Fifteen, D₁₃~ D₁₆, D₁₄~ D₁₇, D_Fifteen~ D₁₈, D
₁₆~ D₁₉In this way, the moving average process of 4 taps is applied.
Then, eight 4-tap moving averages as shown in FIG.
Get the processing output_,Furthermore, these 4 tap moving average processing output
Eight taps are subjected to 8-tap moving average processing. others
Therefore, the moving average value M_CIs M_C= ｛(D₉+ D_Ten+ D₁₁+ D₁₂) / 4 + (D_Ten+ D₁₁+ D₁₂+ D₁₃) / 4 + (D₁₁+ D₁₂+ D₁₃+ D₁₄) / 4 + (D₁₂+ D₁₃+ D₁₄+ D_Fifteen) / 4 + (D₁₃+ D₁₄+ D_Fifteen+ D₁₆) / 4 + (D₁₄+ D_Fifteen+ D₁₆+ D₁₇) / 4 + (D_Fifteen+ D₁₆+ D₁₇ + D₁₈) / 4 + (D₁₆+ D₁₇+ D₁₈+ D₁₉) / 4} / 8 = {D₉× 1 + D_Ten× 2 + D₁₁× 3 + (D₁₂+ D₁₃+ D₁₄+ D_Fifteen) × 4 + D_{1 6} × 4 + D₁₇× 3 + D₁₈× 2 + D₁₉× 1} / 32 (6)

Here, the unknown number is the error data D ₁₂ , D ₁₃ , D _{14 of} the defective data block B _b shown in FIG.
It is a D _15, the coefficient k ₃ to k ₆ corresponding to these terms above (5) and a constant value as shown in FIG. 6 (B) than that (6) are equal "4" Become. In addition, (B) of FIG.
As shown in, the coefficients k _{0 to} k ₂ are: k ₀ = 1, k ₁ = 2, k
It increases as ₂ = 3 and goes up to the right as a whole.
The coefficients k _{7 to} k ₁₀ are k ₇ = 4, k ₈ = 3, k ₉ = 2, k ₁₀ =
The number decreases to 1 and falls to the right as a whole. The moving average processor 36 performs the two-step moving average processing using the coefficient shown in FIG. 6B.

Therefore, the four error data D ₁₂ ,
Even if the arrangement pattern of “1” and “0” for D ₁₃ , D ₁₄ , and D ₁₅ is not known, the moving average value M _C can be determined by the number of “1” or “0”. It is the number estimation calculator 37 that estimates the number of “1” or “0”. This number estimation calculator 37 is obtained by setting M _C ≈M _C ′, (D ₁₂ + D ₁₃ + D ₁₄ + D ₁₅ ) ≈ {M _C ′ − (D ₉ × 1 + D ₁₀ × 2 + D ₁₁ × 3 + D ₁₆ × 4
The number of “1” or “0” is estimated from the equation + D ₁₇ × 3 + D ₁₈ × 2 + D ₁₉ × 1)} / 4.

In the above equation, D (1) = 1, D (0)
If the number is −1, the number estimation calculator 37 determines that D ₁₂ + D ₁₃ + D ₁₄ + D ₁₅ ≈4 --->"1": 4 "0": 0 D ₁₂ + D ₁₃ + D ₁₄ + D ₁₅ ≈2- ->"1": 3 "0": 1 _{D 12 + D 13 + D 14} + D 15 ≒ 0 --->"1": 2 pieces "0": 2 _{D 12 + D 13 + D 14} + D 15 ≒ -2 --->"1": 1 "0": 3 _{D 12 + D 13 + D 14} + D 15 ≒ -4 --->"1": 0 or "0": the Fu of four "1 The number of "" and "0" can be estimated.

As described above, the moving average processing unit 36 performs the moving average processing so that the coefficient value is constant over the error data width, so that the number estimation arithmetic unit 37 can easily make "1" and "1" in the error data. The number of 0 "can be estimated. It should be noted that here, although 2-bit moving average processing of 4 taps and 8 taps is applied to an error of 4 bit width,
The number of bit widths, the number of taps, and the number of steps are not limited to this.

In the number estimation calculator 37, as described above,
If the number of "1" and "0" in the error data is estimated,
It is possible to maintain the total energy amount of the four 1-bit digital data. Therefore, the interpolation data generator 38 determines the array pattern of “1” and “0” of the interpolation data while maintaining the energy amount determined by the number of “1” and “0”, and performs the interpolation. Just generate the data. For example, if the numbers of “1” and “0” estimated by the number estimation calculator 37 are both 2,
As the interpolation pattern, five patterns of 0011 0101 1001 1010 1100 are considered as candidates. The above five array patterns may be applied to the defective data block B _b .

[0046] is a method for determining the arrangement pattern determined the defective data block D ₁₂ of the B _b "0" or "1" moving average value of D ₂ to D ₁₂ in the case of replacing each. Then, the calculated moving average value and P _A − of FIG.
A value obtained by linearly interpolating between P _B is compared as a moving average value reference value, and the closer moving average value is determined as correct data.

Next, D ₁₃ is replaced with "0" or "1", and D ₃
The moving average value of D ₁₃ is calculated. Then, compare the obtained moving average value with the reference value of the moving average value that has been linearly interpolated,
The closer moving average value is determined as the correct data.

This operation is sequentially repeated for each bit of the defective data block to determine "0" or "1". The number pattern of "0" or "1" is known in advance. Therefore, the process ends when the number is reached.

In this way, the interpolation processing section 32 performs interpolation processing on the defective data block B _b , and the selector 33
To the selected terminal b. Then, the interpolation device 13
As described above, when the synchronization separation and error correction circuit 12 supplies the interpolation ON control signal through the control signal terminal 34, the movable piece c of the selector 33 is connected to the selected terminal b and the interpolation is performed from the output terminal 35. Output the data.

The principle of operation of the interpolation processing section 32 has been described above. Next, a specific operation of the interpolation device 13 including the interpolation processing unit 32 will be described with reference to the flowchart of FIG. Since the interpolating device 13 performs the above-mentioned interpolating process under the control of the interpolating process controlling circuit 23 as shown in FIG. 2, the flowchart of FIG. 8 shows the flow of control performed by the interpolating process controlling circuit 23. ing.

First, as shown in step S1, the interpolation control circuit 23 causes the moving average processor 36 to obtain a plurality of "1" and "0" that can be taken in a data block for four 1-bit audio data. Figure 6 for each of the number patterns
(B) is multiplied by a constant coefficient to calculate a plurality of candidate values M _C2 'corresponding to the defective data block B _b .

Next, the interpolation processing control circuit 23 proceeds to step S2, and determines whether or not the interpolation separation control signal is supplied from the sync separation and error correction circuit 12 to the control signal terminal 34. When it is judged that the interpolation ON control signal is supplied,
The interpolation control circuit 23 proceeds to step S3 to make the moving average processor 36 obtain the moving average values M _A and M _B shown in FIG. 5C.

Next, interpolation processing control circuit 23 proceeds to step S4, the moving average processing unit 36, before the data D ₉ of the defective data block B _b shown in (A) of FIG. 6, D _10, D ₁₁
And an operation D ₉ × k ₀ + D ₁₀ × using the coefficients k ₀ , k ₁ , and k ₂ having the upward slope as shown in FIG. 6B.
Perform k ₁ + D ₁₁ × k ₂ . Then, the calculation result is M
_C1 '

Next, the interpolation processing control circuit 23 proceeds to step S5 and tells the moving average processor 36 the data D ₁₆ , D ₁₇ , and the data after the defective data block B _b shown in FIG.
Operation D ₁₆ × k ₇ + D ₁₇ × using D ₁₈ and D ₁₉ and the coefficients k ₇ , k ₈ , k ₉ and k ₁₀ having a downward slope as shown in FIG. 6B. Perform k ₈ + D ₁₈ × k ₉ + D ₁₉ × k ₁₀ . Then, the calculation result is set as M _C3 '.

Next, the interpolation processing control circuit 23 proceeds to step S6 to calculate the interpolation data candidate M _C '. Here, the interpolation data candidate M _c 'is one of the plurality of candidate values M _C2 ' corresponding to the defective data block B _b obtained in step S1 and the calculation result M _C1 'obtained in step S4. And the calculation result M _C3 'obtained in step S5
Can also be expressed as the sum of Therefore, the interpolation processing control circuit 23
Proceeds to step S7, and the number estimation calculator 37 displays {M
_c ′ − (M _C1 ′ + M _C3 ′) / 4 is calculated, and the number pattern of “1” or “0” closest to the plurality of candidate values M _C2 ′ obtained in step S1 is obtained. Make one guess.

Then, the interpolation processing control circuit 23 proceeds to step S8 and instructs the interpolation data generator 38 to generate four 1-bit digital data based on the one estimated from the plurality of candidate values M _C2 '. In the state in which the total amount of energy is maintained, the interpolation data in which the arrangement pattern of "1" and "0" is determined is generated.

As described above, the interpolation processing control circuit 23
The respective units of the interpolating device 13 are controlled to perform the interpolating process. Therefore, the reproducing unit 20 of the digital audio recording / reproducing apparatus to which the interpolating device 13 of the present embodiment is applied, even if defective data that cannot be completely corrected by the error correction process occurs during recording / reproducing of 1-bit digital data, 1-bit digital data can be interpolated in units of defective data blocks. Further, the interpolating device 13 determines the array pattern after estimating the number of "1" s and "0" s, so that the calculation can be simplified.

Further, it is not necessary to determine the correct arrangement pattern of the defective data blocks only by estimating the number of "0" s or "1" s included in the defective data blocks in advance.

The reason is that in the ΣΔ-modulated 1-bit data stream, even if the array pattern in the defective data block is, for example, “0010”, “1000”, or “0100”, the data after demodulation does not cause a large error.

However, if the number of "0" s or "1" s contained in the defective data block changes, the demodulated data will be greatly erroneous.

In other words, the error in the ΣΔ-modulated 1-bit data stream does not depend on the array pattern of the data, but largely depends on the number of “0” s or “1” s forming the data.

The digital data interpolating method, interpolating apparatus, recording apparatus and reproducing apparatus according to the present invention are not applied only to the above digital audio recording / reproducing apparatus, and for example, 1-bit digital data is recorded. The recording medium may be an optical recording medium. Further, the predetermined number of samples obtained by dividing the 1-bit digital data into blocks is not limited to four as long as it is the same as the unit of data on which error correction processing is performed.

[0063]

The digital data interpolating apparatus and interpolating method according to the present invention can realize the interpolation of 1-bit digital data which does not require a complicated operation.

Further, since the digital data reproducing apparatus and recording apparatus according to the present invention adopt the above-mentioned interpolating apparatus and interpolating method, there is no need for an arithmetic unit for performing a complicated arithmetic operation, and the miniaturization of the apparatus itself is achieved. it can.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a recording unit of a digital audio data recording / reproducing apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a schematic configuration of a reproducing section of the digital audio data recording / reproducing apparatus.

FIG. 3 is a recording format diagram when the digital audio recording / reproducing apparatus records 1-bit digital data.

4 is a block diagram showing a schematic configuration of an interpolating device in the reproducing section shown in FIG.

5 is a diagram for explaining the operation principle of an interpolation processing unit in the interpolation device shown in FIG.

6 is a diagram for explaining a moving average processor that constitutes an interpolation processing unit in the interpolation device shown in FIG.

FIG. 7 is a configuration diagram of an FIR filter used in the moving average processor.

8 is a flowchart showing a flow of control processing of an interpolation control circuit for controlling the interpolation device shown in FIG.

FIG. 9 is a block diagram showing a schematic configuration of a ΣΔ modulation circuit that outputs 1-bit digital data.

FIG. 10 is a diagram for explaining linear interpolation.

FIG. 11 is a diagram for explaining a previous value hold.

[Explanation of symbols]

12 sync separation and error correction circuit, 13 interpolator, 2
3 interpolation processing control circuit, 31 delay device, 32 interpolation processing unit, 33 selector, 36 moving average processor, 37 number estimation calculator, 38 interpolation data generator

Claims (8)

[Claims] 1. A digital data interpolating device for interpolating a defective data block composed of predetermined bits generated when transmitting digital data digitized by .SIGMA..DELTA. Modulation, which is located in front of the defective data block. And a second average value of the data string which is prevented from overlapping with the defective data block, and a second average value of the data string which is located behind the defective data block and which is prevented from overlapping with the defective data block. Calculating means for obtaining a third average value based on data positioned immediately before and after the defective data block in the data string including the defective data block; and a first average value calculated by the calculating means. Generation means for generating interpolation data based on the second average value, interpolation data generated by the generation means, and third average calculated by the calculation means And an interpolation data generation unit that determines interpolation data of the defective data block based on the array pattern estimated by the estimation unit. An interpolator for digital data. 2. The estimating means estimates the array pattern of the defective data by estimating the number of “0” or “1” included in the defective data block. Digital data interpolator. 3. The digital data interpolating apparatus according to claim 1, wherein the calculating means is composed of an FIR filter. 4. The interpolation of digital data according to claim 1, wherein the interpolation data generation means determines a correct array pattern from the array pattern candidates estimated by the estimation means and uses it as interpolation data. apparatus. 5. A digital data interpolating device for interpolating a defective data block composed of predetermined bits generated when transmitting digital data digitized by ΣΔ modulation, wherein the device is located in front of the defective data block. And a second average value of the data string which is prevented from overlapping with the defective data block, and a second average value of the data string which is located behind the defective data block and which is prevented from overlapping with the defective data block. And a first arithmetic unit that obtains a third average value based on the data located immediately before and after the defective data block in the data string including the defective data block, and calculated by the filter. A second arithmetic unit that calculates interpolation data based on the first average value and the second average value, and interpolation data calculated by the second arithmetic unit. A generator that generates an array pattern of the defective data block based on the third average value obtained by the first arithmetic unit, and determines interpolation data of the defective data block based on the array pattern generated by the generator. An interpolating device for digital data, comprising: 6. A digital data reproducing apparatus for reproducing the digital data from a recording medium on which digital data digitized by ΣΔ modulation is recorded, and detecting means for detecting a defective data block in the reproduced digital data. And a first average value of the data string located in front of the defective data block and prevented from overlapping with the defective data block, and overlapping with the defective data block located behind the defective data block. Calculating means for obtaining a third average value based on the second average value of the prevented data string and the data located immediately before and after the defective data block in the data string including the defective data block; Generating means for generating interpolation data based on the first average value and the second average value calculated by the means; Estimating means for estimating the arrangement pattern of the defective data block based on the generated interpolation data and the third average value obtained by the calculating means, and the defective data based on the arrangement pattern estimated by the estimating means. Interpolation data generation means for determining interpolation data of the block, and switching means for selecting the reproduced digital data and the digital data via the interpolation data generation means based on the detection result of the detection means. An apparatus for reproducing digital data, characterized in that 7. A digital data recording apparatus for recording digital data digitized by .SIGMA..DELTA. Modulation on a recording medium, the detecting means detecting a defective data block in the digital data, and the detecting means detecting the defective data block. A first average value of a data string located in front of the bad data block to prevent duplication with the bad data block, and data located behind the bad data block to prevent duplication with the bad data block. Calculating means for calculating a third average value based on the second average value of the column and data located immediately before and after the defective data block in the data sequence including the defective data block; Generating means for generating interpolation data based on the calculated first average value and second average value; and interpolation data generated by the generating means. The estimating means for estimating the arrangement pattern of the defective data block based on the third average value obtained by the calculating means, and the interpolation data of the defective data block based on the arrangement pattern estimated by the estimating means. Interpolation data generating means for determining, switching means for selecting the reproduced digital data and digital data via the interpolation data generating means based on the detection result by the detecting means, and digital data from the switching means. A recording device for recording on a recording medium, comprising: a recording device for recording digital data. 8. A digital data interpolation method for interpolating a defective data block consisting of predetermined bits generated when transmitting digital data digitized by ΣΔ modulation, wherein the defective data block is located in front of the defective data block. And a second average value of the data string which is prevented from overlapping with the defective data block, and a second average value of the data string which is located behind the defective data block and which is prevented from overlapping with the defective data block. A step of obtaining a third average value based on data located immediately before and immediately after the defective data block in the data string including the defective data block, and the calculated first average value and second average value Calculating the interpolation data based on the above, and calculating the interpolation data of the defective data block based on the calculated interpolation data and the third average value. Determining a complement, interpolation method of the digital data, characterized in that it comprises the step of determining the interpolated data of the defective data block from the candidate string arrangement pattern described above determined.