JPH08316086A - Laminated ceramic electronic component - Google Patents

Laminated ceramic electronic component

Info

Publication number
JPH08316086A
JPH08316086A JP7121775A JP12177595A JPH08316086A JP H08316086 A JPH08316086 A JP H08316086A JP 7121775 A JP7121775 A JP 7121775A JP 12177595 A JP12177595 A JP 12177595A JP H08316086 A JPH08316086 A JP H08316086A
Authority
JP
Japan
Prior art keywords
ceramic
layer
electrodes
internal
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7121775A
Other languages
Japanese (ja)
Inventor
Tamotsu Mitsuya
保 三津谷
Haruhiko Mori
治彦 森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP7121775A priority Critical patent/JPH08316086A/en
Publication of JPH08316086A publication Critical patent/JPH08316086A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • H01G4/12Ceramic dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/30Stacked capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE: To provide a laminated ceramic electronic component characterized in that the crack of the internal electrode boundary by the internal stress caused by the thermal expansion difference between its ceramic layer and electrode layer. CONSTITUTION: Internal electrodes 12a-12g are laminated in the interior of a sintered ceramic body 10 and dummy electrodes 15 made of the same material as that of the internal electrode are disposed with fixed spacings on the outside of the internal electrodes. The dummy electrodes 15 are formed on a stress relaxation layer 10c. The electrodes 12a-12g are formed on an element part 10b and outer layer part 10a is composed of a ceramic layer 14. The thermal shrinkage of the layer 10c is medial between those of the parts 10b and 10a. Therefore, the internal stress by the thermal shrinkage difference between the parts 10b and 10a is relaxed in the temp. falling process after sintering.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、積層セラミック電子部
品に関し、特に、セラミック層と電極層の熱膨張差に起
因する内部応力を緩和させた積層セラミック電子部品に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monolithic ceramic electronic component, and more particularly to a monolithic ceramic electronic component in which internal stress caused by a difference in thermal expansion between a ceramic layer and an electrode layer is relaxed.

【0002】[0002]

【従来の技術】従来の積層セラミック電子部品の一種と
して、積層コンデンサの構造を図7を参照して説明す
る。
2. Description of the Related Art As a kind of conventional monolithic ceramic electronic component, the structure of a monolithic capacitor will be described with reference to FIG.

【0003】積層コンデンサ70は、チタン酸バリウム
などの誘電体セラミックスよりなるセラミック焼結体7
1を用いて形成されている。セラミック焼結体71内に
は、セラミック層を介して重なり合うように複数の内部
電極72a〜72hが形成されている。セラミック焼結
体71の一方端面71aには、内部電極72a,72
c,72f、72hに電気的に接続されるように外部電
極75aが形成され、他方の端面71bには、内部電極
72b,72d,72e,72gに電気的に接続される
ように、外部電極75bが形成されている。内部電極7
2a〜72hは、通常、Ni、PdまたはAg−Pd合
金などの金属材料から構成される。そして、内部電極7
2a〜72hと、各内部電極間に介在するセラミック層
73とによって容量取出部を構成している。
The multilayer capacitor 70 is a ceramic sintered body 7 made of a dielectric ceramic such as barium titanate.
1 is used. Inside the ceramic sintered body 71, a plurality of internal electrodes 72a to 72h are formed so as to overlap with each other with a ceramic layer interposed therebetween. On one end surface 71a of the ceramic sintered body 71, the internal electrodes 72a, 72
The external electrode 75a is formed so as to be electrically connected to the c, 72f, and 72h, and the external electrode 75b is formed on the other end surface 71b so as to be electrically connected to the internal electrodes 72b, 72d, 72e, and 72g. Are formed. Internal electrode 7
2a to 72h are usually made of a metal material such as Ni, Pd, or Ag-Pd alloy. And the internal electrode 7
2a to 72h and the ceramic layer 73 interposed between each internal electrode constitute a capacitance extracting portion.

【0004】上記のような積層コンデンサ70におい
て、便宜上、容量取出部を素子部70bと称し、素子部
70bの上下方向に積層されたセラミック層74,74
を外層部70a,70aと称する。
In the multilayer capacitor 70 as described above, for convenience sake, the capacitance extracting portion is referred to as an element portion 70b, and the ceramic layers 74, 74 laminated in the vertical direction of the element portion 70b.
Are referred to as outer layer portions 70a and 70a.

【0005】積層コンデンサ70の製造に際しては、外
層部70aを構成するための複数枚のセラミックグリー
ンシートと、導電ペーストを内部電極パターンに印刷し
て形成された複数枚の素子部構成用セラミックグリーン
シートとを積層、圧着し、焼成してセラミック焼結体7
1を形成し、さらにセラミック焼結体71の両端面に外
部電極75a,75bを形成する。
In manufacturing the multilayer capacitor 70, a plurality of ceramic green sheets for forming the outer layer portion 70a and a plurality of element-forming ceramic green sheets formed by printing a conductive paste on an internal electrode pattern. Are laminated, pressure-bonded, and fired to obtain a ceramic sintered body 7
1 is formed, and external electrodes 75a and 75b are further formed on both end surfaces of the ceramic sintered body 71.

【0006】[0006]

【発明が解決しようとする課題】上記のように、セラミ
ック焼結体71は、セラミックグリーンシートの積層体
を焼成して形成されている。
As described above, the ceramic sintered body 71 is formed by firing a laminated body of ceramic green sheets.

【0007】このセラミック焼結体71の焼成工程で
は、セラミック層と内部電極との熱膨張係数の差に起因
する内部応力の発生が問題となる。すなわち、チタン酸
バリウムなどを主成分とするセラミック層の熱膨張係数
は、金属を主成分とする内部電極72a〜72hの熱膨
張係数に比べて小さい。従って、図8に模式的に示すよ
うに、焼成後の降温過程において、外層部70aのセラ
ミック層74の収縮量は、素子部70bの内部電極72
a〜72hの収縮量に比べて少なくなる。このため、特
に、最外層に位置する内部電極72a,72hと外層部
のセラミック層74,74との界面に沿って剪断応力が
集中し、図中Xで示す最外層の内部電極72a,72h
の端部に剥離やクラックが発生することがあった。この
ような傾向は、高容量化を目指して内部電極間のセラミ
ック層73が薄くなり、内部電極の総厚みが相対的に大
きくなるに連れて顕著となり、重大な問題となってき
た。
In the firing process of the ceramic sintered body 71, the generation of internal stress due to the difference in thermal expansion coefficient between the ceramic layer and the internal electrode becomes a problem. That is, the coefficient of thermal expansion of the ceramic layer containing barium titanate as a main component is smaller than the coefficient of thermal expansion of the internal electrodes 72a to 72h containing metal as a main component. Therefore, as schematically shown in FIG. 8, in the temperature decreasing process after firing, the shrinkage amount of the ceramic layer 74 of the outer layer portion 70a is determined by the internal electrode 72 of the element portion 70b.
It is smaller than the contraction amount of a to 72h. Therefore, in particular, the shear stress is concentrated along the interface between the outermost internal electrodes 72a and 72h and the outer ceramic layers 74 and 74, and the outermost internal electrodes 72a and 72h indicated by X in the drawing are concentrated.
There were cases where peeling or cracks occurred at the end of the. Such a tendency becomes remarkable as the ceramic layer 73 between the internal electrodes becomes thin in order to increase the capacity and the total thickness of the internal electrodes becomes relatively large, which has become a serious problem.

【0008】本発明の目的は、セラミック材料と電極材
料の熱膨張差に起因して生じる内部応力によって内部電
極とセラミック層の界面にクラックなどが生じることの
ない積層セラミック電子部品を提供することである。
An object of the present invention is to provide a monolithic ceramic electronic component in which internal stress caused by a difference in thermal expansion between a ceramic material and an electrode material does not cause cracks or the like at the interface between the internal electrode and the ceramic layer. is there.

【0009】[0009]

【課題を解決するための手段】本発明による積層セラミ
ック電子部品は、セラミック焼結体を有している。この
セラミック焼結体には、厚み方向に沿って順に外層部、
素子部、外層部が構成されている。素子部は、セラミッ
ク焼結体の厚み方向に所定の厚みのセラミック層を介し
て積層された複数の内部電極を有している。さらに、該
セラミック焼結体は、熱膨張差に起因する内部応力を緩
和するために、素子部と外層部との間において焼結体の
外表面に露出しないように形成された少なくとも1つの
疑似電極を有する応力緩和層を備えている。
The laminated ceramic electronic component according to the present invention has a ceramic sintered body. In this ceramic sintered body, the outer layer portion, in order along the thickness direction,
The element portion and the outer layer portion are configured. The element portion has a plurality of internal electrodes laminated in the thickness direction of the ceramic sintered body via ceramic layers having a predetermined thickness. Further, the ceramic sintered body has at least one pseudo structure formed so as not to be exposed on the outer surface of the sintered body between the element portion and the outer layer portion in order to relieve internal stress caused by the difference in thermal expansion. A stress relaxation layer having an electrode is provided.

【0010】この疑似電極は、電極としての機能をなす
ものではなく、内部電極と同一の材料あるいは内部電極
材料とセラミックとの中間の熱膨張係数を有する材料に
よって形成される層であることを意図する。
The pseudo electrode does not function as an electrode and is intended to be a layer formed of the same material as the internal electrode or a material having a thermal expansion coefficient intermediate between that of the internal electrode material and ceramic. To do.

【0011】また、本発明の限定された局面に従う積層
セラミック電子部品では、応力緩和層の疑似電極が、素
子部の内部電極間の間隔よりも大きい間隔を持って、最
も外側に配置された内部電極のさらに外側に形成されて
いる。
Further, in the multilayer ceramic electronic component according to the limited aspect of the present invention, the pseudo electrodes of the stress relaxation layer are arranged on the outermost side with a distance larger than the distance between the internal electrodes of the element section. It is formed further outside the electrode.

【0012】また、本発明の他の限定された局面に従う
積層セラミック電子部品では、応力緩和層の疑似電極
が、内部電極の厚みよりも薄く形成されている。疑似電
極は、電極として機能しないため、導通性を保持する必
要はなく、内部電極に比べて薄くすることができる。
Further, in the laminated ceramic electronic component according to another limited aspect of the present invention, the pseudo electrode of the stress relaxation layer is formed thinner than the thickness of the internal electrode. Since the pseudo electrode does not function as an electrode, it does not need to maintain conductivity and can be thinner than the internal electrode.

【0013】さらに、本発明の他の限定された局面に従
う積層セラミック電子部品において、応力緩和層は、平
面積の異なる複数の疑似電極を有している。複数の疑似
電極は、セラミック焼結体の素子部側から外層部側へ向
かって順に平面積が減少するように所定の距離をもって
配置されている。
Further, in the multilayer ceramic electronic component according to another limited aspect of the present invention, the stress relaxation layer has a plurality of pseudo electrodes having different plane areas. The plurality of pseudo electrodes are arranged with a predetermined distance so that the plane area decreases in order from the element portion side of the ceramic sintered body toward the outer layer portion side.

【0014】この疑似電極の枚数は特に限定されない。
しかも、外層部側へ向かって、各電極毎に順々に平面積
が減少するように配置してもよく、また、例えば2層毎
に平面積が減少する等、適当な枚数毎に減少するように
配置してもよい。
The number of the pseudo electrodes is not particularly limited.
Moreover, the electrodes may be arranged such that the plane area of each electrode decreases in order toward the outer layer side, or the plane area decreases for every two layers, for example, the plane area decreases. You may arrange so.

【0015】さらに、本発明の他の局面に従う積層セラ
ミック電子部品において、最も外側に配置された内部電
極から外方に向かって所定の距離を隔てた内部電極に平
行な面内に、複数の内部電極同士が重複する平面形状と
異なる平面形状に少なくとも1つの疑似電極が形成され
ている。この疑似電極の平面形状は、任意の形状、例え
ば、一体的に連続した線形状、あるいは内部電極に平行
な面内に散点状に配置される形状など種々の形状が適用
可能である。
Further, in a monolithic ceramic electronic component according to another aspect of the present invention, a plurality of internal parts are provided in a plane parallel to the internal electrodes which are outwardly separated by a predetermined distance from the internal electrodes arranged at the outermost part. At least one pseudo electrode is formed in a planar shape different from the planar shape in which the electrodes overlap. As for the planar shape of the pseudo electrode, various shapes such as an arbitrary shape, for example, a linear shape that is integrally continuous, or a shape that is arranged in a dotted manner in a plane parallel to the internal electrode can be applied.

【0016】[0016]

【作用】図8に示す従来の積層コンデンサにおいて、ク
ラックの発生箇所は、最も外側に位置する内部電極72
a,74hの端部近傍に集中し、素子部の内部の内部電
極とその間のセラミック層との界面にはほとんど発生し
ていない。このような状況から推察すると、素子部で
は、外層部に比べて薄いセラミック層73の両面に内部
電極72a〜72hが配置される構造であり、内部電極
の収縮に伴って薄いセラミック層73がある程度追従し
て収縮することによって両者間の剪断応力が減少したも
のと考えられる。一方、外層部70a,70aと最外層
に配置された内部電極72a,72hとの関係において
は、外層部のセラミック層74,74が相対的に厚く形
成され、しかもその一方表面は外気に接し、他方表面に
のみ内部電極72a,72hが形成される構造となって
いる。このため、片面に形成された内部電極72a,7
2hからセラミック層74に伝えられる熱収縮力は、両
面に内部電極72a〜72hが積層された素子部のセラ
ミック層73に伝えられる熱収縮力に比べて小さく、し
かも層厚の大きいセラミック層74は、素子部の薄いセ
ラミック層73に比べて剛性が高いため、内部電極72
a,72hに伴って十分に収縮せず、このために両者間
に生じる剪断応力が大きくなり、特に熱収縮量の大きい
内部電極72a,72hの端部に集中してクラックが発
生するものと考えられる。
In the conventional multilayer capacitor shown in FIG. 8, cracks are generated at the outermost internal electrode 72.
It is concentrated in the vicinity of the end portions of a and 74h, and hardly occurs at the interface between the internal electrode inside the element portion and the ceramic layer between them. Inferring from such a situation, in the element part, the internal electrodes 72a to 72h are arranged on both surfaces of the ceramic layer 73 which is thinner than the outer layer part, and the thin ceramic layer 73 is formed to some extent as the internal electrodes contract. It is considered that the shear stress between the two is reduced by following and contracting. On the other hand, regarding the relationship between the outer layer portions 70a, 70a and the inner electrodes 72a, 72h arranged in the outermost layers, the ceramic layers 74, 74 of the outer layer portion are formed relatively thick, and one surface thereof is in contact with the outside air, The internal electrodes 72a and 72h are formed only on the other surface. Therefore, the internal electrodes 72a, 7 formed on one surface are
The heat shrinkage force transmitted from 2h to the ceramic layer 74 is smaller than the heat shrinkage force transmitted to the ceramic layer 73 of the element portion in which the internal electrodes 72a to 72h are laminated on both surfaces, and the ceramic layer 74 having a large layer thickness is Since the rigidity is higher than that of the thin ceramic layer 73 of the element part, the internal electrode 72
a, 72h does not shrink sufficiently, and therefore the shearing stress generated between the two becomes large, and it is considered that cracks are concentrated at the ends of the internal electrodes 72a, 72h with a particularly large amount of heat shrinkage. To be

【0017】このような考察により、本発明による積層
セラミック電子部品は、素子部と外層部との間に応力緩
和層を設けている。まず、応力緩和層の内部に疑似電極
を設けると、疑似電極と素子部の最外層に位置する内部
電極とによってセラミック層を挟持した構造を構成する
ことができる。従って、この疑似電極と最外層の内部電
極とによって挟まれたセラミック素子は、疑似電極と内
部電極とによって両面側から熱収縮力を受け、両方の電
極に追随してある程度熱収縮し、これよって熱膨張差
(熱収縮差)に起因する内部応力を緩和する。このた
め、最外層の内部電極表面での剪断応力は低減され、ク
ラックの発生が防止される。この作用は、疑似電極の形
状を線形状あるいは散点状等の任意の形状に形成した場
合にも得ることができる。
From the above consideration, the laminated ceramic electronic component according to the present invention has the stress relaxation layer between the element portion and the outer layer portion. First, when a pseudo electrode is provided inside the stress relaxation layer, a structure in which the ceramic layer is sandwiched between the pseudo electrode and the inner electrode located at the outermost layer of the element portion can be formed. Therefore, the ceramic element sandwiched between the pseudo electrode and the outermost inner electrode receives heat contraction force from both surface sides by the pseudo electrode and the inner electrode, and the heat shrinks to some extent by following both electrodes. The internal stress caused by the difference in thermal expansion (difference in thermal contraction) is relaxed. Therefore, the shear stress on the surface of the innermost electrode of the outermost layer is reduced, and the generation of cracks is prevented. This action can be obtained even when the pseudo electrode is formed in an arbitrary shape such as a linear shape or a scattered shape.

【0018】また、疑似電極と素子部の最外層の内部電
極との間隔を大きくすると、すなわち疑似電極と最外層
の内部電極との間に介在するセラミック層の厚みを大き
くすると、このセラミック層の剛性は、外層部のセラミ
ック層と素子部のセラミック層との中間程度の剛性とな
る。従って、応力緩和層が外層部と素子部の中間的な熱
収縮動作を行う。これにより、外層部と素子部との間に
作用する熱収縮に伴う剪断応力を緩和し、素子部の最外
層に位置する内部電極の端部におけるクラックの発生を
抑制する。
Further, if the distance between the pseudo electrode and the innermost outer electrode of the element portion is increased, that is, if the thickness of the ceramic layer interposed between the pseudo electrode and the innermost outer electrode is increased, this ceramic layer The rigidity is intermediate between the ceramic layer of the outer layer portion and the ceramic layer of the element portion. Therefore, the stress relaxation layer performs an intermediate heat contraction operation between the outer layer portion and the element portion. Thereby, the shear stress caused by the thermal contraction acting between the outer layer portion and the element portion is relaxed, and the generation of cracks at the end portion of the internal electrode located in the outermost layer of the element portion is suppressed.

【0019】また、素子部の最外層に配置された内部電
極の外側に形成された疑似電極の厚みを、内部電極の厚
みよりも小さく形成すると、この薄い疑似電極と最外層
の内部電極との間に介在するセラミック層の剛性が疑似
電極に対して相対的に増大する。このため、内部電極及
び疑似電極から与えられる熱収縮が抑制され、上記と同
様に外層部と素子部との間の剪断力を緩和する。
If the thickness of the pseudo electrode formed outside the internal electrode arranged in the outermost layer of the element portion is made smaller than the thickness of the internal electrode, the thin pseudo electrode and the internal electrode of the outermost layer are separated from each other. The rigidity of the ceramic layer interposed therebetween is relatively increased with respect to the pseudo electrode. Therefore, the heat shrinkage applied from the internal electrode and the pseudo electrode is suppressed, and the shearing force between the outer layer portion and the element portion is relaxed similarly to the above.

【0020】さらに、疑似電極を、素子部側から外層部
側に向かって順に平面積を減少するように配置した場
合、応力緩和層の熱収縮量は、外層部側に向かって素子
部に等しい程度から外層部と同程度にまで順に減少す
る。これにより、外層部と素子部との間の内部応力を分
散し、素子部の最外層に配置された内部電極の表面に生
じるクラックの発生を防止する。
Furthermore, when the pseudo electrodes are arranged so that the plane area decreases in order from the element portion side toward the outer layer portion side, the thermal contraction amount of the stress relaxation layer is equal to the element portion toward the outer layer portion side. It gradually decreases to the same level as the outer layer. This disperses the internal stress between the outer layer portion and the element portion, and prevents the occurrence of cracks on the surface of the internal electrode arranged in the outermost layer of the element portion.

【0021】[0021]

【実施例】以下、本発明の実施例につき図を参照しつつ
説明することにより、本発明を明らかにする。
EXAMPLES The present invention will be clarified by describing examples of the present invention with reference to the drawings.

【0022】第1の実施例 図1は、本発明の第1の実施例による積層コンデンサの
断面構造図であり、図2は、切断線Y−Y方向からの断
面構造図である。積層コンデンサ10は、セラミック焼
結体11と、セラミック焼結体の両端面に形成された外
部電極17,17とから構成される。なお、図1中には
作図上の都合により、一方の外部電極17のみ図示して
いる。
First Embodiment FIG. 1 is a sectional structural view of a multilayer capacitor according to a first embodiment of the present invention, and FIG. 2 is a sectional structural view taken along the line Y--Y. The multilayer capacitor 10 is composed of a ceramic sintered body 11 and external electrodes 17, 17 formed on both end surfaces of the ceramic sintered body. In FIG. 1, only one external electrode 17 is shown for convenience of drawing.

【0023】セラミック焼結体10は、以下のように製
造される。まず、外層部10a用として、耐還元性セラ
ミックスを原料とするセラミックグリーンシートを所定
の形状に成形したものを用意する。
The ceramic sintered body 10 is manufactured as follows. First, for the outer layer portion 10a, a ceramic green sheet made of a reduction resistant ceramic as a raw material is formed into a predetermined shape.

【0024】さらに、応力緩和層10c用として、上記
と同様のセラミックグリーンシートと、その表面にNi
ペーストを内部電極の厚みよりも薄く印刷して疑似電極
を形成したセラミックグリーンシートとを各々5枚用意
する。
Further, for the stress relaxation layer 10c, the same ceramic green sheet as described above and Ni on the surface thereof are used.
Five sheets of ceramic green sheets each having a pseudo electrode formed by printing the paste thinner than the thickness of the internal electrode are prepared.

【0025】さらに、素子部10b用として、上記と同
様のセラミックグリーンシートの表面に、Niペースト
を印刷して内部電極を形成した電極シートを201枚用
意する。
Further, for the element portion 10b, 201 sheets of electrode sheets are prepared in which the Ni paste is printed on the surface of the same ceramic green sheet as described above to form internal electrodes.

【0026】そして、図1に示すように、下層側から、
外層部用のセラミックグリーンシートを積層し、さらに
その表面上に、応力緩和層用として疑似電極を印刷した
セラミックグリーンシートと、印刷していない無地のグ
リーンシートとを交互に5枚ずつ積層する。さらにその
表面上に、素子部用の電極シートを201枚積層する。
さらに、上記と同様に、応力緩和層用のセラミックグリ
ーンシート及び外層部用のセラミックグリーンシートを
積層する。
Then, as shown in FIG. 1, from the lower layer side,
Ceramic green sheets for the outer layer portion are laminated, and on the surface thereof, five ceramic green sheets printed with pseudo electrodes for the stress relaxation layer and five unprinted plain green sheets are alternately laminated. Further, 201 electrode sheets for the element portion are laminated on the surface thereof.
Further, similarly to the above, a ceramic green sheet for the stress relaxation layer and a ceramic green sheet for the outer layer portion are laminated.

【0027】そして、セラミックグリーンシートを積層
した積層体を圧着し、各チップサイズに切断する。その
後、切断したチップ積層体を還元条件下で焼成する。焼
成終了後、常温まで降温し、セラミック焼結体10を得
た。
Then, the laminated body in which the ceramic green sheets are laminated is pressure-bonded and cut into each chip size. Then, the cut chip laminated body is fired under reducing conditions. After firing, the temperature was lowered to room temperature to obtain a ceramic sintered body 10.

【0028】セラミック焼結体10は、その厚み方向に
沿って外層部10a、応力緩和層10c、素子部10
b、応力緩和層10c及び外層部10aが一体的に積層
形成されている。応力緩和層10c,10cは、素子部
10bの最外層に形成された内部電極12a,12gの
外側に、各々セラミック層16を介在して複数枚、本例
では5枚形成されている。セラミック層16の厚さは、
素子部10bの内部電極間のセラミック層13に比べ厚
く、本例では2倍の厚みに形成されている。また、疑似
電極15は、複数の内部電極12a〜12gの互いに重
複する平面の形状と同じ平面形状に形成されている。ま
た、その膜厚は、内部電極12a〜12dの膜厚よりも
薄く形成されている。
The ceramic sintered body 10 has an outer layer portion 10a, a stress relaxation layer 10c, and an element portion 10 along its thickness direction.
b, the stress relaxation layer 10c and the outer layer portion 10a are integrally laminated. A plurality of stress relaxation layers 10c and 10c are formed outside the internal electrodes 12a and 12g formed on the outermost layers of the element portion 10b, with a ceramic layer 16 interposed therebetween, five in this example. The thickness of the ceramic layer 16 is
It is thicker than the ceramic layer 13 between the internal electrodes of the element portion 10b, and is formed to have twice the thickness in this example. Further, the pseudo electrode 15 is formed in the same plane shape as the shape of the planes of the plurality of internal electrodes 12a to 12g that overlap each other. Further, the film thickness thereof is formed thinner than the film thickness of the internal electrodes 12a to 12d.

【0029】このように製造されたセラミック焼結体1
0では、最外層の内部電極12a,12gの表面あるい
は端面近傍でのクラックの発生は見られなかった。これ
は、応力緩和層10cが、多数の内部電極が積層された
素子部10bの相対的に大きな熱収縮動作と、相対的に
厚いセラミック層14から構成される外層部10aの相
対的に小さな熱収縮動作の中間的な熱収縮動作を行った
ことにより、セラミック焼結体10の熱収縮量が素子部
10bから外層部10aに向かって段階的に変化し、素
子部10bと外層部10aの熱収縮量の差に起因する内
部応力の集中が緩和されたことによるものである。
The ceramic sintered body 1 manufactured in this way
In No. 0, no cracks were found on the surfaces of the outermost inner electrodes 12a and 12g or near the end faces. This is because the stress relaxation layer 10c has a relatively large thermal contraction operation of the element portion 10b in which a large number of internal electrodes are laminated, and a relatively small thermal contraction of the outer layer portion 10a composed of the relatively thick ceramic layer 14. By performing the intermediate heat shrinking operation of the shrinking operation, the heat shrinkage amount of the ceramic sintered body 10 changes stepwise from the element portion 10b toward the outer layer portion 10a, and the heat of the element portion 10b and the outer layer portion 10a is reduced. This is because the concentration of internal stress due to the difference in shrinkage amount was relaxed.

【0030】第2の実施例 図3は、本発明の第2の実施例による積層コンデンサの
セラミック焼結体の断面構造図であり、図4はその平面
構造である。なお、図4は、セラミック焼結体31の内
部電極及び疑似電極の形状を模式的に示している。
Second Embodiment FIG. 3 is a sectional structural view of a ceramic sintered body of a multilayer capacitor according to a second embodiment of the present invention, and FIG. 4 is its planar structure. Note that FIG. 4 schematically shows the shapes of the internal electrodes and the pseudo electrodes of the ceramic sintered body 31.

【0031】第2の実施例による積層コンデンサ30の
セラミック焼結体31は、第1の実施例に比べ、応力緩
和層30c,30cの構造のみが相違し、素子部30
b、外層部30aの構造については第1の実施例と同様
である。従って、素子部30bの内部電極32a〜32
f、セラミック層33及び外層部30aのセラミック層
34の構成は、各々第1実施例の素子部10bの内部電
極12a〜12g、セラミック層13及び外層部10a
のセラミック層14の構成と同様であるため、ここでの
説明は省略する。
The ceramic sintered body 31 of the multilayer capacitor 30 according to the second embodiment differs from that of the first embodiment only in the structures of the stress relaxation layers 30c and 30c, and the element portion 30 is different.
b, the structure of the outer layer portion 30a is similar to that of the first embodiment. Therefore, the internal electrodes 32a to 32 of the element portion 30b are
f, the structure of the ceramic layer 33 and the ceramic layer 34 of the outer layer portion 30a are the same as those of the internal electrodes 12a to 12g, the ceramic layer 13 and the outer layer portion 10a of the element portion 10b of the first embodiment.
Since the structure is the same as that of the ceramic layer 14, the description thereof is omitted here.

【0032】応力緩和層30は、平面積の異なる5種類
の疑似電極35a〜35eを同じ大きさの2つの電極を
一組として積層して構成されている。例えば、各疑似電
極35a〜35eは、一辺の長さが10%ずつ短くなる
ように形成されている。各疑似電極35a〜35eの間
にはセラミック層36が介在している。大きさの異なる
複数の疑似電極35a〜35eは、素子部30bの最外
層の内部電極32a,32fから外層部30a,30a
に向かってピラッド状に積層されている。このような応
力緩和層30c,30cを設けたセラミック積層体を焼
成、降温した場合においても、得られたセラミック焼結
体31の最外層の内部電極32a,32fの表面近傍に
はクラックの発生は見られなかった。
The stress relaxation layer 30 is formed by laminating five kinds of pseudo electrodes 35a to 35e having different plane areas as a set of two electrodes having the same size. For example, each of the pseudo electrodes 35a to 35e is formed such that the length of one side is reduced by 10%. A ceramic layer 36 is interposed between the pseudo electrodes 35a to 35e. The plurality of pseudo electrodes 35a to 35e having different sizes are arranged from the innermost electrode 32a, 32f of the element portion 30b to the outer layer portion 30a, 30a.
Are stacked in a pyramid shape toward. Even when the ceramic laminated body provided with such stress relaxation layers 30c, 30c is fired and cooled, cracks are not generated in the vicinity of the surfaces of the outermost internal electrodes 32a, 32f of the obtained ceramic sintered body 31. I couldn't see it.

【0033】このようなピラッド状に配置された疑似電
極35a〜35eを有する応力緩和層30cは、各疑似
電極35a〜35eの端部の位置がセラミック焼結体3
1の中央部分に向かって異なるように構成されているこ
とにより、応力集中が生じる箇所が分散され、この結
果、最外層の内部電極32a,32fの端部近傍にのみ
応力が集中するのを緩和することができたものである。
In the stress relaxation layer 30c having the pseudo electrodes 35a to 35e arranged in the shape of such a pillar, the positions of the ends of the pseudo electrodes 35a to 35e are the ceramic sintered body 3.
By being configured differently toward the central portion of No. 1, the locations where stress concentration occurs are dispersed, and as a result, stress concentration is relaxed only near the ends of the innermost outer electrodes 32a, 32f. I was able to do it.

【0034】第3の実施例 図5は、第3の実施例による積層コンデンサ50のセラ
ミック焼結体51の断面構造図であり、図6は、その平
面構造図である。第3の実施例によるセラミック焼結体
51は、第1の実施例に比べ、応力緩和層50c,50
cの構成のみが相違しており、素子部50bの内部電極
52a〜52f、セラミック層53及び外層部50a,
50aのセラミック層54,54の構成は第1の実施例
における素子部10bの内部電極12a〜12g、セラ
ミック層13及び外層部10a,10aのセラミック層
14,14の構成と同様であるため、ここでの説明は省
略する。
Third Embodiment FIG. 5 is a sectional structural view of a ceramic sintered body 51 of a multilayer capacitor 50 according to a third embodiment, and FIG. 6 is a plan structural view thereof. Compared to the first embodiment, the ceramic sintered body 51 according to the third embodiment has stress relaxation layers 50c, 50.
Only the configuration of c is different, and the internal electrodes 52a to 52f of the element portion 50b, the ceramic layer 53 and the outer layer portion 50a,
The structure of the ceramic layers 54, 54 of 50a is the same as the structure of the internal electrodes 12a to 12g of the element part 10b, the ceramic layer 13, and the ceramic layers 14, 14 of the outer layer parts 10a, 10a in the first embodiment. The description of is omitted.

【0035】応力緩和層50cは、耐還元性セラミック
スを原料とするセラミックグリーンシートの表面に、N
iペーストを印刷することにより格子状の疑似電極55
を形成したセラミックグリーンシートを10枚積層して
構成されている。
The stress relaxation layer 50c is formed on the surface of a ceramic green sheet made of reduction resistant ceramics as a raw material by N
By printing i paste, the grid-like pseudo electrodes 55
It is configured by laminating 10 ceramic green sheets having the above.

【0036】このような応力緩和層50c,50cを積
層した積層体を焼成、降温して得られたセラミック焼結
体51は、素子部50bの最外層に形成された内部電極
52a,52fの表面近傍にクラックの発生は見られな
かった。
The ceramic sintered body 51 obtained by firing and lowering the temperature of the laminated body in which the stress relaxation layers 50c and 50c are laminated is the surface of the internal electrodes 52a and 52f formed in the outermost layer of the element portion 50b. No cracks were found in the vicinity.

【0037】応力緩和層50cは、内部電極52a〜5
2fに平行な面内において疑似電極55が不連続に形成
されている。このような不連続な疑似電極55を含む平
面内では、素子部50bのように、連続的な内部電極5
2a〜52fを含む層に比べ、水平方向への熱収縮動作
が相対的に緩和される。このため、素子部50bから応
力緩和層50c、外層部50aの順に熱収縮量が段階的
に減少することにより、これに伴って水平方向への内部
応力が分散され、素子部50bの最外層の内部電極52
a,52f表面に応力集中が生じるのを緩和している。
The stress relaxation layer 50c is composed of the internal electrodes 52a-5.
The pseudo electrodes 55 are discontinuously formed in the plane parallel to 2f. In the plane including such a discontinuous pseudo electrode 55, like the element portion 50b, a continuous internal electrode 5 is formed.
As compared with the layer including 2a to 52f, the heat shrinking operation in the horizontal direction is relatively relaxed. Therefore, the thermal contraction amount gradually decreases in the order of the element portion 50b, the stress relaxation layer 50c, and the outer layer portion 50a, and accordingly, the internal stress in the horizontal direction is dispersed, and the outermost layer of the element portion 50b is dispersed. Internal electrode 52
The stress concentration on the surfaces of a and 52f is reduced.

【0038】なお、このような観点から、疑似電極55
の形状は、図6に示すような格子状に限定されるもので
はなく、スリット状、ドット状、折れ線形状など任意の
形状のものを適用することができる。また、積層枚数
は、セラミック焼結体などの形状に応じて適宜設定する
ことができる。
From this point of view, the pseudo electrode 55 is used.
The shape of is not limited to the grid shape as shown in FIG. 6, and any shape such as slit shape, dot shape, and broken line shape can be applied. Further, the number of stacked layers can be appropriately set according to the shape of the ceramic sintered body or the like.

【0039】なお、上記第1〜第3の実施例の応力緩和
層に形成される疑似電極は、内部電極と同一材料のもの
が好ましいが、内部電極とセラミックとの間程度の熱膨
張係数を有する材料であれば、他の材料を用いて形成し
てもよく、その積層枚数は適宜調整することができる。
内部電極の材料もNiに限らず、PdやAg−Pd合金
等を用いてもよい。
The pseudo electrodes formed on the stress relaxation layers of the first to third embodiments are preferably made of the same material as the internal electrodes, but have a coefficient of thermal expansion between the internal electrodes and the ceramic. Other materials may be used as long as the materials have them, and the number of stacked layers can be appropriately adjusted.
The material of the internal electrodes is not limited to Ni, but Pd, Ag—Pd alloy, or the like may be used.

【0040】また、上記の第1〜第3の実施例による応
力緩和層の構成は、相互に組合せることが可能である。
すなわち、応力緩和層の内部に、第1の実施例による厚
みの薄い疑似電極層と、第2の実施例による平面積の減
少した疑似電極と、第3の実施例による不連続形状の疑
似電極とを適宜組合せる等してもよい。
Further, the structures of the stress relaxation layers according to the above-mentioned first to third embodiments can be combined with each other.
That is, inside the stress relaxation layer, the thin pseudo electrode layer according to the first embodiment, the pseudo electrode with reduced plane area according to the second embodiment, and the discontinuous pseudo electrode according to the third embodiment. And may be appropriately combined.

【0041】[0041]

【発明の効果】以上のように、本発明による積層セラミ
ック電子部品では、例えば熱収縮量の小さい外層部と相
対的に熱収縮量の大きい素子部との間に応力緩和層を設
けるように構成したことによって、熱膨張差に起因する
内部応力による内部電極とセラミック層との界面近傍で
のクラックや剥離を防止することが可能となり、信頼性
の高い積層セラミック電子部品を得ることができる。
As described above, in the monolithic ceramic electronic component according to the present invention, for example, the stress relaxation layer is provided between the outer layer portion having a small heat shrinkage and the element portion having a relatively large heat shrinkage. By doing so, it is possible to prevent cracks and peeling near the interface between the internal electrode and the ceramic layer due to internal stress caused by the difference in thermal expansion, and it is possible to obtain a highly reliable multilayer ceramic electronic component.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例の積層コンデンサの断面
構造図。
FIG. 1 is a sectional structural view of a multilayer capacitor according to a first embodiment of the present invention.

【図2】図1に示す積層コンデンサの切断線Y−Yに沿
った方向からの側面断面構造図。
FIG. 2 is a side sectional structural view of the multilayer capacitor shown in FIG. 1 taken along a section line Y-Y.

【図3】本発明の第2の実施例による積層コンデンサの
断面構造図。
FIG. 3 is a sectional structural view of a multilayer capacitor according to a second embodiment of the present invention.

【図4】図3に示す積層コンデンサの平面構造図。4 is a plan view of the multilayer capacitor shown in FIG.

【図5】本発明の第3の実施例による積層コンデンサの
断面構造図。
FIG. 5 is a sectional structural view of a multilayer capacitor according to a third embodiment of the present invention.

【図6】図5に示す積層コンデンサの平面構造図。6 is a plan view of the multilayer capacitor shown in FIG.

【図7】従来の積層コンデンサの断面構造図。FIG. 7 is a sectional structural view of a conventional multilayer capacitor.

【図8】図7に示す積層コンデンサの焼結後の降温時に
おける熱収縮状態を示す説明図。
FIG. 8 is an explanatory view showing a heat shrinkage state of the multilayer capacitor shown in FIG. 7 after sintering and at the time of temperature decrease.

【符号の説明】[Explanation of symbols]

10,30,50…積層コンデンサ 11,31,51…セラミック焼結体 10a,30a,50a…外層部 10b,30b,50b…素子部 10c,30c,50c…応力緩和層 12a〜12g,32a〜32f,52a〜52f…内
部電極 15〜15,35a〜35e,55…疑似電極 13,16,33,36,53,56…セラミック層
10, 30, 50 ... Multilayer capacitor 11, 31, 51 ... Ceramic sintered body 10a, 30a, 50a ... Outer layer portion 10b, 30b, 50b ... Element portion 10c, 30c, 50c ... Stress relaxation layer 12a-12g, 32a-32f , 52a to 52f ... Internal electrodes 15 to 15, 35a to 35e, 55 ... Pseudo electrodes 13, 16, 33, 36, 53, 56 ... Ceramic layers

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 セラミック焼結体を有する積層セラミッ
ク電子部品であって、 前記セラミック焼結体には、厚み方向に沿って順に、外
層部、素子部、外層部が構成されており、 前記素子部は、所定の厚みのセラミック層を介して前記
セラミック焼結体の厚み方向に積層された複数の内部電
極を有しており、 さらに、熱膨張差に起因する内部応力を緩和するため
に、前記素子部と少なくとも一方の前記外層部との間に
おいて焼結体の外表面に露出されないように形成され
た、少なくとも1つの疑似電極を有する応力緩和層を備
えたことを特徴とする、積層セラミック電子部品。
1. A monolithic ceramic electronic component having a ceramic sintered body, wherein the ceramic sintered body comprises an outer layer portion, an element portion, and an outer layer portion in order along the thickness direction. The portion has a plurality of internal electrodes laminated in the thickness direction of the ceramic sintered body via a ceramic layer having a predetermined thickness, and further, in order to relieve internal stress caused by a difference in thermal expansion, A multilayer ceramic comprising a stress relaxation layer having at least one pseudo electrode formed between the element portion and at least one of the outer layer portions so as not to be exposed on the outer surface of the sintered body. Electronic components.
【請求項2】 前記応力緩和層が、複数の前記内部電極
の内、前記セラミック焼結体の厚み方向の最も外側に配
置された内部電極のさらに外側に、複数の前記内部電極
間の間隔よりも大きい間隔をもって形成された疑似電極
を備えることを特徴とする、請求項1に記載の積層セラ
ミック電子部品。
2. The stress relieving layer further includes a plurality of internal electrodes, the inner electrode being disposed on the outermost side in the thickness direction of the ceramic sintered body, among the plurality of internal electrodes. The multilayer ceramic electronic component according to claim 1, further comprising pseudo electrodes formed with a large interval.
【請求項3】 前記応力緩和層の前記疑似電極が、前記
内部電極の厚みよりも薄く形成されていることを特徴と
する、請求項1に記載の積層セラミック電子部品。
3. The multilayer ceramic electronic component according to claim 1, wherein the pseudo electrode of the stress relaxation layer is formed thinner than the thickness of the internal electrode.
【請求項4】 前記応力緩和層は、平面積の異なる複数
の前記疑似電極を有しており、 複数の前記疑似電極は、前記素子部側から前記外層側へ
向かって、順に平面積が減少するように所定の距離をも
って配置されていることを特徴とする、請求項1に記載
の積層セラミック電子部品。
4. The stress relaxation layer has a plurality of the pseudo electrodes having different plane areas, and the plurality of the pseudo electrodes have a plane area decreasing in order from the element portion side to the outer layer side. 2. The laminated ceramic electronic component according to claim 1, wherein the laminated ceramic electronic component is arranged with a predetermined distance.
【請求項5】 前記セラミック焼結体の厚み方向の最も
外側に配置された前記内部電極から外方に向かって所定
の距離を隔てられており、かつ前記内部電極に平行な面
内に、複数の前記内部電極同士が重複する平面形状と異
なる平面形状を有するように少なくとも1つの前記疑似
電極が形成されていることを特徴とする、請求項1に記
載の積層セラミック電子部品。
5. A plurality of ceramic ceramics are arranged in a plane parallel to the internal electrodes, which is separated from the internal electrodes arranged at the outermost side in the thickness direction of the ceramic sintered body by a predetermined distance toward the outside. 2. The multilayer ceramic electronic component according to claim 1, wherein at least one of the pseudo electrodes is formed so as to have a planar shape different from the planar shape in which the internal electrodes overlap each other.
JP7121775A 1995-05-19 1995-05-19 Laminated ceramic electronic component Pending JPH08316086A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7121775A JPH08316086A (en) 1995-05-19 1995-05-19 Laminated ceramic electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7121775A JPH08316086A (en) 1995-05-19 1995-05-19 Laminated ceramic electronic component

Publications (1)

Publication Number Publication Date
JPH08316086A true JPH08316086A (en) 1996-11-29

Family

ID=14819584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7121775A Pending JPH08316086A (en) 1995-05-19 1995-05-19 Laminated ceramic electronic component

Country Status (1)

Country Link
JP (1) JPH08316086A (en)

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006324576A (en) * 2005-05-20 2006-11-30 Tdk Corp Laminated electronic component
WO2006129783A1 (en) * 2005-06-03 2006-12-07 Murata Manufacturing Co., Ltd. Laminated ceramic capacitor
JP2007081008A (en) * 2005-09-13 2007-03-29 Matsushita Electric Ind Co Ltd Laminated capacitor and molded capacitor
US7245505B2 (en) 2002-09-04 2007-07-17 Murata Manufacturing Co., Ltd. Laminated electronic component
KR100826408B1 (en) * 2006-10-11 2008-05-02 삼성전기주식회사 Multi-layered ceramic capacitor
US7394646B2 (en) 2005-03-28 2008-07-01 Tdk Corporation Laminated ceramic electronic component
JP2013004985A (en) * 2011-06-17 2013-01-07 National Cheng Kung Univ Electronic component and manufacturing method therefor
CN103137326A (en) * 2011-12-01 2013-06-05 李文熙 Electronic component and manufacturing method thereof
US8564930B2 (en) 2011-04-13 2013-10-22 Taiyo Yuden Co., Ltd. Laminated capacitor
US8630081B2 (en) 2010-07-21 2014-01-14 Murata Manufacturing Co., Ltd. Ceramic electronic component
EP2819134A3 (en) * 2012-05-30 2015-05-06 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component, board for mounting the same, and packing unit thereof
JP2016149555A (en) * 2015-02-13 2016-08-18 サムソン エレクトロ−メカニックス カンパニーリミテッド. Multilayer ceramic electronic component and mount board thereof
JP2016149531A (en) * 2015-02-13 2016-08-18 サムソン エレクトロ−メカニックス カンパニーリミテッド. Multilayer ceramic electronic component and mount board thereof
CN107305812A (en) * 2016-04-18 2017-10-31 三星电机株式会社 Capacitor
CN108878148A (en) * 2018-05-30 2018-11-23 广东风华高新科技股份有限公司 A kind of multilayer ceramic capacitor and preparation method thereof
JP2020115522A (en) * 2019-01-18 2020-07-30 太陽誘電株式会社 Multilayer ceramic capacitor
US20220189689A1 (en) * 2020-12-14 2022-06-16 Samsung Electro-Mechanics Co., Ltd. Multilayer electronic component

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7245505B2 (en) 2002-09-04 2007-07-17 Murata Manufacturing Co., Ltd. Laminated electronic component
US7394646B2 (en) 2005-03-28 2008-07-01 Tdk Corporation Laminated ceramic electronic component
KR100976308B1 (en) * 2005-03-28 2010-08-16 티디케이가부시기가이샤 Laminated ceramic electronic component
JP2006324576A (en) * 2005-05-20 2006-11-30 Tdk Corp Laminated electronic component
WO2006129783A1 (en) * 2005-06-03 2006-12-07 Murata Manufacturing Co., Ltd. Laminated ceramic capacitor
US7436650B2 (en) 2005-06-03 2008-10-14 Murata Manufacturing Co., Ltd. Laminated ceramic capacitor
JP2007081008A (en) * 2005-09-13 2007-03-29 Matsushita Electric Ind Co Ltd Laminated capacitor and molded capacitor
KR100826408B1 (en) * 2006-10-11 2008-05-02 삼성전기주식회사 Multi-layered ceramic capacitor
US8630081B2 (en) 2010-07-21 2014-01-14 Murata Manufacturing Co., Ltd. Ceramic electronic component
US8564930B2 (en) 2011-04-13 2013-10-22 Taiyo Yuden Co., Ltd. Laminated capacitor
US8810993B2 (en) 2011-04-13 2014-08-19 Taiyo Yuden Co., Ltd. Laminated capacitor
JP2013004985A (en) * 2011-06-17 2013-01-07 National Cheng Kung Univ Electronic component and manufacturing method therefor
CN103137326A (en) * 2011-12-01 2013-06-05 李文熙 Electronic component and manufacturing method thereof
EP2819134A3 (en) * 2012-05-30 2015-05-06 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component, board for mounting the same, and packing unit thereof
KR20160099881A (en) * 2015-02-13 2016-08-23 삼성전기주식회사 Multi-layered ceramic electronic part and board having the same
JP2016149531A (en) * 2015-02-13 2016-08-18 サムソン エレクトロ−メカニックス カンパニーリミテッド. Multilayer ceramic electronic component and mount board thereof
JP2016149555A (en) * 2015-02-13 2016-08-18 サムソン エレクトロ−メカニックス カンパニーリミテッド. Multilayer ceramic electronic component and mount board thereof
KR20160099880A (en) * 2015-02-13 2016-08-23 삼성전기주식회사 Multi-layered ceramic electronic part and board having the same
CN107305812A (en) * 2016-04-18 2017-10-31 三星电机株式会社 Capacitor
CN108878148A (en) * 2018-05-30 2018-11-23 广东风华高新科技股份有限公司 A kind of multilayer ceramic capacitor and preparation method thereof
JP2020115522A (en) * 2019-01-18 2020-07-30 太陽誘電株式会社 Multilayer ceramic capacitor
US20220189689A1 (en) * 2020-12-14 2022-06-16 Samsung Electro-Mechanics Co., Ltd. Multilayer electronic component
US11605502B2 (en) * 2020-12-14 2023-03-14 Samsung Electro-Mechanics Co., Ltd. Multilayer electronic component

Similar Documents

Publication Publication Date Title
JPH08316086A (en) Laminated ceramic electronic component
JP4816648B2 (en) Multilayer capacitor
JP4404089B2 (en) Feedthrough capacitor array
JP3393524B2 (en) NTC thermistor element
JPH08130160A (en) Manufacture of multilayer ceramic electronic component
JP4629979B2 (en) Piezoelectric actuator with structured external electrode
JP5267363B2 (en) Multilayer electronic components
JP3316731B2 (en) Multilayer ceramic electronic components
KR100695374B1 (en) Piezo Element with a Multiple-Layer Structure Produced by Folding
JPH1012475A (en) Layer-built ceramic electronic component
JPH10312933A (en) Laminated ceramic electronic parts
JP7359019B2 (en) electronic components
JPH09190947A (en) Laminated ceramic electronic component
JPH11135356A (en) Laminated ceramic capacitor
JPH11214244A (en) Monolithic ceramic capacitor
JP2000138127A (en) Laminated ceramic capacitor
JP2596131B2 (en) Noise filter
JPH05243007A (en) Laminated thermistor
JP3266477B2 (en) Manufacturing method of multilayer capacitor
JP2958843B2 (en) Connection structure between internal electrode and external electrode of multilayer piezoelectric element
JP3006355B2 (en) Manufacturing method of laminated piezoelectric element
JPH0738168A (en) Layer-built piezo-electric device
JP3334464B2 (en) Multilayer ceramic capacitors
JPH0644101U (en) Chip type positive temperature coefficient thermistor element
JP2000174581A (en) Lamination type piezoelectric resonator and its manufacture