JPH0831063B2 - Storage device data security device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data security device for a storage device, and more particularly to a data security device when a connected external control device fails.

[Conventional technology]

In recent years, memory devices have made remarkable progress in semiconductor integrated circuits, especially
Due to the increase in capacity of memory integrated circuits and the reduction in unit price per bit, the large-scale storage devices have come to be provided. Conventionally, in a computer, data is frequently stored in a semiconductor storage device called a main memory for frequently used data and in an external control device such as a magnetic disk for low data storage. Although these devices are controlled by a storage controller and an input / output controller (since the operating speeds of the semiconductor storage device and the external storage device such as a magnetic disk are completely different, the control device is different). , When a storage controller fails, important data in its main memory is also stored in the external storage device, so when the storage controller recovers, it is input from the external storage device to the main memory. . In addition, since the external storage device starts its operation after all the operation commands, stored data, etc. from the input / output control device are normally input,
Data is guaranteed even if the input / output control device fails in the middle. As the external storage device, a large-scale storage device made of a semiconductor has been provided as described above, and a device called an electronic disk has come to be provided due to its high speed.

[Problems to be solved by the invention]

In the case of the main memory, the conventional storage device described above restores data from the external storage device when the storage control device fails and recovers. There is a drawback of this.

Also, in order to take advantage of its high speed, a large-scale external storage device made of semiconductor is very difficult to use, such as a magnetic disk, which operates after it is judged that all operation commands and data are normal. Therefore, there is a drawback that it takes a long time to recover by treating it like the main memory.

[Means for solving problems]

A data integrity device for a storage device according to the present invention comprises a normality checking means for checking an abnormality of the external control device according to an input signal state of the external control device in the storage device in which data is written and read by the external control device; Monitor means for monitoring whether or not the control device is rewriting data, and an abnormal signal from the normality check means are input, and at the time of transition to abnormal, the operating signal from the monitor means is input. For example, an error detecting means for generating an error signal, a holding means for holding the content of an instruction in operation by the error signal from the error detecting means, and an interface with an external control device by an abnormal signal from the normality checking means. Disconnect so that only commands for reconnecting from the external controller are accepted, and the external controller becomes normal and reconnects. By reconnecting the interface only when a command is input, the reconnection command is input even if the external control device issues a command that the input signal is in a normal state when the external control device fails. It has an interface lock means for guaranteeing the contents of data other than the data destruction portion by not performing any operation up to.

EXAMPLES Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. In FIG.
This embodiment is a data integrity system for a storage device. An external controller (not shown) status signal 1 is input, an external normality check circuit 2 for checking an abnormality of the external controller, and an interface signal 14 are normally input. And an operation control circuit 15. The check circuit 2 supplies an external abnormality signal 3 to the error detection circuit 5 and the interface lock circuit 6 when the external control device has an abnormality. The interface lock circuit 6 outputs an interface lock signal when an external abnormality occurs.
When the lock release signal 12 is input from the normal operation control circuit 15 described later and the external abnormal signal 3 is released, the interface lock signal 13 is turned off. On the other hand, the normal operation control circuit 15
When the interface lock signal 13 is turned off, the operation start signal 11 is output, and at the time of data rewriting, the data rewriting monitor set signal 16 is changed to the data rewriting operation monitor circuit 7.
Even if the interface lock signal 13 is ON, if the interface signal 14 indicates a lock release command, the lock release signal 12 is output and the command content 8 in operation is output. The data rewriting operation monitor circuit 7 is set by the data rewriting monitor set signal 16 from the normal operation control circuit 15, and the rewriting operation signal 4 is set until the rewriting operation end time.
Is output to the error detection circuit 5. When the external abnormality signal 3 is input while the rewriting signal 4 is being input, the error detection circuit 5 outputs an error signal 9 to the error information holding circuit 10.
When the error signal 9 is input to the error information holding circuit 10,
It is configured to hold the instruction content 8 in operation, that is, which portion of the data is being rewritten.

The operation of this embodiment will be described with reference to the time charts of FIGS. In FIG. 2, when the external control device status signal 1 now indicates normality, the external normality check circuit 2 keeps the external abnormal signal 3 at "0". The circuit 6 also keeps the interface lock signal 13 at "0". Therefore, when the normal operation control circuit 15 receives the interface signal 14, it outputs the operation start signal 11 based on the interface signal 14, and
If this operation is a data rewriting operation, the data rewriting monitor set signal 16 is output. At this time, the operating instruction content 8 is also output. The data rewriting operation monitor circuit 7 keeps the rewriting signal at "1" until the rewriting operation is completed after the monitor set signal 16 is input. Normally, the operation is performed in this manner, but a case where the external control device has some abnormality will be described with reference to FIG. In FIG. 3, when the external controller status signal 1 indicates an abnormality, the external normality check circuit 2 sets the external abnormality signal 3 to the "1" state. The interface lock circuit 6 receives the interface lock signal by this signal.
Hold 13 at “1”. At this time, even if the interface signal 14 is input to the normal operation control circuit 15, if the content of the interface is other than the unlock command, the lock signal 13 is set to "1".
Therefore, the output signal of the control circuit 15, the operation start signal 11, the data rewriting monitor set signal 16, the lock release signal 12 and the in-operation instruction content 8 are all "0", and no operation is performed.

Next, a case where the state of the external control device changes during operation will be described with reference to FIG. In FIG. 4, the normal operation is started by the same operation as in the case of FIG. 2, but when the external control device status signal 1 changes from normal to abnormal during operation, the external normality check circuit 2 causes the external abnormal signal By switching 3 from "0" to "1", both the interface lock circuit 6 and the interface lock signal 13 are changed from "0" to
Move to "1" and stop accepting subsequent interface signals. Also, the transition from “0” to “1” of the external abnormality signal 3 is started, and the error detection circuit 5 detects that the data is being rewritten at present by the rewriting signal 4 and outputs the error signal 9. Output (when the external control device becomes abnormal during data rewriting, an error occurs because the rewriting data is not guaranteed), this error signal 9 causes an error information holding circuit.
Reference numeral 10 holds the instruction content 8 during operation. By this,
In this embodiment, by knowing the operating state (mainly the address) that may cause a malfunction when the external control device returns to normal, the normality of other parts is guaranteed, and only the correction of the corresponding part is performed. By this, it is possible to return to the normal operation again.

After the external control device becomes abnormal and returns to normal,
Since the interface remains in the locked state, the operation for releasing it will be described with reference to FIG. Interface signal
When 14 is input to the normal operation control circuit 15, the interface lock signal 13 is "1", but since the content of the interface signal is unlock, the control circuit 15 outputs the unlock signal 12. As a result, the interface lock circuit 6 returns the interface lock signal 13 from "1" to "0" and normal operation becomes possible.

〔The invention's effect〕

As described above, according to the present invention, by constantly observing the state of the external control device, the external interface is shut off when the external device is abnormal, and the content of the operation that is suspected of malfunctioning is retained. When the device is restored, the data content can be guaranteed to the maximum extent.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIGS. 2 to 5 are diagrams showing a time chart in this embodiment. 1 ... External controller status signal, 2 ... External normality check circuit, 3 ... External abnormal signal, 4 ... Rewriting signal, 5 ...
... error detection circuit, 6 ... interface lock circuit,
7 ... Data rewriting operation monitor circuit, 8 ... Operation instruction content, 9 ... Error signal, 10 ... Error information holding circuit, 11
...... Operation start signal, 12 …… Unlock signal, 13 …… Interface lock signal, 14 …… Interface signal, 15
…… Normal operation control circuit, 16 …… Data rewrite monitor set signal.

Claims (1)

[Claims] 1. A normality checking means for checking an abnormality of an external control device according to an input signal state of the external control device in a storage device for writing and reading data by the external control device, and the external control device rewriting data. Monitor means for monitoring whether or not it is operating, and an abnormal signal from the normality check means are input, and an error signal is generated if the operating signal from the monitor means is input at the time of transition to an abnormality. The error detection means, the holding means for holding the instruction content in operation by the error signal from the error detection means, and the abnormal signal from the normality check means cause the interface with the external control device to re-establish the interface from the external control device. Only when the external control device becomes normal and the reconnection command is input, disconnect it so that it will not accept anything other than the connection command. By reconnecting the interface, in the event of a fault of the external control unit, by not perform any operation to be an input signal from the external control device indicates the normal state, reconnection instruction is input,
A data security device for a storage device, characterized in that it is constituted by an interface lock means for guaranteeing the contents of data other than the data destruction portion.