JPH01102658A - File write back-up system - Google Patents

File write back-up system

Info

Publication number
JPH01102658A
JPH01102658A JP62259669A JP25966987A JPH01102658A JP H01102658 A JPH01102658 A JP H01102658A JP 62259669 A JP62259669 A JP 62259669A JP 25966987 A JP25966987 A JP 25966987A JP H01102658 A JPH01102658 A JP H01102658A
Authority
JP
Japan
Prior art keywords
data
write
flag
service interruption
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62259669A
Other languages
Japanese (ja)
Inventor
Kazuya Hori
堀 一哉
Shoshichi Munakata
宗像 昭七
Noboru Kinoshita
登 木下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62259669A priority Critical patent/JPH01102658A/en
Publication of JPH01102658A publication Critical patent/JPH01102658A/en
Pending legal-status Critical Current

Links

Landscapes

  • Power Sources (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To prevent the destruction of a file caused by a service interruption occurring in a data writing mode by backing up a memory via a spare power supply and adding a flag circuit to detect the service interruption occurring in the data writing mode so that the data is rewritten at recovery of the service interruption and only when said flag is set based on the stored write data. CONSTITUTION:An under-write service interruption detecting flag circuit 2-2 which detects a service interruption in a write mode and sets a flag is added to a disk controller 2 together with a battery 2-5 which supplies the power to the circuit 2-2 and a control data memory circuit 2-1 at service interruption. When the service interruption is recovered, a microprocessor 2-3 identifies the flag and performs the write processing again by a battery 2-5 based on the stored control information and data only when the flag is set. In such a way, the data can be correctly written again at recovery of the service interruption that occurs while the data is written to a disk device 3. Thus a serious fault of a system is never produced while a file is kept broken.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はディスク制御装置に係り、特にデータ書キ込み
中の停電によるファイル破壊を防止するのに好適なファ
イル書き込みバックアップ方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a disk control device, and particularly to a file write backup method suitable for preventing file destruction due to a power outage during data writing.

〔従来の技術〕[Conventional technology]

従来の装置は、特開昭61−18319号公報に記載の
ように主要な装置全体をバッテリーでバックアップして
おり、装置が大きくなればなるほどバックアップ設備が
非常に高価格なものとなっていた。
In conventional devices, the entire main device is backed up by a battery as described in Japanese Patent Application Laid-open No. 61-18319, and the larger the device, the more expensive the backup equipment becomes.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術は、原価上非常に高価なものとなり、低価
格の小型計算機システムに対する配慮がされていないと
いう問題点があった。
The above-mentioned conventional technology has a problem in that it is very expensive in terms of cost and does not take into consideration low-cost small computer systems.

本発明の目的は、上記原価上の問題を解決する低原価で
簡易なファイルのバックアップ方式を提供することにあ
る。
An object of the present invention is to provide a low-cost and simple file backup method that solves the above cost problem.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は1元来ディスク制御装置内忙持たれる書込み
データとその制御情報とを一時記憶するメモリを予備電
源でバックアップし、かつ書込み中の停電検知フラグ回
路を設け、復電時に制御部により同フラグを識別し、フ
ラグがセットされている場合のみ記憶されている書込み
データによって再書込みをするという方式により達成さ
れる。
The above purpose is to back up the memory that temporarily stores the write data and its control information that are busy in the disk control device with a backup power source, and to provide a flag circuit for detecting a power failure during writing, so that the control unit can detect the power failure when the power is restored. This is achieved by identifying the flag and rewriting with the stored write data only when the flag is set.

〔作用〕[Effect]

メモリ(制御データ記憶回路)には書込み動作中の最新
の制御情報及びデータが記憶されている。
The latest control information and data during the write operation are stored in the memory (control data storage circuit).

書込み中の停電検出フラグ回路は、書込み回路が動作中
の時に発生した停電でのみ動作し検出フラグがセットさ
れる。
The power failure detection flag circuit during writing operates only when a power failure occurs while the write circuit is in operation, and the detection flag is set.

制御データ記憶回路および書込み中の停電検出フラグ回
路とも予備電源により電源バックアップしているため、
記憶内容は停電があっても消滅しない。
Both the control data storage circuit and the power failure detection flag circuit during writing are backed up by a backup power supply.
The memory contents will not be erased even if there is a power outage.

復電後、制御部は該フラグを識別し、フラグがセットさ
れている場合にのみ予備電源により記憶保持されていた
制御情報およびデータにより再書込み処理を行うため1
通常動作時および書込み実行中以外で電源断(″FIi
L源スイッチOFF 、停電等による)した場合は再書
込み動作が誤まって行われるごとはない。
After the power is restored, the control unit identifies the flag and performs rewriting processing using the control information and data stored in the standby power supply only if the flag is set.
Power off (“FIi”) except during normal operation and writing
(by turning off the L source switch, power outage, etc.), the rewriting operation will not be performed by mistake.

〔実施例〕〔Example〕

以下1本発明の一実施例を第1図および第2図により説
明する。
An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

第1図において、1は処理装置、2はディスク制御装置
、3はディスク装置を示す。ディスク装置3へのデータ
書込みは、主メモIJ 1−1から入出力バスαを介し
て制御データ記憶回路2−1に転送されるディスク制御
用のディスクアドレス。
In FIG. 1, 1 is a processing device, 2 is a disk control device, and 3 is a disk device. Data is written to the disk device 3 using a disk address for disk control transferred from the main memory IJ 1-1 to the control data storage circuit 2-1 via the input/output bus α.

データ数等の制御パラメータおよび書込みデータにより
、制御部の機能を果たすマイクロプロセッサ2−3で実
行されるマイクロプログラムの制御の下で、書込み制御
回路2−4が動作し、ディスクインターフェースeを介
してディスク装置3に対し書込み指定とデータ書込みが
実行される。
Based on control parameters such as the number of data and write data, the write control circuit 2-4 operates under the control of a microprogram executed by the microprocessor 2-3 that functions as a control unit, and the write control circuit 2-4 operates via the disk interface e. Write designation and data writing to the disk device 3 are executed.

ディスク制御装置2には、書込み中の停電を検出しフラ
グをセットする書込み中停電検出フラグ回路2−2が設
けられており、処理装置1でのパワーリセット回路1−
2から電源断時に入出力バスaを介して送られるパワー
リセット信号fおよび書込み制御回路2−4から送られ
る書込み中信号Cが入力されており、書込み中に停電に
よる電源断が発生した場合にのみ書込み中停電検出フラ
グ信号dがマイクロプロセッサ2−3へ出力されるよう
に回路が構成されている。また、バッテリー2−5は電
源供給線すにより制御データ記憶回路2−1および書込
み中停電検出回路2−2に対し。
The disk control device 2 is provided with a write power failure detection flag circuit 2-2 that detects a power failure during writing and sets a flag.
A power reset signal f sent via the input/output bus a when the power is turned off from 2-4 and a writing signal C sent from the write control circuit 2-4 are input from 2-4. The circuit is configured such that only during writing, the power failure detection flag signal d is output to the microprocessor 2-3. Further, the battery 2-5 is connected to the control data storage circuit 2-1 and the write power failure detection circuit 2-2 through a power supply line.

停電時の電源を供給し、該回路内の情報が消滅しないよ
う予備電源の役割を果している。
It supplies power during power outages and serves as a backup power source to prevent information in the circuit from disappearing.

第2図は書込み中の停電による電源断から復電 ・後の
ハードウェアとマイクロプログラムの動きを説明する流
れ図である。図中ハードウェアが書込み動作中に電源断
があり、前記第1図での説明に従って書込み中停電検出
フラグがセットされる。
Figure 2 is a flowchart explaining the behavior of the hardware and microprogram after the power is restored and the power is cut off due to a power outage during writing. In the figure, there is a power outage while the hardware is performing a write operation, and the write power failure detection flag is set in accordance with the explanation with reference to FIG. 1 above.

復電後マイクロプログラムは初期診断等イニシャライズ
処理を行い1次に書込み中停電検出フラグ信号’?:a
別したことにより、再度制御データ記憶回路2−1に保
持されている制御パラメータおよびデータにより書込み
起動と制御を行うことになる。
After the power is restored, the microprogram performs initialization processing such as initial diagnosis, and outputs the power failure detection flag signal '? :a
As a result of the separation, writing activation and control are performed again using the control parameters and data held in the control data storage circuit 2-1.

以上により本実施例によれば、書込み動作中に停電があ
っても、復電後正しくデータの書込みを行うことが出来
る。
As described above, according to this embodiment, even if there is a power failure during a write operation, data can be written correctly after power is restored.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、簡単な回路の追加によりディスク装置
に対する書込み動作中の停電に対しても。
According to the present invention, by adding a simple circuit, it is possible to prevent a power outage during a write operation to a disk device.

復電時に正しく書き直すため、ファイルがこわれたまま
システムに重大な障害を引き起こす問題を解決すること
ができる。
Since it is rewritten correctly when power is restored, it is possible to solve problems that cause serious system failures when files are corrupted.

【図面の簡単な説明】 第1図は本発明の一実施例を示すハードウェアのブロッ
ク図、第2図は第1図における動作の流れを示す図であ
る。 1・・・処理装置。 1−2・・・パワーリセット回路、 2・・・ディスク制御装置。 2−1・・・制御データ記憶回路。 2−2・・・書込み中停電検出フラグ回路。 2−3・・・マイクロプロセッサ。 2−4・・・書込み制御回路。 2−5・・・バッテリー、 b・・・バッテリー電源供給線、 C・・・書込み中信号。 d・・・書込み中停電検出フラグ信号。 f・・・パワーリセット信号。 察 2 Z
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a hardware block diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing the flow of operations in FIG. 1. 1... Processing device. 1-2...Power reset circuit, 2...Disk control device. 2-1... Control data storage circuit. 2-2... Power failure detection flag circuit during writing. 2-3...Microprocessor. 2-4...Write control circuit. 2-5...Battery, b...Battery power supply line, C...Writing signal. d... Power outage detection flag signal during writing. f...Power reset signal. Inspection 2 Z

Claims (1)

【特許請求の範囲】[Claims] 1、ディスク装置に対する書込みデータとその制御情報
とを一時記憶する記憶手段と、前記記憶手段から書込み
データを読み出して前記ディスク装置へ書込むデータ書
込み回路と、前記のデータ書込み動作を制御する制御手
段とを有するデイスク制御装置において、前記データ書
込み回路がデータ書込み中でありかつ停電であることを
検出し該状態を記憶するデータ書込み中の停電フラグ回
路と、停電時に前記記憶手段および前記フラグ回路に電
源を供給する手段とを有し、復電時に前記制御手段は前
記フラグ回路が前記状態を記憶している場合前記記憶手
段の内容に従つて前記書込みデータを再書込みすること
を特徴とするファイル書込みバックアップ方式。
1. Storage means for temporarily storing write data and control information for the disk device; a data write circuit that reads write data from the storage means and writes it to the disk device; and a control means for controlling the data write operation. A power outage flag circuit during data writing detects that the data writing circuit is in the process of writing data and there is a power outage, and stores the state; and a means for supplying power, and when the power is restored, the control means rewrites the write data according to the contents of the storage means if the flag circuit has stored the state. Write backup method.
JP62259669A 1987-10-16 1987-10-16 File write back-up system Pending JPH01102658A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62259669A JPH01102658A (en) 1987-10-16 1987-10-16 File write back-up system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62259669A JPH01102658A (en) 1987-10-16 1987-10-16 File write back-up system

Publications (1)

Publication Number Publication Date
JPH01102658A true JPH01102658A (en) 1989-04-20

Family

ID=17337253

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62259669A Pending JPH01102658A (en) 1987-10-16 1987-10-16 File write back-up system

Country Status (1)

Country Link
JP (1) JPH01102658A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04195617A (en) * 1990-11-28 1992-07-15 Hitachi Ltd Recording and reproducing device and information processor
JPH0736812A (en) * 1993-07-20 1995-02-07 Nec Corp Disk control device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04195617A (en) * 1990-11-28 1992-07-15 Hitachi Ltd Recording and reproducing device and information processor
JPH0736812A (en) * 1993-07-20 1995-02-07 Nec Corp Disk control device

Similar Documents

Publication Publication Date Title
US7724643B2 (en) Recovery of duplex data system after power failure
JP2004038290A (en) Information processing system and disk control method for use in same system
JPS6159531A (en) Microprogram loader
JPH01102658A (en) File write back-up system
JP4819116B2 (en) Control device, storage device, and control method
JP2009003789A (en) Power failure handling method for disk device, and disk device
JP2006318105A (en) Monitoring system
JPH10133926A (en) Mirror disk restoring method and restoring system
JPH0934805A (en) Semiconductor disk device
JPH1145105A (en) Backup system for data for cnc device
JPH09101866A (en) Disk array system and its application method
JPH0581147A (en) Automatic saving and recovery method for volatile storage device
JPH04251317A (en) System for protecting and reproducing status of task
JPH04256006A (en) File restoring system
JPH0944416A (en) Data protection method in case of power failure of data processing system by computer and data processing system with data protection function in case of power failure
JP3191282B2 (en) Failure information data collection method
JPH01171050A (en) Reliability deciding device for memory data
JPH08220198A (en) Battery backup memory unit and backup function testing method
JP2001084179A (en) Automatic backup system and recording medium recording automatic backup program
JPH0588988A (en) Disk array device and method for restoring data
JPH06175899A (en) Multiple auxiliary storage device
JPH05233474A (en) Storage contents protection system
JPH0440542A (en) Memory control system
JPS61250720A (en) Magnetic disc controller
JPS62285154A (en) Hierarchy memory control system