JPH083005Y2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH083005Y2 JPH083005Y2 JP1989102972U JP10297289U JPH083005Y2 JP H083005 Y2 JPH083005 Y2 JP H083005Y2 JP 1989102972 U JP1989102972 U JP 1989102972U JP 10297289 U JP10297289 U JP 10297289U JP H083005 Y2 JPH083005 Y2 JP H083005Y2
- Authority
- JP
- Japan
- Prior art keywords
- base
- region
- emitter
- comb
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05541—Structure
- H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
Description
【考案の詳細な説明】 〔産業上の利用分野〕 本考案は半導体装置に関し、詳しくはエミッタ領域を
メッシュ又は櫛歯状に形成したトランジスタに関するも
のである。DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a semiconductor device, and more particularly to a transistor having an emitter region formed in a mesh or comb shape.
例えば、半導体装置の具体例として第３図及び第４図
にNPN型トランジスタの構造を示し説明する。図におい
て（１）はＮ型基板、（２）はＰ型ベース領域、（３）
はＮ型エミッタ領域、（４）は酸化膜、（５）（６）は
ベース電極、エミッタ電極、（７）は金属細線である。
上記Ｎ型基板（１）はコレクタ領域となるシリコン単結
晶の半導体基板である。ベース領域（２）は上記基板
（１）の表面の所定位置にボロン等のＰ型不純物を選択
拡散して形成する。エミッタ領域（３）はベース領域
（２）の表面の所定位置にメッシュ状にリン等のＮ型不
純物を選択拡散して形成し、エミッタの特定領域に生じ
る電流集中を防止するためにメッシュ状に形成してお
り、その網目部分よりベース領域（2a）…が基板表面に
露出している。酸化膜（４）は基板（１）の表面にSiO2
等を被着形成して保護すると共に、ベース、エミッタ領
域（２）（３）の電極引出し位置、例えば網目のベース
領域（2a）…上の酸化膜（４）をフットエッチング等に
より除去して窓開けしており、窓開け部（4a）…からベ
ース領域（2a）…が露出している。ベース電極（５）は
ベース領域（2a）…に窓開け部（4a）…を経てアルミ等
を蒸着し、各ベース領域（2a）…を連結するように櫛歯
状に被着形成する。エミッタ電極（６）はエミッタ領域
（３）のエミッタ電極に対応する部分に形成した酸化膜
（４）の窓開け部（図示せず）を経てアルミ等を蒸着
し、櫛歯状ベース電極（５）と非接触に噛み合うように
同様に櫛歯状に被着形成する。金属細線（７）はベース
電極（５）の櫛歯の根元部分にボンディングしたAu等の
ベース電極引出し線である。For example, as a specific example of the semiconductor device, the structure of the NPN transistor is shown in FIGS. 3 and 4 and described. In the figure, (1) is an N-type substrate, (2) is a P-type base region, and (3)
Is an N-type emitter region, (4) is an oxide film, (5) and (6) are base electrodes, emitter electrodes, and (7) is a thin metal wire.
The N-type substrate (1) is a silicon single crystal semiconductor substrate that serves as a collector region. The base region (2) is formed by selectively diffusing P-type impurities such as boron at a predetermined position on the surface of the substrate (1). The emitter region (3) is formed by selectively diffusing N-type impurities such as phosphorus in a mesh shape at a predetermined position on the surface of the base region (2), and has a mesh shape in order to prevent current concentration generated in a specific region of the emitter. Are formed, and the base regions (2a) ... Are exposed from the mesh portion on the substrate surface. The oxide film (4) is SiO 2 on the surface of the substrate (1).
Etc. are adhered and protected to remove the oxide film (4) on the electrode extraction positions of the base and emitter regions (2) and (3), for example, the mesh base region (2a) ... The window is opened and the base area (2a) is exposed from the window opening (4a). The base electrode (5) is formed by vapor-depositing aluminum or the like on the base regions (2a) through the window openings (4a), and is formed in a comb shape so as to connect the base regions (2a). For the emitter electrode (6), aluminum or the like is vapor-deposited through a window opening (not shown) of an oxide film (4) formed in a portion of the emitter region (3) corresponding to the emitter electrode, and a comb-teeth-shaped base electrode (5) is formed. ) Is formed in a comb-like shape so as to be meshed in a non-contact manner. The thin metal wire (7) is a base electrode lead wire of Au or the like bonded to the base of the comb tooth of the base electrode (5).
この時、上記ベース電極（５）における金属細線
（７）のボンディング部分（5a）は、ボンディング面積
を十分、確保しなければならないため、櫛歯部分に対し
比較的広い。そうすると、上記ボンディング部分（5a）
の直下にはエミッタ領域（３）を形成せずベース領域
（2b）を露出させてベース電極（５）と接続するのが通
常である。その理由はエミッタ領域（３）を形成した部
分の酸化膜（４）は他の部分より薄く、その上にベース
電極のボンディング部分を設けるとボンディング時、大
きな機械的ストレスを受けるのでヒビワレ等により、エ
ミッタ領域（３）とベース電極（５）とがショートする
かもしれないという不安があることと、さらにボンディ
ング部分（5a）は一定の面積を要する為にその下にエミ
ッタ領域３を設けてもエミッタ電極（６）から遠くなっ
て全面積が完全に有効に機能しないこともあってあえて
利用していない。At this time, the bonding area (5a) of the metal thin wire (7) in the base electrode (5) is relatively large with respect to the comb tooth area because it is necessary to secure a sufficient bonding area. Then, the bonding part (5a)
It is usual that the emitter region (3) is not formed immediately below the substrate and the base region (2b) is exposed to be connected to the base electrode (5). The reason is that the oxide film (4) in the portion where the emitter region (3) is formed is thinner than the other portions, and if a base electrode bonding portion is provided on it, a large mechanical stress is applied during bonding, so it may be cracked. There is a concern that the emitter region (3) and the base electrode (5) may be short-circuited, and the bonding portion (5a) requires a certain area, so that even if the emitter region 3 is provided under the bonding portion (5a), the emitter region 3 may be shorted. It is not used because the whole area does not function completely effectively when it is far from the electrode (6).
一方エミッタ電極のボンディング部分（6a）に付して
説明すると網目部として、表面に露出しているベース領
域（2a）があるところには形成できないので、エミッタ
（３）をはみ出して、ベース領域（２）の表面に形成す
る。On the other hand, when describing the bonding portion (6a) of the emitter electrode, it cannot be formed where there is a base region (2a) exposed on the surface as a mesh portion. Therefore, the emitter (3) is protruded and the base region ( Formed on the surface of 2).
さらに櫛歯状に形成したエミッタ電極（６）の電流が
大きく各櫛歯を結ぶ基部が幅広に必要な場合はやはり、
第３図に示すようにエミッタ領域（３）からはみ出し
て、ベース領域（２）の表面に形成する。Further, when the current of the comb-shaped emitter electrode (6) is large and a wide base is required to connect the comb teeth,
As shown in FIG. 3, it protrudes from the emitter region (3) and is formed on the surface of the base region (2).
したがって、エミッタとして有効に利用できない所が
ベース電極及びエミッタ電極双方のボンディング部分
（5a）（6a）の下に生ずる。Therefore, a portion that cannot be effectively used as an emitter occurs below the bonding portions (5a) and (6a) of both the base electrode and the emitter electrode.
ここで、上記トランジスタ（８）によれば、エミッタ
領域（３）内で表面に露出しているベース領域（2a）…
のメッシュパターンを密にして細かく、かつ、多数のメ
ッシュにすることによりエミッタ領域（３）の面積をで
きるだけ大きくしながらエミッタ周囲長を確保して飽和
電流を大きくするとともにベース領域の表面露出部（2
a）とベース電極（５）との接点とエミッタ領域（３）
下のベース領域（２）との間の抵抗を小さくして、スイ
ッチングスピード特にOFF時のスピードを速くする。Here, according to the transistor (8), the base region (2a) exposed on the surface in the emitter region (3) ...
By making the mesh pattern of (1) denser and finer and providing a large number of meshes, the area of the emitter region (3) is made as large as possible while securing the emitter perimeter to increase the saturation current and to expose the surface of the base region ( 2
Contact point between a) and base electrode (5) and emitter region (3)
The resistance between it and the lower base area (2) is reduced to increase the switching speed, especially when it is OFF.
なお、エミッタ領域（３）の面積を広くするためにエ
ミッタ電極（６）のボンディング部分（6a）の下にエミ
ッタ領域を形成するものであるが（図示せず）、ベース
領域の露出部（2a）を設けることができないのでスイッ
チングスピードはおそくなる。Although the emitter region is formed below the bonding portion (6a) of the emitter electrode (6) in order to increase the area of the emitter region (3) (not shown), the exposed portion (2a) of the base region is formed. ) Cannot be provided, the switching speed becomes slow.
上記のようにメッシュパターンを密にしたトランジス
タは電気的特性は良好なものの、ベース、エミッタ領域
（２）（３）における寄生抵抗が小さくなって安全動作
領域SOA（Safety Operating Area＝熱的破壊耐量）が低
下する。そこで、従来、第５図に示すように、電気的特
性は高度な要求でなくSOAの広いトランジスタが要求さ
れる場合は、上記ベース領域（2a1）…のメッシュパタ
ーンを粗くして大きく、かつ、少数のメッシュにするこ
とにより上記寄生抵抗を大きくしてSOAの向上を図って
いた。Although the transistor with a dense mesh pattern has good electrical characteristics as described above, the parasitic resistance in the base and emitter regions (2) and (3) is reduced, and the safe operating area SOA (Safety Operating Area) ) Is reduced. Therefore, conventionally, as shown in FIG. 5, when a transistor having a wide SOA is required instead of a high electrical property, the mesh pattern of the base region (2a 1 ) ... By using a small number of meshes, the parasitic resistance was increased to improve the SOA.
この場合はエミッタ領域の表面に表面に露出するベー
ス領域（2a1）のない部分は広いのでエミッタ領域のボ
ンディング部分はエミッタ領域上に設けることができ、
したがって、エミッタはベース領域いっぱいに拡大でき
る。In this case, the portion of the surface of the emitter region that does not have the base region (2a1) exposed on the surface is large, so the bonding portion of the emitter region can be provided on the emitter region.
Therefore, the emitter can be expanded to fill the base region.
ところで、上述したように、第５図に示すトランジス
タ（９）によれば、第４図に示すトランジスタ（８）に
比べSOAは改善されている。ところが、ベース電極
（５）のボンディング部分（5a）の直下において依然と
してエミッタ領域が形成されていないため、エミッタ面
積が小さくなり、電流特性まで向上させることができな
いという不具合があった。By the way, as described above, according to the transistor (9) shown in FIG. 5, the SOA is improved as compared with the transistor (8) shown in FIG. However, since the emitter region is still not formed immediately below the bonding portion (5a) of the base electrode (5), the emitter area is reduced, and the current characteristics cannot be improved.
本考案は、コレクタ領域となる一導電型半導体基板
と、この半導体基板の表面に他導電型不純物を選択拡散
して形成したベース領域と、このベース領域にベース領
域の外周部を除きベース領域が網目状にのみ基板表面に
露出して残るように一導電型不純物を選択拡散して形成
した対称形状のエミッタ領域と、前記ベース領域及びエ
ミッタ領域の表面に形成すると共にベース、エミッタ各
電極引き出し位置を窓開けした絶縁膜と、前記ベース電
極引き出し位置を含んで前記絶縁膜上に形成すると共に
前記エミッタ領域の直上に櫛歯の根元部分でボンディン
グ部分を確保する櫛歯状ベース電極と、前記エミッタ電
極引き出し位置を含んで前記絶縁膜上に前記櫛歯状ベー
ス電極と櫛歯同志を非接触に噛み合わせて形成すると共
に前記エミッタ領域の直上に櫛歯の根元部分でボンディ
ング部分を確保する櫛歯状エミッタ電極とを具備し、前
記網目のピッチを前記ボンディング部分が確保できる程
度に粗くした半導体装置である。According to the present invention, a semiconductor substrate of one conductivity type serving as a collector region, a base region formed by selectively diffusing other conductivity type impurities on the surface of the semiconductor substrate, and a base region except for the outer peripheral portion of the base region are formed in the base region. A symmetrical emitter region formed by selectively diffusing one conductivity type impurity so as to be exposed only on the surface of the substrate in a mesh shape, and the base region and the surface of the emitter region, and the base and emitter electrode extraction positions An insulating film having a window opened, a comb-teeth-shaped base electrode which is formed on the insulating film including the base electrode lead-out position, and which secures a bonding portion at the root of the comb-teeth immediately above the emitter region; The comb-teeth-shaped base electrode and the comb-teeth are meshed in a non-contact manner on the insulating film including the electrode lead-out position, and ; And a comb-like emitter electrode to ensure a bonding portion at the base portion of the comb teeth on the pitch of the mesh is the bonding part is a semiconductor device that is rough enough to be ensured.
上記技術的手段によれば、粗いメッシュ又は櫛歯状の
分割エミッタ領域を形成した半導体装置において、ベー
ス電極引出し用導電被膜の比較的広い金属細線ボンディ
ング部分の直下にもエミッタ領域を形成してエミッタ面
積を増大させる。According to the above technical means, in a semiconductor device in which a coarse mesh or comb-teeth-shaped divided emitter region is formed, an emitter region is formed immediately below a relatively wide metal fine wire bonding portion of a conductive film for extracting a base electrode. Increase the area.
本考案の実施例を第１図及び第２図を参照して以下に
説明する。図において（10）はＮ型基板、（11）はＰ型
ベース領域、（12）はＮ型エミッタ領域、（13）は絶縁
膜、例えば酸化膜、（14）（15）はベース電極、エミッ
タ電極、（16）（17）は金属細線である。上記Ｎ型基板
（10）はコレクタ領域となる半導体基板で、その表面所
定位置にＰ型不純物を選択拡散してベース領域（11）を
形成する。エミッタ領域（12）はベース領域（11）の表
面の所定位置にメッシュ状にＮ型不純物をベース領域
（11）のほぼ全域選択拡散して形成してなり、上記メッ
シュは粗く、その網目部分から比較的、大型で少数のベ
ース領域（11a）…が基板表面に露出している。酸化膜
（13）はベース領域（11）エミッタ領域（12）の形成前
に基板（10）の表面に熱酸化膜等を形成すると共に、ベ
ース、エミッタ領域（11）（12）の形成時にも熱酸化形
成される。エミッタ領域形成時の酸化膜は従来より厚目
にボンディングに耐えるよう調整する。その後、ベー
ス、エミッタ領域（11）（12）の各電極引出し位置を窓
開けし、窓開け部（13a）（13b）からベース領域（11
a）…、及びエミッタ領域（12）が露出している。ベー
ス電極（14）はベース領域（11a）…に窓開け部（13a）
…を経てアルミ等を蒸着し、各ベース領域（11a）…を
連結するように櫛歯状に被着形成する。エミッタ電極
（15）はエミッタ領域（12）に窓開け部（13b）を経て
アルミ等を蒸着して、ベース電極（14）と非接触に噛み
合うように同様に櫛歯状に被着形成する。金属細線（1
6）（17）はベース，エミッタ各電極（14）（15）の櫛
歯の根元部分にボンディングする。An embodiment of the present invention will be described below with reference to FIG. 1 and FIG. In the figure, (10) is an N type substrate, (11) is a P type base region, (12) is an N type emitter region, (13) is an insulating film such as an oxide film, (14) and (15) are base electrodes and emitters. The electrodes and (16) and (17) are thin metal wires. The N-type substrate (10) is a semiconductor substrate serving as a collector region, and P-type impurities are selectively diffused at a predetermined position on the surface to form a base region (11). The emitter region (12) is formed by selectively diffusing N-type impurities in a mesh shape at a predetermined position on the surface of the base region (11) almost all over the base region (11). A relatively large number and a small number of base regions (11a) are exposed on the substrate surface. The oxide film (13) forms a thermal oxide film or the like on the surface of the substrate (10) before forming the base region (11) and the emitter region (12), and also when forming the base and emitter regions (11) (12). Thermal oxidation is formed. The oxide film at the time of forming the emitter region is thicker than the conventional one and adjusted to withstand the bonding. Then, windows are opened at the respective electrode extraction positions of the base and emitter regions (11) and (12), and the windows are opened from the window openings (13a) and (13b).
a) ..., and the emitter region (12) are exposed. The base electrode (14) has a window opening (13a) in the base region (11a).
After that, aluminum or the like is vapor-deposited, and the base regions (11a) are attached and formed in a comb shape so as to connect the base regions (11a). The emitter electrode (15) is similarly formed by comb-shaped deposition of aluminum or the like on the emitter region (12) through the window opening (13b) so as to mesh with the base electrode (14) in a non-contact manner. Fine metal wire (1
6) (17) is bonded to the base of the comb teeth of each of the base and emitter electrodes (14) (15).
上記構成においてベース電極及び、エミッタ電極のボ
ンディング部分の直下にはともにエミッタ領域（11）が
形成されるので、従来、エミッタとして取り出せなかっ
たボンディング部分（14a）の直下のベース領域が、エ
ミッタ領域（12a）となってエミッタ面積が増大し、電
流特性が向上する。更に、エミッタ領域（12）の形状も
対称で、特に入り組んだ凹部がなくなるため、場所的な
熱的集中がなくなってSOAも改善される。In the above structure, since the emitter region (11) is formed directly below the bonding portion of the base electrode and the emitter electrode, the base region immediately below the bonding portion (14a) that could not be conventionally taken out as an emitter is the emitter region (11). 12a), the emitter area is increased and the current characteristics are improved. Furthermore, the shape of the emitter region (12) is also symmetrical, and since there are no particularly intricate recesses, the local thermal concentration is eliminated and the SOA is also improved.
尚、上記実施例ではメッシュ状のエミッタ領域を有す
る半導体装置について説明したが、エミッタ領域が櫛歯
状に分割形成されていても、同様に適用可能である。Although the semiconductor device having the mesh-shaped emitter region has been described in the above embodiment, the present invention can be similarly applied even if the emitter region is divided into comb teeth.
又本明細書における『粗い配置』とはその間にボンデ
ィング部分が形成できる程度以上の間隔をいうことは理
解できるであろう。It will be understood that the term "rough arrangement" in the present specification means an interval larger than the extent that a bonding portion can be formed therebetween.
本考案によれば、ベース電極，エミッタ電極ともに金
属細線ボンディング部分の直下にもエミッタ領域を形成
したから、エミッタ面積が増大して電流特性が向上し、
かつ、エミッタ面積の増大によってチップサイズを大き
くする必要がなくなってその小型化を図ることができ、
更にエミッタ領域が形状的に不整にならず、SOAも改善
される。According to the present invention, both the base electrode and the emitter electrode are formed with the emitter region just below the metal wire bonding portion, so that the emitter area is increased and the current characteristics are improved.
Moreover, it is not necessary to increase the chip size due to the increase in the emitter area, and the size can be reduced.
Further, the emitter region is not irregularly shaped, and the SOA is improved.
第１図と第２図は本考案に係る半導体装置の一実施例を
示す要部平面図とそのＹ−Ｙ線要部拡大側断面図であ
る。 第３図と第４図は従来の半導体装置の一具体例を示す要
部平面図とそのＸ−Ｘ線要部拡大側断面図、第５図は従
来の半導体装置の他の具体例を示す要部平面図である。 （10）……半導体基板、（11）（11a）……ベース領
域、（12）……エミッタ領域、（13）……絶縁膜、（13
a）（13b）……窓開け部、（14）……ベース電極、（1
5）……エミッタ電極、（14a）……金属細線ボンディン
グ部分、（16）（17）……金属細線。1 and 2 are a plan view of a main part and an enlarged side sectional view of the main part of the semiconductor device according to an embodiment of the present invention. 3 and 4 are plan views of a main part showing an example of a conventional semiconductor device and an enlarged side sectional view of the main part taken along line XX, and FIG. 5 shows another example of the conventional semiconductor device. It is a principal part top view. (10) …… semiconductor substrate, (11) (11a) …… base region, (12) …… emitter region, (13) …… insulating film, (13
a) (13b) …… Window opening, (14) …… Base electrode, (1
5) …… Emitter electrode, (14a) …… Metal fine wire bonding part, (16) (17) …… Metal fine wire.
Claims (1)
と、この半導体基板の表面に他導電型不純物を選択拡散
して形成したベース領域と、このベース領域にベース領
域の外周部を除きベース領域が網目状にのみ基板表面に
露出して残るように一導電型不純物を選択拡散して形成
した対称形状のエミッタ領域と、前記ベース領域及びエ
ミッタ領域の表面に形成すると共にベース、エミッタ各
電極引き出し位置を窓開けした絶縁膜と、前記ベース電
極引き出し位置を含んで前記絶縁膜上に形成すると共に
前記エミッタ領域の直上に櫛歯の根元部分でボンディン
グ部分を確保する櫛歯状ベース電極と、前記エミッタ電
極引き出し位置を含んで前記絶縁膜上に前記櫛歯状ベー
ス電極と櫛歯同志を非接触に噛み合わせて形成すると共
に前記エミッタ領域の直上に櫛歯の根元部分でボンディ
ング部分を確保する櫛歯状エミッタ電極とを具備し、前
記網目のピッチを前記ボンディング部分が確保できる程
度に粗くした半導体装置。1. A one-conductivity-type semiconductor substrate serving as a collector region, a base region formed by selectively diffusing another conductivity-type impurity on the surface of the semiconductor substrate, and a base region except the outer peripheral portion of the base region in the base region. Are formed on the surface of the base region and the emitter region with a symmetrical shape formed by selectively diffusing one conductivity type impurity so as to remain exposed only on the surface of the substrate in the form of a mesh, and the base and emitter electrodes are drawn out. An insulating film having a window opened, a comb-teeth-shaped base electrode that is formed on the insulating film including the base electrode lead-out position, and that secures a bonding portion at a root portion of the comb-teeth immediately above the emitter region; The emitter region is formed by interlocking the comb-teeth-shaped base electrode with the comb-teeth in a non-contact manner on the insulating film including the emitter electrode lead-out position. Semiconductor device comprising a comb-like emitter electrode to ensure a bonding portion at the base portion of the comb teeth, roughened pitch of the mesh to the extent that the bonding portion can be secured directly above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989102972U JPH083005Y2 (en) | 1989-08-31 | 1989-08-31 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989102972U JPH083005Y2 (en) | 1989-08-31 | 1989-08-31 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0341932U JPH0341932U (en) | 1991-04-22 |
| JPH083005Y2 true JPH083005Y2 (en) | 1996-01-29 |
Family
ID=31651837
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989102972U Expired - Lifetime JPH083005Y2 (en) | 1989-08-31 | 1989-08-31 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH083005Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006210786A (en) * | 2005-01-31 | 2006-08-10 | Matsushita Electric Ind Co Ltd | Transistor |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55111362U (en) * | 1979-01-30 | 1980-08-05 | ||
| JPS55139558U (en) * | 1979-03-27 | 1980-10-04 |
-
1989
- 1989-08-31 JP JP1989102972U patent/JPH083005Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0341932U (en) | 1991-04-22 |
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