JPS63172466A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS63172466A JPS63172466A JP356687A JP356687A JPS63172466A JP S63172466 A JPS63172466 A JP S63172466A JP 356687 A JP356687 A JP 356687A JP 356687 A JP356687 A JP 356687A JP S63172466 A JPS63172466 A JP S63172466A
- Authority
- JP
- Japan
- Prior art keywords
- region
- emitter
- electrode
- base
- emitter region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 18
- 244000126211 Hericium coralloides Species 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims 1
- 230000007423 decrease Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
Landscapes
- Bipolar Transistors (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、特に高速スイッチングに適した半導体装置に
関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor device particularly suitable for high-speed switching.
従来の技術
近年、スイッチング用半導体装置は高速動作かつ大電流
化の要望が高（なってきている。BACKGROUND OF THE INVENTION In recent years, there has been an increasing demand for high-speed operation and large current for switching semiconductor devices.
以下従来の半導体装置について説明する。A conventional semiconductor device will be explained below.
従来、半導体装置のスイッチング特性を向上させる構造
として第３図、第４図および第５図、第６図に示す。第
２図、第４図の平面図、断面図に示すように、ベース電
極１、エミッタ電極２を有し、エミッタ領域３はベース
領域４を囲むような細い領域にし、エミッタ領域３の活
性領域以外は、電極を形成しないベース領域４にした構
造であった。同図中、５は絶縁膜、６はコレクタ領域、
７はコレクタ電極である。このような半導体装置の構造
において、スイッチング・オフ時にベース領域４中に蓄
積された電荷８はエミッタ領域３の直下のベース領域４
にたまり、この電荷がエミッタ下部を通ってベース電極
から徐々に減少する。また、この構造では、エミッタ電
極２の面積を大きくとれるために、電圧降下が少く、半
導体装置が均一に動作する。Conventionally, structures for improving the switching characteristics of a semiconductor device are shown in FIGS. 3, 4, 5, and 6. As shown in the plan view and cross-sectional view of FIG. 2 and FIG. Other than that, the structure had a base region 4 in which no electrode was formed. In the figure, 5 is an insulating film, 6 is a collector region,
7 is a collector electrode. In the structure of such a semiconductor device, the charge 8 accumulated in the base region 4 at the time of switching off is transferred to the base region 4 directly under the emitter region 3.
This charge gradually decreases from the base electrode through the lower part of the emitter. Further, in this structure, since the area of the emitter electrode 2 can be increased, the voltage drop is small and the semiconductor device operates uniformly.
また、第５図、第６図の平面図、断面図に示す半導体装
置は、ベース領域４とエミッタ領域３がくし歯型に形成
され、ベース領域４上にベース電極１を、エミッタ領域
３上にエミッタ電極２を形成している。スイッチング・
オフ時にはエミッタ領域３の下部のベース領域４に蓄積
された電荷８は、両端のベース領域４を経て、ベース電
極１から減少する。このために、エミッタ領域３の幅を
微細化することにより、蓄積される電荷８を少な（し、
ベース電極１へ抜ける時間が減少し、高速スイッチング
動作が可能になる。Further, in the semiconductor device shown in the plan view and cross-sectional view of FIGS. 5 and 6, the base region 4 and the emitter region 3 are formed in a comb-tooth shape, and the base electrode 1 is formed on the base region 4 and the emitter region 3 is formed on the base region 4. An emitter electrode 2 is formed. Switching
When the emitter region 3 is off, the charges 8 accumulated in the base region 4 below the emitter region 3 decrease from the base electrode 1 through the base regions 4 at both ends. For this purpose, by making the width of the emitter region 3 finer, the accumulated charge 8 can be reduced (and
The time taken to pass through to the base electrode 1 is reduced, and high-speed switching operation becomes possible.
発明が解決しようとする問題点
第３図、第４図における構造では、エミッタ領域３がベ
ース領域４を囲んでいるために、スイッチング・オフ時
には、エミッタ領域３の下部に蓄積された電荷８はエミ
ッタ領域３の下部をとおってベース電極１から減少する
ために、時間がかかり、高速スイッチング特性としては
不充分であった。また第５図、第６図に示す構造におい
ては、スイッチング・オフ時に蓄積される電荷８はエミ
ッタ領域３の幅の微細化により少なくなるが、エミッタ
電極２の幅も狭くなり、抵抗が大きくなるために電圧降
下が生じ、エミッタ領域３が均一に動作しにく（なる。Problems to be Solved by the Invention In the structure shown in FIGS. 3 and 4, since the emitter region 3 surrounds the base region 4, at the time of switching off, the charge 8 accumulated under the emitter region 3 is It took time to decrease from the base electrode 1 through the lower part of the emitter region 3, and the high-speed switching characteristics were insufficient. Furthermore, in the structures shown in FIGS. 5 and 6, the charge 8 accumulated during switching off is reduced by making the width of the emitter region 3 finer, but the width of the emitter electrode 2 is also narrower, which increases the resistance. Therefore, a voltage drop occurs, making it difficult for the emitter region 3 to operate uniformly.
本発明は、従来の欠点を解消し、高速スイッチング特性
を有する半導体装置を提供することを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to eliminate the conventional drawbacks and provide a semiconductor device having high-speed switching characteristics.
問題点を解決するための手段
本発明の半導体装置は、コレクタ領域内に形成されたベ
ース領域及びベース領域内に形成されたくし歯型のエミ
ッタ領域からなる半導体素子において、エミッタ電極か
くし歯型エミッタ領域上およびそのエミッタ領域に囲ま
れた内域のベース領域上を跨ぐ形状に形成されている。Means for Solving the Problems The semiconductor device of the present invention is a semiconductor element comprising a base region formed in a collector region and a comb-tooth emitter region formed in the base region. It is formed in a shape that straddles the base region of the inner region surrounded by the upper region and its emitter region.
作用
前記構造により、スイッチング・オフ時のエミッタ領域
下のベース領域に蓄積される電荷は、エミッタ領域の下
部を通らずにエミッタ領域のくし歯型の開口部をとおっ
て、ベース電極へ抜けるため高速スイッチング特性を有
し、かつエミッタ電極幅も広くとれるため、エミッタ電
極による電圧降下が小さく均一に動作することが可能に
なる。Effect: Due to the above structure, the charge accumulated in the base region under the emitter region during switching off passes through the comb-shaped opening in the emitter region without passing through the bottom of the emitter region, and escapes to the base electrode at high speed. Since it has switching characteristics and can have a wide emitter electrode width, it is possible to operate uniformly with a small voltage drop due to the emitter electrode.
実施例
本発明の一実施例を第１図、第２図に基づいて説明する
。第１図は実施例の平面図であり、第２図は第１図のｘ
−ｘ ’断面図である。第１図、第２図中、１はベース
電極、２はエミッタ電極、３はエミッタ領域、４はベー
ス領域、５は絶縁膜、６はコレクタ領域、７はコレクタ
電極、８はスイッチング・オフ時の蓄積電荷である。Embodiment An embodiment of the present invention will be explained based on FIGS. 1 and 2. Fig. 1 is a plan view of the embodiment, and Fig. 2 is a plan view of the embodiment.
-x' sectional view. In Figures 1 and 2, 1 is a base electrode, 2 is an emitter electrode, 3 is an emitter region, 4 is a base region, 5 is an insulating film, 6 is a collector region, 7 is a collector electrode, and 8 is when switching off is the accumulated charge of
ベース領域４をくし歯型に囲むようなエミッタ領域３を
形成し、くし歯型のエミッタ領域３及びそのエミッタ領
域３にはさまれたベース領域４の上部に絶縁膜５を介し
てエミッタ電極２を形成する。エミッタ電極２をとり囲
むベース領域４に、ベース電極１を形成する。このよう
にして形成されたパターン図が第１図であり、エミッタ
領域３がくし歯状で形成されているため、スイッチング
・オフ時にエミッタ領域３の下部のベース領域４に蓄積
された電荷８は、エミツタ領域３下部をとおらずに、エ
ミッタ領域３のくし歯型の開口部より、ベース電極１へ
抜ける。このために、スイッチング・オフ時の蓄積電荷
８の減少時間が短縮される。また、くし歯型のエミッタ
領域３およびそのエミッタ領域にはさまれたベース領域
４の上部がすべてエミッタ電極２となるために幅広いエ
ミッタ電極２が得られ、大電流動作時のエミッタ電極２
の電圧降下が少なく、均一に動作する。An emitter region 3 is formed to surround the base region 4 in a comb-like shape, and an emitter electrode 2 is formed on the base region 4 sandwiched between the comb-like emitter region 3 and the emitter region 3 via an insulating film 5. form. A base electrode 1 is formed in a base region 4 surrounding an emitter electrode 2. The pattern formed in this way is shown in FIG. 1. Since the emitter region 3 is formed in a comb-like shape, the charge 8 accumulated in the base region 4 under the emitter region 3 at the time of switching off is It passes through the comb-shaped opening of the emitter region 3 to the base electrode 1 without passing through the lower part of the emitter region 3 . For this reason, the time required for the accumulated charge 8 to decrease during switching off is shortened. In addition, since the entire upper part of the comb-shaped emitter region 3 and the base region 4 sandwiched between the emitter regions becomes the emitter electrode 2, a wide emitter electrode 2 can be obtained, and the emitter electrode 2 during large current operation can be used as the emitter electrode 2.
The voltage drop is small and it operates uniformly.
発明の効果
本発明によれば、エミッタ領域を（し歯型にすることに
より、スイッチング・オフ時にエミッタ領域の下部を通
らずにエミッタ領域のくし歯型の開口部よりベース電極
に抜けるため、高速スイッチング動作が可能な半導体装
置が実現できかつ大きなエミッタ電極を持つために、エ
ミッタ電極での電圧降下が少なくエミッタ領域全体が均
一に動作するためその効果は絶大である。Effects of the Invention According to the present invention, by forming the emitter region into a comb-tooth shape, the emitter passes through the comb-tooth opening in the emitter region to the base electrode without passing through the lower part of the emitter region during switching off. Since a semiconductor device capable of switching operation can be realized and has a large emitter electrode, the voltage drop at the emitter electrode is small and the entire emitter region operates uniformly, so the effect is tremendous.
第１図は本発明の一実施例による半導体装置の平面図、
第２図はそのｘ−ｘ ’断面図、第３図。
第４図および第５図、第６図は従来の各半導体装置の平
面図、断面図である。
１・・・・・・ベース電極、２・・・・・・エミッタ電
極、３・・・・・・エミッタ領域、４・・・・・・ベー
ス領域、５・・・・・・絶縁膜、６・・・・・・コレク
タ領域、７・・・・・・コレクタ電極、８・・・・・・
スイッチング・オフ時の蓄積電荷。
代理人の氏名 弁理士 中尾敏男 ほか１名第３図
第４図FIG. 1 is a plan view of a semiconductor device according to an embodiment of the present invention;
Fig. 2 is a cross-sectional view taken along the line xx', and Fig. 3 is a cross-sectional view thereof. FIG. 4, FIG. 5, and FIG. 6 are a plan view and a cross-sectional view of each conventional semiconductor device. DESCRIPTION OF SYMBOLS 1...Base electrode, 2...Emitter electrode, 3...Emitter region, 4...Base region, 5...Insulating film, 6...Collector region, 7...Collector electrode, 8...
Accumulated charge during switching off. Name of agent: Patent attorney Toshio Nakao and one other person Figure 3 Figure 4
Claims (1)
そのコレクタ領域内に形成された反対導電型のベース領
域、および前記ベース領域内に形成された一導電型のく
し歯型のエミッタ領域からなる半導体素子において、エ
ミッタ電極が前記くし歯型のエミッタ領域上と、同くし
歯型エミッタ領域の内域の前記ベース領域上絶縁膜を介
して形成されていることを特徴とする半導体装置。a collector region of one conductivity type formed on a semiconductor substrate;
In a semiconductor device comprising a base region of opposite conductivity type formed in the collector region and a comb-shaped emitter region of one conductivity type formed in the base region, an emitter electrode is formed in the comb-shaped emitter region. A semiconductor device characterized in that the semiconductor device is formed with an insulating film on the base region and an inner region of the comb-tooth emitter region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP356687A JPH0770541B2 (en) | 1987-01-09 | 1987-01-09 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP356687A JPH0770541B2 (en) | 1987-01-09 | 1987-01-09 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63172466A true JPS63172466A (en) | 1988-07-16 |
| JPH0770541B2 JPH0770541B2 (en) | 1995-07-31 |
Family
ID=11560985
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP356687A Expired - Fee Related JPH0770541B2 (en) | 1987-01-09 | 1987-01-09 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0770541B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100376222B1 (en) * | 1995-09-23 | 2003-07-18 | 페어차일드코리아반도체 주식회사 | Secondary breakdown energy ability improved bipolar transistor |
| JP2011103484A (en) * | 2011-01-24 | 2011-05-26 | Rohm Co Ltd | Semiconductor device |
-
1987
- 1987-01-09 JP JP356687A patent/JPH0770541B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100376222B1 (en) * | 1995-09-23 | 2003-07-18 | 페어차일드코리아반도체 주식회사 | Secondary breakdown energy ability improved bipolar transistor |
| JP2011103484A (en) * | 2011-01-24 | 2011-05-26 | Rohm Co Ltd | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0770541B2 (en) | 1995-07-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |