KR100376222B1 - Secondary breakdown energy ability improved bipolar transistor - Google Patents
Secondary breakdown energy ability improved bipolar transistor Download PDFInfo
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- KR100376222B1 KR100376222B1 KR1019950031484A KR19950031484A KR100376222B1 KR 100376222 B1 KR100376222 B1 KR 100376222B1 KR 1019950031484 A KR1019950031484 A KR 1019950031484A KR 19950031484 A KR19950031484 A KR 19950031484A KR 100376222 B1 KR100376222 B1 KR 100376222B1
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- South Korea
- Prior art keywords
- emitter
- region
- bipolar transistor
- pad
- secondary breakdown
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- 230000015556 catabolic process Effects 0.000 title abstract description 7
- 238000005468 ion implantation Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 2
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- 239000002994 raw material Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0804—Emitter regions of bipolar transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
Abstract
Description
본 발명은 반도체소자에 있어서 바이폴라 트랜지스터의 구조에 관한 것으로 특히 2차 브레이크다운 에너지(Secondary Breakdown Energy : Es/b)능력의 향상을 위한 에미터 구조를 갖는 바이폴라 트랜지스터에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure of a bipolar transistor in a semiconductor device, and more particularly, to a bipolar transistor having an emitter structure for improving secondary breakdown energy (ES / b ) capability.
일반적으로 바이폴라 트랜지스터가 소정의 회로내에서 동작할 때, 턴-온시 코일에 축적되었던 에너지는 턴-오프시 역기전력에 의한 강한 임펄스성 스트레스로서 상기 트랜지스터에 작용한다. 이는 에미터영역의 중심부에 전력집중현상 및 열폭주현상을 야기시킨다. 이로인하여 트랜지스터는 정격전압 및 정격전류를 유지할 능력을 상실하여 2차 브레이크다운 현상을 일으키게 되고 콜렉터-에미터 간이 단락됨으로써 결국 파괴현상을 일으키고 만다. 이때 트랜지스터가 스트레스에 견딜 수 있는 능력을 설정한 것이 2차 브레이크다운 에너지 능력(이하 Es/b능력이라 한다)이다.In general, when a bipolar transistor operates in a given circuit, the energy accumulated in the coil at turn-on acts on the transistor as a strong impulsive stress due to back electromotive force at turn-off. This causes power concentration and thermal runaway in the center of the emitter region. As a result, the transistor loses its ability to maintain its rated voltage and current, causing secondary breakdown, and short-circuit between the collector and emitter, which eventually leads to breakdown. At this time, it is the secondary breakdown energy capacity (hereinafter referred to as E s / b capacity) that sets the transistor's ability to withstand stress.
제1도는 종래의 바이폴라트랜지스터의 패턴도로서 손가락패턴(Finger Pattern)으로 되어 있다. 상기 도면에서 손가락모양을 이루는 것이 에미터영역이고, 그 바깥영역이 베이스영역이다.1 is a pattern diagram of a conventional bipolar transistor, which is a finger pattern. In the figure, the shape of a finger is an emitter region, and the outer region is a base region.
제2도는 상기 제1도의 A-A'선을 다른 단면도로서 에미터 패드(3)의 하부에 해당하는 전영역에 에미터영역(1)이 형성되어 있고, 상기 에미터 패드(3)에 이웃하여 베이스 패드(7) 및 상기 에미터영역(1)을 둘러싸는 베이스영역(5)이 형성되어 있다. 미설명부호 9,10은 베이스 영역의 기생저항이다.FIG. 2 is a cross-sectional view taken along the line A-A 'of FIG. 1, and the emitter region 1 is formed in the entire region corresponding to the lower portion of the emitter pad 3, and is adjacent to the emitter pad 3. FIG. As a result, the base pad 7 and the base area 5 surrounding the emitter area 1 are formed. Reference numerals 9 and 10 denote parasitic resistances of the base region.
상기 제1도 및 제2도에서 트랜지스터가 턴-오프되면 베이스 패드 바로 아래의 베이스영역내의 전류는 베이스 접촉영역을 통하여 용이하게 외부로 흘러가게 된다. 그러나 에미터패드의 중앙영역의 하부는 베이스 영역의 기생저항 때문에 전류흐름이 원활하지 못하여 전류가 집중되는 현상이 일어난다. 이 상태에서 부하코일의 대전압이 순간적으로 인가되면 트랜지스터는 2차 브레이크다운을 일으켜 파괴되어 버린다는 문제점이 있었다.When the transistors are turned off in FIGS. 1 and 2, current in the base region immediately under the base pad is easily flowed to the outside through the base contact region. However, due to the parasitic resistance of the base area, the lower part of the center area of the emitter pad is not able to smoothly flow the current, so that the current is concentrated. In this state, when a large voltage of the load coil is momentarily applied, there is a problem in that the transistor causes secondary breakdown and is destroyed.
상기한 문제점을 해결하기 위하여 에피(epitaxy) 웨이퍼를 불순물이 확산된 웨이퍼나 이중 에피 웨이퍼로 하는 등 원자재를 변경하는 방법이 상용되어 왔으나 소자의 구조적인 변경없이 원자재만을 변경하는 것으로는 문제해결에 근본적인 한계가 있었다.In order to solve the above problems, a method of changing raw materials, such as epitaxial wafers with impurity diffused wafers or double epitaxial wafers, has been commonly used. However, changing only raw materials without structural changes of the device is fundamental to solving the problem. There was a limit.
따라서, 본 발명의 목적은 상기와 같은 종래 기술의 문제점을 해결하기 위하여 바이폴라 트랜지스터의 Es/b능력을 효과적으로 향상시키기 위한 바이폴라트랜지스터를 제공함에 있다.Accordingly, an object of the present invention is to provide a bipolar transistor for effectively improving the E s / b capability of the bipolar transistor in order to solve the above problems of the prior art.
상기 목적을 달성하기 위하여 손가락패턴을 갖는 바이폴라 트랜지스터에 있어서 에미터 패드의 하부에 액티브영역을 선택적으로 형성함으로써 턴-오프시 전류의 집중을 분산시킴을 특징으로 한다.In order to achieve the above object, in the bipolar transistor having a finger pattern, an active region is selectively formed below the emitter pad, thereby distributing concentration of current during turn-off.
제 1 도는 종래의 바이폴라 트랜지스터의 패턴도.1 is a pattern diagram of a conventional bipolar transistor.
제 2 도는 제 1도의 A-A' 단면도.2 is a cross-sectional view along the line A-A 'of FIG.
제 3 도는 본 발명에 따른 바이폴라 트렌지스터으 패턴도.3 is a bipolar transistor pattern diagram according to the present invention.
제 4 도는 제3도의 B-B'선의 단면도.4 is a cross-sectional view taken along the line BB ′ of FIG. 3.
이하, 본 발명을 첨부한 도면을 참조하여 상세히 설명한다.Hereinafter, with reference to the accompanying drawings, the present invention will be described in detail.
제3도는 본 발명에 따른 바이폴라 트랜지스터의 패턴도로서, 손가락모양으로 에미터의 패턴을 형성하되 에미터 패드의 하부에 선택적으로 액티브영역이 형성됨을 도시하고 있다.FIG. 3 is a pattern diagram of a bipolar transistor according to the present invention, showing that an emitter pattern is formed in the shape of a finger, and an active region is selectively formed under the emitter pad.
제4도는 상기 제3도의 B-B'선을 자른 단면도로서 에미터 패드의 중앙영역을 제외한 주변부에 액티브영역이 형성되어 있음을 알 수 있다.FIG. 4 is a cross-sectional view taken along the line B-B 'of FIG. 3, and it can be seen that an active region is formed at the periphery of the emitter pad except for the center region.
상기 도면에 도시한 바와 같이, 베이스 접촉영역에서 가장 거리가 먼 영역인 에미터 패드의 중앙영역 하부에는 선택적 이온주입으로 에미터영역을 형성하기 않음으로써 에미터영역이 좌우로 분산되도록 하였다. 이에따라 턴-오프시 베이스의 기생저항으로 인하여 전류의 흐름이 방해를 받더라도 전류가 집중되는 현상이 좌우로 분산되어 나타난다. 이에따라 부하코일에 의한 대전압이 순간적으로 인가되더라도 Ea/b능력이 대폭 향상된다.As shown in the figure, the emitter region is distributed to the left and right by forming an emitter region by selective ion implantation under the central region of the emitter pad, which is the region farthest from the base contact region. Accordingly, even when the flow of current is disturbed due to the parasitic resistance of the base during turn-off, the concentration of the current is distributed to the left and right. Accordingly, even if a large voltage by the load coil is momentarily applied, the E a / b capability is greatly improved.
상술한 바와 같이 종래에는 손가락패턴을 갖는 바이폴라 트랜지스터에서 에미터패드 하부의 전영역에 액티브영역을 형성하여, 턴-오프시 베이스전류가 상기 에미터패드 중앙영역 하부에 집중되는 현상을 초래함으로써 소자의 Ea/b능력이 낮을 수 밖에 없었다. 그러나 본 발명에서는 선택적 이온주입에 의하여 에미터 패드 하부의 중앙영역을 제외한 주변부에 액티브영역을 형성하여 턴-오프시 베이스전류가 집중되는 현상을 대폭 완화함으로서 소자의 Ea/b능력을 향상시키는 효과가 있다.As described above, in the conventional bipolar transistor having a finger pattern, the active region is formed in the entire area under the emitter pad, so that the base current is concentrated under the emitter pad center area during turn-off. E a / b ability was low. However, in the present invention, the active region is formed at the periphery except for the center region of the emitter pad by selective ion implantation, thereby greatly reducing the phenomenon of concentration of base current during turn-off, thereby improving the E a / b capability of the device. There is.
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KR1019950031484A KR100376222B1 (en) | 1995-09-23 | 1995-09-23 | Secondary breakdown energy ability improved bipolar transistor |
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KR1019950031484A KR100376222B1 (en) | 1995-09-23 | 1995-09-23 | Secondary breakdown energy ability improved bipolar transistor |
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KR100376222B1 true KR100376222B1 (en) | 2003-07-18 |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55150271A (en) * | 1979-05-11 | 1980-11-22 | Hitachi Ltd | Semiconductor device |
JPS5658261A (en) * | 1979-10-18 | 1981-05-21 | Toshiba Corp | Semiconductor device |
US4506280A (en) * | 1982-05-12 | 1985-03-19 | Motorola, Inc. | Transistor with improved power dissipation capability |
JPS63172466A (en) * | 1987-01-09 | 1988-07-16 | Matsushita Electronics Corp | Semiconductor device |
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1995
- 1995-09-23 KR KR1019950031484A patent/KR100376222B1/en not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55150271A (en) * | 1979-05-11 | 1980-11-22 | Hitachi Ltd | Semiconductor device |
JPS5658261A (en) * | 1979-10-18 | 1981-05-21 | Toshiba Corp | Semiconductor device |
US4506280A (en) * | 1982-05-12 | 1985-03-19 | Motorola, Inc. | Transistor with improved power dissipation capability |
JPS63172466A (en) * | 1987-01-09 | 1988-07-16 | Matsushita Electronics Corp | Semiconductor device |
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