JPH0828576B2 - Manufacturing method of printed wiring board - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a multilayer printed wiring board in which a fine pattern is formed on an outer layer circuit.

[0002]

2. Description of the Related Art Due to the recent progress of surface mounting technology, the external size of electronic parts has been reduced, and the printed wiring boards for mounting and holding the electronic parts and connecting the parts with each other have high density, high accuracy, and thinness. And weight reduction. In particular, as a method for making printed wiring boards high-density, thin, and lightweight,
Adoption of 100 μm / 100 μm design and 80 μm / 80 μm design fine wiring for the outer layer circuit and the circuit gap is progressing.

On the other hand, due to the miniaturization of the package of surface mount components, the increase in the number of pins, and the adoption of the TAB mounting method, the pad width of the component mounting pads has also become finer and narrower in pitch. Pad has been put to practical use.

A surface via-hole printed wiring board having a structure in which circuits in the outermost layer and the layers immediately below are connected by via holes {hereinafter, SVHPWB (Surface V).
iaHole Printed Wiring Boa
rd)} has been developed and widely used as a method for increasing the density of a printed wiring board. It is expected that the printed wiring board combining the three densification technologies described here will become the mainstream in the future. However, it is difficult to realize these technologies with existing technologies.

15 (a) to 15 (f) and FIG. 16 (a),
(B) It is sectional drawing shown in process order explaining an example of the manufacturing method of SVHPWB by the conventional densification technique.
First, as shown in FIG. 15 (a), a double-sided copper-clad laminate 1 in which a copper foil 5 having a thickness of 18 μm is formed on both surfaces of an insulating layer 4 made of a glass fiber-reinforced epoxy plate having a thickness of 100 μm is drilled to have a hole having a diameter of 200 μm. Open processing. Hole 2 that becomes a surface via hole (hereinafter referred to as SVH)
Is formed. Next, as shown in FIG. 15B, a copper plating layer A6 and a SVH 15 having a thickness of 15 μm are formed on the inner surface of the hole 2 to be the SVH and the copper foil 5 by electrolytic copper plating, for example. Next, as shown in FIG. 15C, the inner layer circuit 8 is formed by a subtractive method using an etching resist and a cupric chloride aqueous solution, for example, by photolithography.

Next, as shown in FIG.
Other double-sided copper clad laminates produced in the same steps as in (a) to (c) are heated and pressed to be bonded to each other via a prepreg made of, for example, 100 μm thick epoxy resin-impregnated glass cloth. In this state, the SVH 15 is filled with the insulator 9 in which the prepreg is hardened, and the laminated body 10 having a flat surface with less unevenness is formed. Next, FIG.
As shown in (e), the laminated body 10 is drilled, for example, by drilling the through holes 11. Next, as shown in FIG. 15F, in order to make electrical connection between the inside of the through hole 11 and the front and back conductors, for example, a thickness of 20
A copper plating layer B13 and a through through hole 12 are formed by performing electrolytic copper plating of μm.

Next, as shown in FIG. 16 (a), a laminated body 1 in which a copper plating layer B13 and a through through hole 12 are formed
In order to form an etching resist on 0, the resist is masked with a film on which the resist is electrodeposited on the entire surface by, for example, the ED method and then the outer layer circuit or the pad pattern is drawn,
Exposure with ultraviolet rays and development with an aqueous solution of sodium carbonate are carried out to form an etching mask 16 for forming outer layer circuits and pads. Further, as shown in FIG. 16B, the unnecessary copper plating layers A6 and B13 and the copper foil 5 are dissolved with an etching solution such as an aqueous solution of ferric chloride, and the through through holes 12, SVH 15, outer layer circuits and pads 17 are formed. To form SVHPWB.

Recently, as a method for forming a fine pattern, the following wiring transfer method (C-2 Vol.172-C-2 No.4 pp24, Journal of Electronics, Information and Communication Science) is available.
3-253) have been developed. In this wiring transfer method, first, a copper foil layer is formed on a temporary stainless steel substrate by electrolytic copper plating, and then a resist layer is formed, imaged, and developed to form a fine resist image. Next, after performing corrosion-resistant metal plating and copper plating, the resist is peeled off, the surface is oxidized, and then peeled off from the stainless steel substrate.

Next, the stripped copper foil with the wiring pattern is laminated and bonded together with the adhesive resin and the substrate to form a wiring board. This wiring transfer method can form an extremely fine circuit, but due to its structure, it is a printed wiring board in which the outermost layer and the layer immediately below it have a double-sided board structure, especially in the case of SVHPWB, the SVH that connects the outermost layer and the layer immediately below it is multilayered. Since it needs to be formed after chemical bonding, it requires a highly difficult process such as blind hole drilling and uniform plating formation in the holes.

[0010]

In this conventional method for manufacturing a printed wiring board, the conductor thickness of the outer layer is increased by copper plating for forming a through hole, and a fine outer layer circuit and pad can be formed by the subtractive method. It will be difficult.
Further, the SVHPWB manufacturing method has a drawback that the outer layer portion is thickened in particular because it is copper-plated twice, which makes it difficult to form fine outer layer circuits and pads by the subtractive method.

It is an object of the present invention to provide a method for manufacturing a printed wiring board which can easily obtain an SVHPWB having a fine outer layer circuit and pads.

The method for manufacturing a printed wiring board according to the first aspect of the present invention is directed to a predetermined position of a double-sided copper-clad laminate used for at least one of the layers that will eventually become an outer layer when formed into multiple layers. A surface via hole, a step of forming a fine outer layer circuit and pad, and an inner layer circuit, the surface via hole, the fine outer layer circuit and pad, a layer other than the double-sided copper clad laminate formed the inner layer circuit A step of forming a laminate by sandwiching a prepreg in the middle of the double-sided copper-clad laminate having at least one side on which the inner layer circuit constituting the above is formed, and filling and curing a resin in the gap between the fine outer layer circuit and the pad. And forming a through hole at a predetermined position of the laminate to form a through hole, and then copper plating is performed, and a copper plating layer is formed on the surface, and the fine outer layer circuit and the pad of at least one outer layer are formed. And a step of forming a through through hole connecting the inner layer circuit, and filling the hole filling ink into the through hole and curing it to remove only the copper plating layer on the surface by soft etching to form the fine outer layer circuit. And a step of exposing the pad, and a step of removing the filling ink in the through-hole to expose the copper plating layer.

The method for manufacturing a printed wiring board according to the second embodiment of the present invention is a method for manufacturing a double-sided copper-clad laminate which is used for at least one of the layers which will eventually become an outer layer when it is made into multiple layers. A surface via hole, a step of forming a fine outer layer circuit and pad, and an inner layer circuit at the position of the surface via hole, the fine outer layer circuit and pad, and the double-sided copper-clad laminate on which the inner layer circuit is formed. To form a laminate with a prepreg interposed between the double-sided copper-clad laminate having at least one side on which the inner-layer circuit constituting the layer is formed, and at the same time, the resin is filled in the gap between the fine outer-layer circuit and the pad and cured. And a step of forming a through hole at a predetermined position of the laminate to form a through hole and then copper plating, and a copper plating layer on the surface, and the fine outer layer circuit of at least one outer layer. And a pad, a step of forming a through through hole connecting the inner layer circuit, an etching mask is formed in a portion other than the region where the fine outer layer circuit and the pad are formed, and only the copper plating layer on the surface is formed. After removing by soft etching, the etching mask is removed to expose the fine outer layer circuits and pads, and the fine outer layer circuits and pads on the outer layer of the stack and the through-hole regions are protected. In addition, the method includes a step of forming a pattern of an etching mask for forming other outer layer circuits and pads, and a step of removing the pattern of the etching mask after forming the other outer layer circuits and pads.

[0014]

Embodiments of the present invention will now be described with reference to the drawings. 1 (a)-(f) and 2 (a)-(c)
3 (a) to 3 (e) and FIGS. 4 (a) to 4 (d) are a cross-sectional view and a perspective view showing the first embodiment of the present invention in the order of steps. First, as shown in FIGS. 1 (a) and 3 (a), the first embodiment first reinforced a glass fiber reinforced with a thickness of 100 μm by laminating copper foil 5 with a thickness of 18 μm arranged on the outermost layer of SVHPWB on both sides. A hole 2 to be an SVH having a diameter of 200 μm is formed by drilling in a double-sided copper-clad laminate 1 composed of an insulating layer 4 of an epoxy resin plate. At this time,
1 cm ^{2 in} the gap between the outer layer circuit and the position that does not touch the inner layer circuit
One hole per hole for resin flow with a diameter of 250 μm 3
Are simultaneously formed by drilling.

Next, as shown in FIGS. 1B and 3B, a 15 μm thick copper plating layer A6 is formed on the surface by electroless copper plating and electrolytic copper plating. At this time, SV
The hole 2 to be H is copper-plated to form SVH 15 so that the front and back are electrically connected. Next, as shown in FIGS. 1 (c) and 3 (c), after laminating an alkali development type dry film, the circuit pattern is baked and developed with an aqueous solution of sodium carbonate to remove unnecessary portions with an aqueous solution of cupric chloride. Are removed by etching, and then the dry film is removed with a sodium hydroxide aqueous solution to form fine outer layer circuits and pads 7 and inner layer circuits 8. Further, at this time, the copper plating layer A6 and the copper foil 5 are removed around the resin flow hole 3 and the resin flow at the time of lamination fills the gap between the fine outer layer circuit and the pad 7.

Next, as shown in FIGS. 1 (d) and 3 (d), the material forming the other layers and a prepreg of glass cloth impregnated with an uncured epoxy resin having a thickness of 100 μm are laminated, The prepreg resin is melted and flown by heating and pressurizing with a hot plate press to form an insulator 9 in which the prepreg is hardened, and each layer is bonded. At this time, the resin flow hole 3
The resin of the prepreg flows out from there to fill the gap between the fine outer layer circuit and the pad 7. Next, FIG. 1 (e) and FIG.
As shown in (e), the through hole 11 is formed in the laminated body 10 thus manufactured by drilling. Next, FIG.
As shown in (f) and FIG. 4 (a), a copper plating layer B13 having a thickness of 25 μm is formed by electroless copper plating and electrolytic copper plating. At this time, the through hole 11 is electrically connected to the fine outer layer circuit on the front and back and the pad 7 and the inner layer circuit 8 by copper plating to form the through through hole 12.

Next, as shown in FIGS. 2 (a) and 4 (b), the through hole 12 is filled with the filling ink 14 and cured by ultraviolet rays so that the etching solution does not enter the through hole 12. To do. Next, FIG. 2 (b) and FIG.
As shown in (c), an aqueous solution of cupric chloride was used for the treatment of FIG.
Then, the copper plating layer B13 formed in the step of FIG. 4A is removed by soft etching except the portion in the through hole 12 to expose the fine outer layer circuit and the pad 7.
Next, as shown in FIGS. 2C and 4D, the hole filling ink 14 in the through-hole 12 is removed by a sodium hydroxide solution and brush polishing to form a fine outer layer circuit, the pad 7, and the SVH 15. And SVHPWB in which the through hole 12 was formed was obtained.

5A to 5C and 6A to 6C.
(D) is sectional drawing shown in order of a process explaining the 2nd Example of this invention. In the second embodiment, first, as shown in FIG. 5A, the thickness 1 to be arranged in the outermost layer of SVHPWB is set.
A hole 2 to be an SVH is formed by drilling at a predetermined position of a double-sided copper-clad laminate 1 composed of an insulating layer 4 of a glass fiber-reinforced polyimide plate having a thickness of 100 μm, which is obtained by laminating a copper foil 5 of 8 μm on both sides. Next, as shown in FIG.
A copper plating layer A6 having a thickness of 15 μm is formed by electroless copper plating and electrolytic copper plating. At this time, the hole 2 to be the SVH is copper-plated to form the SVH 15, so that the front and back sides are electrically connected. Next, as shown in FIG. 5C, after laminating an alkali development type dry film, the circuit pattern is baked and developed with an aqueous solution of sodium carbonate, and unnecessary portions are removed by etching with an aqueous solution of cupric chloride. Then, the dry film is removed with an aqueous solution of sodium hydroxide to form a fine outer layer circuit and pads 7 and inner layer circuit 8. next,
As shown in FIG. 5D, a fine outer layer circuit and pad 7
The resin paste 18 made of uncured polyimide resin is applied to the surface where the
It is applied to a thickness of μm, and the solvent content is volatilized in a drying oven to semi-cure.

Next, as shown in FIG. 5 (e), the material forming the other layers and a prepreg of glass cloth impregnated with an uncured polyimide resin having a thickness of 100 μm are laminated and heated and heated by a hot plate press. The resin of the prepreg is pressed and melted and flowed to form the insulator 9 in which the prepreg is cured, and each layer is bonded. At this time, the resin paste 18 is melted by being heated and pressed so that the gap between the fine outer layer circuit and the pad 7 is uniformly filled and cured. The surplus resin paste 18 flows out of the SVHPWB and flows out. Next, as shown in FIG. 5F, through holes 11 are formed in the laminated body 10 thus manufactured by drilling.

Next, as shown in FIG. 6A, a copper plating layer B13 having a thickness of 25 μm is formed by electroless copper plating and electrolytic copper plating. At this time, in the through hole 11, the copper plating layer B13 connects the fine outer layer circuit on the front and back sides and the pad 7 and the inner layer circuit to each other to form the through hole 12. Next, as shown in FIG. 6B, the filling ink 14 is filled in the through-holes 12 and cured by ultraviolet rays so that the etching liquid does not enter the through-holes 12. Next, as shown in FIG. 6C, the copper plating layer B13 formed in the step of FIG. 6A with a cupric chloride aqueous solution.
The portions other than the through-holes 12 are removed by soft etching to expose the fine outer layer circuit and the pads 7. Next, as shown in FIG. 6D, the filling ink 14 in the through-holes 12 is removed by a sodium hydroxide solution and brush polishing, thereby forming a fine outer layer circuit and a fine outer layer circuit similar to those of the first embodiment. An SVHPWB having the pad 7, the SVH 15 and the through hole 12 was obtained.

In this embodiment, it is not necessary to form the resin flow hole 3 of the first embodiment shown in FIG. 1A in the gap between the fine outer layer circuit and the pad 7, and the resin flow hole 3 There is an advantage that the design is further simplified due to the fact that it is not necessary to optimize the arrangement of the.

7A to 7E and 8A to 8A.
(E) is sectional drawing shown in order of a process explaining the 3rd Example of this invention. In the third embodiment, first, as shown in FIG. 7A, the thickness 1 arranged in the outermost layer of SVHPWB is set.
A hole 2 to be an SVH is formed by drilling at a predetermined position of a double-sided copper-clad laminate 1 composed of an insulating layer 4 of a glass fiber-reinforced polyimide plate having a thickness of 100 μm, which is obtained by laminating a copper foil 5 of 8 μm on both sides. Next, as shown in FIG.
A copper plating layer A6 having a thickness of 15 μm is formed by electroless copper plating and electrolytic copper plating. At this time, the hole 2 to be the SVH is copper-plated to form the SVH 15, so that the front and back sides are electrically connected. Next, as shown in FIG. 7C, after laminating an alkali development type dry film, the circuit pattern is baked, developed with an aqueous solution of sodium carbonate and removed with an aqueous solution of cupric chloride to remove fine outer layer circuits and pads. 7 and the inner layer circuit 8 are formed.

Next, as shown in FIG. 7D, a thickness of 50 μm is formed on the surface on which the fine outer layer circuit and the pad 7 are formed.
The resin sheet 19 made of uncured polyimide resin is stacked, and a prepreg 20 of glass cloth impregnated with the uncured polyimide resin having a thickness of 100 μm is laminated between the resin sheets 19 and the materials forming the other layers. Next, as shown in FIG. 7E, the resin of the prepreg 20 is melted and flown by heating and pressurizing with a hot plate press to form an insulator 9 in which the prepreg is hardened and each layer is bonded. At this time, the resin sheet 19 is re-melted by being heated and pressed so that the gap between the fine outer layer circuit and the pad 7 is uniformly filled and cured. The surplus resin component of the resin sheet 19 flows out of the SVHPWB and flows out.

Next, as shown in FIG. 8A, a through hole 11 is formed in the laminated body 10 thus produced by drilling. Next, as shown in FIG. 8B, a copper plating layer B having a thickness of 25 μm is formed by electroless copper plating and electrolytic copper plating.
13 is formed. At this time, the through hole 11 has the copper plating layer B.
Conduction between the fine outer layer circuit on the front and back and the pad 7 and the inner layer circuit 8 is made by 13 to form a through through hole 12. Next, as shown in FIG. 8C, the through hole 12 is filled with the filling ink 14 and cured by ultraviolet rays so that the etching solution does not enter the through hole 12. Next, as shown in FIG. 8D, the copper plating layer B13 formed in the step of FIG. 8B with a cupric chloride aqueous solution.
The portion other than the through-hole 12 is removed by etching to expose the fine outer layer circuit and the pad 7. next,
As shown in FIG. 8E, by removing the filling ink 14 in the through-holes 12 by sodium hydroxide aqueous solution and brush polishing, a fine outer layer circuit and pads 7 similar to those in the first embodiment are formed. An SVHPWB having the SVH 15 and the through hole 12 formed therein was obtained.

In this embodiment, compared with the first embodiment shown in FIG. 1A, it is not necessary to form the resin flow hole 3 in the gap between the fine outer layer circuit and the pad 7, and the resin flow hole is used. There is an advantage that the design is further simplified because it is not necessary to optimize the arrangement of the holes 3.
Further, there is an effect that the number of steps is reduced by one as compared with the second embodiment.

9A to 9F and FIGS. 10A to 10.
(D) is sectional drawing shown in order of process explaining the 4th Example of this invention. In the fourth embodiment, first, as shown in FIG. 9A, a thickness 1 arranged in the outermost layer of SVHPWB is used.
A double-sided copper-clad laminate 1 consisting of an insulating layer 4 of a glass-fiber reinforced epoxy resin plate having a thickness of 100 μm and having a copper foil 5 of 8 μm laminated on both sides was drilled to form an S of 200 μm in diameter.
A hole 2 to be VH is formed. At this time, 1 cm is placed in the space between the fine outer layer circuit and the pad at a position not touching the inner layer circuit.
Resin flow holes 3 with a diameter of 250μm in a ratio of one ²
Are simultaneously formed by drilling. Next, FIG. 9 (b)
As shown in, a copper plating layer A6 having a thickness of 15 μm is formed by electroless copper plating and electrolytic copper plating. At this time, S
The hole 2 to be VH is plated with copper to form SVH 15 so that the front and back sides are electrically connected. Next, as shown in FIG.
After laminating an alkali-developable dry film, the circuit pattern is baked and developed with an aqueous solution of sodium carbonate to remove unnecessary parts by etching with an aqueous solution of cupric chloride, and then the dry film is removed with an aqueous solution of sodium hydroxide to make fine The outer layer circuit and the pad 7 and the inner layer circuit 8 are formed. Further, at this time, the plating layer A6 and the copper foil 5 are removed around the resin flow hole 3 so that the resin flow at the time of stacking fills the gap between the fine outer layer circuit and the pattern 7.

Next, as shown in FIG. 9 (d), the material forming the other layers and a prepreg of glass cloth impregnated with an uncured epoxy resin having a thickness of 100 μm are laminated, and heated and pressed by a hot plate press. The resin of the prepreg is pressed and melted to flow, and the prepreg is cured to form the insulator 9, and the respective layers are bonded. At this time, the resin flows out from the resin flow hole 3 to fill the gap between the fine outer layer circuit and the pad 7. Next, as shown in FIG. 9E, the laminated body 1 thus produced
A through hole 11 is formed at 0 by drilling. Next, as shown in FIG. 9F, a copper plating layer B13 having a thickness of 25 μm is formed by electroless copper plating and electrolytic copper plating.
At this time, the through hole 11 is electrically connected to the fine outer layer circuit on the front and back and the pad 7 and the inner layer circuit 8 by copper plating to form the through through hole 12.

Next, as shown in FIG. 10A, after laminating an alkali development type dry film, a pattern for removing the copper plating layer B13 of the fine outer layer circuit and the pad 7 portion is baked and carbonic acid is added. It is developed with a sodium aqueous solution to form an etching mask A21. Next, as shown in FIG. 10B, an unnecessary portion of the copper plating layer B13 is removed by etching with a cupric chloride aqueous solution, and then the etching mask A21 is removed with a sodium hydroxide aqueous solution to form a fine outer layer circuit. And the part of the pad 7 is exposed.
Next, as shown in FIG. 10C, an alkali developing liquid photoresist is applied to the entire surface to protect the fine outer layer circuit and the portion of the pad 7 and to form other outer layer circuits and pads. Bake the pattern with ultraviolet rays,
An etching mask B22 is formed with an aqueous solution of sodium carbonate. Next, as shown in FIG. 10D, etching is performed with a cupric chloride aqueous solution to form other outer layer circuits and pads (not shown), and the etching mask B22 is removed with a sodium hydroxide aqueous solution. As a result, a fine outer layer circuit and pad 7, SVH 15 and through-hole 1
SVHPWB in which 2 was formed was obtained.

In the present embodiment, unlike the first to third embodiments, since the copper plating layer B13 is formed on the SVH 15, a pad can be formed on the SVH 15.

11A to 11F and 12A to 12F.
(E) is sectional drawing shown in order of a process explaining the 5th Example of this invention. In the fifth embodiment, first, FIG.
As shown in FIG. 3, a copper foil 5 having a thickness of 18 μm, which is arranged in the outermost layer of SVHPWB, is laminated on both sides to have a thickness of 100 μm.
A hole 2 to be an SVH is formed by drilling in a double-sided copper-clad laminate 1 composed of an insulating layer 4 of a glass fiber reinforced polyimide resin plate. Next, as shown in FIG. 11B, a copper plating layer A6 having a thickness of 15 μm is formed by electroless copper plating and electrolytic copper plating. At this time, the hole 2 to be the SVH is copper-plated to form the SVH 15, so that the front and back sides are electrically connected. Next, as shown in FIG. 11C, after laminating an alkali development type dry film, the circuit pattern is baked, developed with an aqueous solution of sodium carbonate and the unnecessary portion is removed by etching with an aqueous solution of cupric chloride. The dry film is removed with an aqueous sodium hydroxide solution to form a fine outer layer circuit and pads 7 and inner layer circuit 8.

Next, as shown in FIG. 11D, a resin paste 18 made of uncured polyimide resin is screen-printed on the surface on which the fine outer layer circuit and the pad 7 are formed to have a thickness of 35 μm. It is applied until it becomes, and the solvent is volatilized in a drying oven to semi-cure. Next, as shown in FIG. 11 (e), the material forming the other layers and a prepreg of glass cloth impregnated with an uncured polyimide resin having a thickness of 100 μm are laminated and heated and pressed by a hot plate press to form the prepreg. The resin is melted and flowed to form the insulator 9 in which the prepreg is hardened, and each layer is bonded. At this time, the resin paste 18 is re-melted by being heated and pressed so that the gap between the fine outer layer circuit and the pad 7 is uniformly filled and hardened. The surplus resin paste 18 is SVHP.
It flows out of the WB and flows out.

Next, as shown in FIG. 11 (f), through holes 11 are formed in the laminated body 10 thus produced by drilling. Next, as shown in FIG. 12A, a copper plating layer B13 having a thickness of 25 μm is formed by electroless copper plating and electrolytic copper plating. At this time, in the through hole 11, the copper plating layer B13 makes electrical connection between the fine outer layer circuit on the front and back and the pad 7 and the inner layer circuit 8 to form the through hole 12. Next, as shown in FIG. 12 (b), after laminating an alkali development type dry film, a pattern for removing the copper plating layer B13 of the fine outer layer circuit and the pad 7 portion is baked, and then a sodium carbonate aqueous solution is added. And develop to form an etching mask A21. Next, FIG.
As shown in (c), an unnecessary portion of the copper plating layer B13 is removed by etching with a cupric chloride aqueous solution, and then the etching mask A21 is removed by a sodium hydroxide aqueous solution to remove the fine outer layer circuit and the pad 7. Expose the part.
Next, as shown in FIG. 12D, an alkali developing type liquid photoresist is applied to the entire surface to protect the fine outer layer circuit and the portion of the pad 7 and to form other outer layer circuits and pads. Bake the pattern with ultraviolet rays,
An etching mask B22 is formed with an aqueous solution of sodium carbonate.

Next, as shown in FIG. 12 (e), etching is performed with a cupric chloride aqueous solution to form other outer layer circuits and pads (not shown), and an etching mask is formed with a sodium hydroxide aqueous solution. By removing the fine outer layer circuit and pad 7, SVH 15 and through through hole 12
SVHPWB in which was formed was obtained.

In the present embodiment, it is not necessary to form the resin flow hole 3 in the gap between the fine outer layer circuit and the pad 7, and it is not necessary to optimize the arrangement of the resin flow hole 3. There is an advantage that the design is simplified as compared with the fourth embodiment.

13 (a) to 13 (f) and 14 (a) to
(E) is sectional drawing shown in order of a process explaining the 6th Example of this invention. In the sixth embodiment, first, FIG.
As shown in FIG. 10, a 100 μm-thickness obtained by laminating both sides of the same foil 5 having a thickness of 18 μm, which is arranged in the outermost layer of SVHPWB
A hole 2 to be an SVH is formed by drilling in a double-sided copper-clad laminate 1 composed of an insulating layer 4 of a glass fiber reinforced polyimide resin plate. Next, as shown in FIG. 13B, a copper plating layer A6 having a thickness of 15 μm is formed by electroless copper plating and electrolytic copper plating. At this time, the hole 2 to be the SVH is copper-plated so that the front and back sides are electrically connected. Next, FIG.
As shown in (c), after laminating an alkali development type dry film, the circuit pattern is baked, developed with an aqueous solution of sodium carbonate to remove unnecessary portions by etching with an aqueous solution of cupric chloride, and then the dry film is dried with water. Fine outer layer circuit and pad 7 removed with sodium oxide solution
And the inner layer circuit 8 is formed.

Next, as shown in FIG. 13D, a thickness of 50 μm is formed on the surface on which the fine outer layer circuits and pads 7 are formed.
m of resin sheets 19 made of uncured polyimide resin are stacked, and a prepreg 20 made of glass cloth impregnated with uncured polyimide resin having a thickness of 100 μm is laminated between the resin sheets 19 and the materials constituting the other layers. Next, as shown in FIG. 13E, the resin of the prepreg 20 is melted and flown by heating and pressurizing with a hot plate press to form an insulator 9 in which the prepreg is hardened, and each layer is bonded. At this time, the resin sheet 19 is re-melted by being heated and pressed so that the gaps between the fine outer layer circuit and the pads 7 are uniformly filled and cured. The surplus resin component of the resin sheet 19 flows out of the SVHPWB and flows out.

Next, as shown in FIG. 13 (f), through holes 11 are formed in the laminated body 10 thus manufactured by drilling. Next, as shown in FIG. 14A, a copper plating layer B13 having a thickness of 25 μm is formed by electroless copper plating and electrolytic copper plating. At this time, the through hole 11 is electrically connected to the fine outer layer circuit on the front and back and the pad 7 and the inner layer circuit 8 by the copper plating layer B13 to form the through hole 12. Next, as shown in FIG. 14 (b), after laminating an alkali development type dry film, a pattern for removing the copper plating layer B 13 in the fine outer layer circuit and the pad 7 portion is baked, and then a sodium carbonate aqueous solution is added. And develop to form an etching mask A21. Next, FIG.
As shown in FIG. 4 (c), the unnecessary portion of the copper plating layer B13 is removed by etching with a cupric chloride aqueous solution, and then the etching mask 21 is removed with a sodium hydroxide aqueous solution to form a fine outer layer circuit and pad 7. Expose the part of.
Next, as shown in FIG. 14D, an alkali developing liquid photoresist is applied to the entire surface to protect the fine outer layer circuit and the pad 7 and to form the other outer layer circuit and the pad 7. Pattern is baked with ultraviolet rays and etching mask B22 is added with an aqueous solution of sodium carbonate.
To form.

Next, as shown in FIG. 14E, etching is performed with a cupric chloride aqueous solution to form an outer layer circuit and pads (not shown), and the etching mask B22 is removed with a sodium hydroxide aqueous solution. By doing so, an SVHPWB in which the fine outer layer circuit and the pad 7, the SVH 15 and the through through hole 12 were formed was obtained.

In the present embodiment, it is not necessary to form the resin flow hole 3 in the gap between the fine outer layer circuit and the pad 7, and it is not necessary to optimize the arrangement of the resin flow hole 3. There is an advantage that the design is simplified as compared with the fourth embodiment. Further, there is an effect that one process is reduced as compared with the fifth embodiment.

[0040]

As described above, the present invention provides the SVHP.
When the conductor layer of the double-sided copper-clad laminate to be arranged in the outermost layer of WB is thin and the fine outer layer circuits and pads are formed to form a laminate, resin is filled in the gaps between the fine outer layer circuits and pads, Since it is created in the process of exposing the fine outer layer circuit and the pad by removing only the fine outer layer circuit and the copper plating layer on the pad by etching after forming the through hole by forming the through hole by copper plating Further, it has an effect that a fine outer layer circuit and a pad can be formed. It also has an effect that the finish of SVHPWB is smooth.

SVHPWB created by the conventional method is
The conductor thickness of the outer layer is 58μm, which is 15μm + 25μm for two times of copper plating on the initial copper foil thickness of 18μm. In order to form a circuit at this stage, form a fine outer layer circuit with a circuit width of 100μm / 100μm and a circuit gap. Was difficult. However, in the present invention, at the stage of forming a circuit, since the initial copper foil thickness is 18 μm, the thickness of the copper plating is 15 μm and the conductor thickness is as thin as 33 μm, it is possible to mass-produce a fine outer layer circuit and pad having a line space of 80 μm / 80 μm. It will be possible.

[Brief description of drawings]

1A to 1F are cross-sectional views showing a process sequence for explaining a first embodiment of the present invention.

2 (a) to 2 (c) are sectional views showing the first embodiment of the present invention in the order of steps.

3 (a) to 3 (e) are perspective views showing the first embodiment of the present invention in the order of steps.

FIG. 4A to FIG. 4D are perspective views showing the first embodiment of the present invention in process order.

5 (a) to 5 (f) are sectional views showing a second embodiment of the present invention in the order of steps.

6 (a) to 6 (d) are sectional views showing the second embodiment of the present invention in the order of steps.

7 (a) to 7 (e) are sectional views showing the third embodiment of the present invention in the order of steps.

FIGS. 8A to 8E are cross-sectional views showing the third embodiment of the present invention in the order of steps.

9A to 9F are sectional views showing the fourth embodiment of the present invention in process order.

FIGS. 10A to 10D are sectional views showing the fourth embodiment of the present invention in the order of steps.

11 (a) to 11 (f) are sectional views showing the fifth embodiment of the present invention in the order of steps.

12 (a) to 12 (e) are sectional views showing the fifth embodiment of the present invention in the order of steps.

13 (a) to 13 (f) are sectional views showing the sixth embodiment of the present invention in the order of steps.

14 (a) to 14 (e) are sectional views showing the sixth embodiment of the present invention in the order of steps.

15A to 15F are cross-sectional views showing the order of steps for explaining an example of a conventional method for manufacturing a printed wiring board.

16 (a) and 16 (b) are cross-sectional views showing the order of steps for explaining an example of a conventional method for manufacturing a printed wiring board.

[Explanation of symbols]

 1 Double-sided copper-clad laminate 2 Hole to be SVH 3 Hole for resin flow 4 Insulation layer 5 Copper foil 6 Copper plating layer A 7 Fine outer layer circuit and pad 8 Inner layer circuit 9 Insulator 10 laminated body 11 Through hole 12 Through Through Hole 13 Copper Plating Layer B 14 Filling Ink 15 SVH 16 Etching Mask 17 External Layer Circuit and Pad 18 Resin Paste 19 Resin Sheet 20 Prepreg 21 Etching Mask A 22 Etching Mask B

Claims (5)

[Claims] 1. When (a) a multilayer structure is formed, it finally becomes an outer layer.
Forming a surface via hole, a fine outer layer circuit and a pad, and an inner layer circuit at a predetermined position of a double-sided copper-clad laminate used for at least one of the layers , (b) the surface via hole, and the fine layer Outer layer
Circuits and pads, and the double-sided copper forming the inner layer circuit
At least one inner layer circuit that constitutes a layer other than the laminated laminate
Forming a laminate by sandwiching a prepreg in the middle of the double-sided copper-clad laminate formed on the surface, and filling a resin in a gap between the fine outer layer circuit and the pad and curing the resin, (c) predetermined of the laminate and the copper plating layer on the surface subjected to copper plating after the formation of the through-holes subjected to drilling working to the position, small
The fine outer layer circuit and pad of at least one outer layer ;
Forming a through-through hole connecting to the inner layer circuit, (d) filling the through-hole with filling ink,
Curing and removing only the copper plating layer on the surface by soft etching to expose the fine outer layer circuits and pads; (e) removing the filling ink in the through-holes to expose the copper plating layer A method of manufacturing a printed wiring board, comprising: 2. (a) When it is formed into multiple layers, it finally becomes an outer layer.
Forming a surface via hole, a fine outer layer circuit and a pad, and an inner layer circuit at a predetermined position of a double-sided copper-clad laminate used for at least one of the layers , (b) the surface via hole, Fine outer layer
Circuits and pads, and the double-sided copper forming the inner layer circuit
At least the inner layer circuit that constitutes a layer other than the laminated laminate.
Forming a laminate by sandwiching a prepreg in the middle of the double-sided copper-clad laminate formed on one side, and filling a resin in the gap between the fine outer layer circuit and the pad and curing; (c) predetermined of the laminate and the copper plating layer on the surface subjected to copper plating after the formation of the through-holes subjected to drilling working to the position, small
The fine outer layer circuit and pad of at least one outer layer ;
A step of forming a through through hole connecting to the inner layer circuit, (d) an etching mask is formed on a portion other than the region where the fine outer layer circuit and the pad are formed, and only the copper plating layer on the surface is soft-etched. And removing the etching mask to expose the fine outer layer circuits and pads, and (e) protecting the fine outer layer circuits and pads on the outer layer of the laminate and the through-hole regions. And a step of forming a pattern of an etching mask for forming other outer layer circuits and pads, and (f) a step of removing the pattern of the etching mask after forming the other outer layer circuits and pads. A method for manufacturing a printed wiring board, comprising: 3. A double-sided copper-clad laminate that forms an outer layer on which resin flow holes have been formed in advance and a double-sided copper that forms another layer in the step of filling a resin in the gaps between the fine outer layer circuit and the pad and curing the resin. A step of laminating a prepreg in the middle of the laminated laminate, heating and pressing to melt the resin of the prepreg to flow through the resin flow hole, fill the gap between the fine outer layer circuit and the pad, and cure the resin. The method for manufacturing a printed wiring board according to claim 1, further comprising: 4. The step of filling a resin in the gap between the fine outer layer circuit and the pad and curing the resin is performed by insulating the surface of the double-sided copper-clad laminate as an outer layer on which the fine outer layer circuit and pad are formed. Applying a resin paste that is melt-cured by heat and semi-curing it, and stacking a prepreg in the middle of the double-sided copper-clad laminate that constitutes another layer
The resin of the prepreg is melted under pressure to form an insulating body in which the prepreg is cured, and each layer is adhered to form a laminate, and the semi-cured resin paste is re-melted and flowed to form the fine outer layer circuit. And a step of filling the gap between the pads and curing the pad, and the method for manufacturing a printed wiring board according to claim 1 or 2. 5. The step of filling a resin in the gap between the fine outer layer circuit and the pad and hardening the resin is a fine outer layer circuit of a double-sided copper-clad laminate having an insulating and heat-melting resin sheet as an outer layer. The prepreg is placed in contact with the pad, and the prepreg is laminated in the middle of the double-sided copper-clad laminate that forms another layer, heated and pressed to melt and flow the resin of the prepreg to insulate the prepreg. A step of forming a body, adhering each layer to form a laminate, and reflowing the resin sheet to fill a gap between the fine outer layer circuit and the pad and cure the resin sheet. 1. The method for manufacturing a printed wiring board according to 1 or 2.