JPH08265291A - Ofdm transmission system and ofdm transmitter-receiver - Google Patents

Abstract

PURPOSE: To perform symbol synchronization detection by reference symbol correlation in a small-scale circuit. CONSTITUTION: This system is provided with a circuit 103 for quadrature detecting OFDM signals, the circuit 118 for detecting a null symbol from quadrature detection output, the circuit 119 for generating input synchronization timing signals based on null symbol detection output, RAMs 107 and 108 for fetching a reference symbol valid part and several data in front and behind from the quadrature detection output based on the timing signals, a ROM 109 for generating the I or Q axis data of the reference symbol valid part, correlation devices 111 and 112 for repeatedly computing correlation with data series from the ROM 109 while offsetting a RAM read start position and detecting the correlation of the reference symbol, the circuits 111-116 for obtaining and adding the absolute values of respective correlation output, successively comparing the added output and detecting a maximum value and the circuit 117 for detecting the deviation of a symbol timing from an offset amount at the time of detecting the maximum value and correcting synchronization timing generation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal transmission system using an OFDM modulation system and a transmitter / receiver used for the system.

[0002]

2. Description of the Related Art In recent years, digital modulation methods have been actively developed in the transmission of audio signals and video signals. Especially in digital terrestrial broadcasting, it is resistant to multipath interference,
Orthogonal Frequency Division Multiplexing (OFDM) modulation schemes, which have features such as high frequency utilization efficiency, are drawing attention. OF
Details of the DM system are described in a document "Mobile Digital Audio Broadcasting Using OFDM" (NHK, published by VIEW, May 1993), etc., and therefore a conventional technique related to the present invention will be described here.

In OFDM transmission, data is assigned to a plurality of carriers that are orthogonal to each other to perform modulation and demodulation. This can be realized by performing IFFT processing on a plurality of symbol data on the transmitting side and transmitting the same, and conversely, on the receiving side, performing FFT processing on the received data. Therefore, the OFDM receiver needs to detect the symbol timing of the OFDM symbol in order to perform FFT demodulation. Therefore, generally, in OFDM transmission, reference symbols for timing synchronization are periodically transmitted.

FIG. 10 shows an example of an OFDM transmission frame for transmitting the above-mentioned reference symbol, and this transmission frame is composed of a plurality of OFDM symbols. A no-signal period called a null symbol is provided at the beginning of the frame, and frame synchronization is detected by transmitting this null symbol. Further, coarse synchronization of symbol timing is also detected by this null symbol. A null symbol is followed by a reference symbol for timing synchronization, which detects the exact symbol synchronization. Information symbols are transmitted after the reference symbol.

A sine sweep waveform is an example of a reference symbol for timing synchronization. As shown in FIGS. 11A and 11B, the sine sweep waveform is a complex sine wave whose amplitude is constant and whose frequency changes linearly with time. Note that FIG. 11 (a) is I-axis data, and FIG. 11 (b) is
Indicates Q-axis data. Since this waveform shows a large autocorrelation, the symbol timing can be detected by detecting the correlation of the sine sweep waveform included in the received signal.

[0006]

As described above, the conventional OFDM is used.
Although the method of timing synchronization in transmission has been described, the conventional technique has the following problems. In order to detect timing synchronization with the reference symbol,
It is necessary to detect the correlation of the reference symbols included in the input signal. The number N of samples of the reference symbol is determined by the number of carriers in OFDM transmission, that is, the number of points of the FFT circuit, and is generally N = 512 to 8192 in the case of digital broadcasting using OFDM. Therefore, there is a problem that an enormous-scale arithmetic circuit is required to perform the correlation calculation in real time on such a high-speed and long data series.

Further, the OFDM transmission system is characterized in that it is resistant to multipath interference in principle. Therefore, OFDM
The receiving device has a problem to perform stable synchronization detection even under poor receiving conditions in which multipath with a large level exists.

The present invention has been made to solve the above problems. Even when detecting the symbol synchronization by detecting the correlation of the reference symbols, the arithmetic circuit of the receiving device can be small in scale, and can withstand multipath. OF with excellent interference
An object of the present invention is to provide a DM transmission system and a transmission / reception device using this system.

[0009]

Means for Solving the Problems O according to the first invention of the present application
The FDM receiver uses a null symbol and a reference symbol for timing synchronization (the number of samples in the effective symbol portion is N (N
Is a natural number) and an OFDM modulated wave including
A quadrature detector that obtains an I-axis (in-phase detection axis) signal and a Q-axis (quadrature detection axis) signal by quadrature-detecting this signal and converting it to a baseband signal, and a null symbol is detected from the output of this quadrature detector. A null symbol detection circuit, a timing generation circuit that generates a timing signal synchronized with an input signal based on the output of the null symbol detection circuit, and the quadrature detector based on the timing signal output from the timing generation circuit. A first memory for fetching data from the I-axis signal output of the reference symbol in the effective symbol portion of the reference symbol and a predetermined range (the number of samples is M (M is a natural number M> N)) before and after the valid symbol portion; Based on the timing signal output from the timing generation circuit, the effective symbol portion of the reference symbol and its front and rear are selected from the Q-axis signal output of the quadrature detector. A second memory that takes in data in a predetermined range (the number of samples is M (M is a natural number M> N)), and reference symbol generation that generates I-axis data or Q-axis data of the effective symbol portion of the reference symbol From the first memory and the reference symbol generator, N samples of data are respectively input, correlation calculation is performed on the two input data series, and this calculation is read out of the first memory. A first position for detecting the correlation of the reference symbols by offsetting the start position and repeating the first position;
Data of N samples are respectively input from the correlator, the second memory and the reference symbol generator, a correlation operation is performed on the input two data series, and this operation is performed by the second memory. A second correlator that detects the correlation of the reference symbols by offsetting and repeating the read start position of, a first absolute value detector that obtains the absolute value of the output of the first correlator, and A second absolute value detector for obtaining the absolute value of the output of the second correlator; an adder for adding the output of the first absolute value detector and the output of the second absolute value detector; From the maximum value detection circuit that sequentially compares the outputs of the adders to detect the maximum value, and the offset amount of the read start position of the first and second memories when the maximum value detection circuit detects the maximum value, Check for symbol timing deviation ; And a timing error detecting circuit for, and is characterized in that to correct the timing of the timing generating circuit based on the output of the timing error detecting circuit.

An OFDM receiver according to a second aspect of the present invention is an OFDM (orthogonal frequency division multiplex) including a null symbol and a reference symbol for timing synchronization (the number of samples of an effective symbol portion is N (N is a natural number)). A modulated wave is input, and this signal is quadrature-detected and converted into a baseband signal to obtain an I-axis (in-phase detection axis) signal and a Q-axis (quadrature detection axis) signal, and an output of this quadrature detector. A null symbol detection circuit that detects a null symbol from the inside, and a timing generation circuit that generates a timing signal synchronized with the input signal based on the output of this null symbol detection circuit,
Based on the timing signal output from this timing generation circuit, from the I-axis signal output of the quadrature detector,
A first memory for fetching data in an effective symbol portion of the reference symbol and a predetermined range (a sample number is M (M is a natural number M> N)) before and after the valid symbol portion, and a timing signal output from the timing generation circuit. Based on the above, from the Q-axis signal output of the quadrature detector, the effective symbol portion of the reference symbol and a predetermined range before and after the effective symbol portion (the number of samples is M
A second memory for taking in data (M is a natural number M> N) and I of the effective symbol portion of the reference symbol.
Data of N samples are input from the reference symbol generator that generates axis data or Q-axis data, and the first memory and the reference symbol generator, and a correlation operation is performed on the input two data series. By performing this operation and offsetting the read start position of the first memory, the first correlator that detects the correlation of the reference symbols, the second memory, and the reference symbol generator, N samples of data are respectively input, correlation calculation is performed on the two input data sequences, and this calculation is repeated by offsetting the read start position of the second memory, and the correlation of the reference symbols is calculated. A second correlator to be detected, a first squaring circuit for obtaining the square of the output of the first correlator, and a square of the output of the second correlator. A second squaring circuit that, the first 2
An adder that adds the output of the squaring circuit and the output of the second squaring circuit, a maximum value detection circuit that sequentially compares the outputs of the adder to detect the maximum value, and this maximum value detection circuit is the maximum value. And a timing error detection circuit that detects a deviation of the symbol timing from the offset amount of the read start positions of the first and second memories when the timing is detected, and the timing is detected based on the output of the timing error detection circuit. It is characterized in that the timing of the generating circuit is corrected.

An OFDM receiver according to a third invention of the present application is the OFDM receiver according to any one of the first and second inventions, wherein the first memory is based on a timing signal output from the timing generation circuit. From the I-axis signal output of the quadrature detector, a part of the effective symbol of the reference symbol and data in a predetermined range before and after the effective symbol are fetched,
Based on the timing signal output from the timing generation circuit, takes in a part of the effective symbol of the reference symbol and a predetermined range of data before and after it from the Q-axis signal output of the quadrature detector. The reference symbol generator generates I-axis data or Q-axis data of a part of the effective symbols of the reference symbol.

In the OFDM receiver according to the fourth invention of the present application, in the configuration of any one of the first, second, and third inventions, the maximum value detection circuit sets a predetermined value to the previously detected maximum value. The feature is that the maximum value is detected by adding and comparing this value with the input value.

An OFDM transmission system according to a fifth aspect of the present invention is an OFDM (orthogonal frequency division multiplexing) transmission system for transmitting a sine sweep symbol as a reference symbol for timing synchronization, and a sine sweep having a constant amplitude in a frequency domain. Using a transmission means for OFDM-modulating a symbol and transmitting it, and using the sine sweep symbol as a reference symbol for equalization, the inverse number of the amplitude of the OFDM demodulated sine sweep symbol is obtained, and the amplitude of each orthogonal frequency carrier is calculated from the inverse number of the amplitude. And a receiving means for detecting and correcting an error.

An OFDM transmitter according to the sixth invention of the present application is a sine sweep generator for generating a sine sweep symbol having a constant amplitude in the frequency domain, an output of the sine sweep generator, information symbol data and other information. It is characterized by comprising a multiplexing circuit for multiplexing the reference symbol data, a modulation circuit for OFDM-modulating the output of the multiplexing circuit, and a quadrature modulator for quadrature-modulating the output of the modulation circuit. .

An OFDM receiving apparatus according to a seventh aspect of the present invention is input with an OFDM modulated wave containing a sine sweep symbol whose amplitude is constant in the frequency domain, and orthogonally detects this signal to convert it into a baseband signal. A demodulation circuit for performing OFDM demodulation on the output of the quadrature detector, an amplitude reciprocal calculation circuit for obtaining the reciprocal value of the amplitude of the sine soup symbol from the output of the demodulation circuit, and an output of the amplitude reciprocal calculation circuit. As an amplitude correction coefficient, an equalization circuit for equalizing each orthogonal frequency carrier is provided.

[0016]

In the OFDM receiving apparatus according to the first aspect of the present invention, the quadrature detector quadrature-detects the OFDM modulated wave including the null symbol and the reference symbol (the number of effective symbol samples N) for timing synchronization to obtain a baseband signal. Convert to signal. The null symbol detection circuit detects a null symbol from the output of the quadrature detector. The timing generator circuit
The output of the null symbol detection circuit generates a timing signal synchronized with the input signal. The first correlator determines a correlation between the N sample data supplied from the first memory and the N sample data supplied from the reference symbol generator. Further, the second correlator obtains the correlation between the N sample data supplied from the second memory and the N sample data supplied from the reference symbol generator. The correlation between the reference symbols is detected by repeating these two correlation operations while shifting the read start positions of the first and second memories. The first absolute value detection circuit obtains the absolute value of the output of the first correlator, and the second absolute value detection circuit
The absolute value of the output of the second correlator is obtained. The adder is the first
The output of the absolute value detector of and the output of the second absolute value detector are added. This makes it possible to reliably detect the correlation even when the input signal has a phase shift. The maximum value detection circuit sequentially compares the outputs of the adders and detects the maximum value of the correlation output. The timing error detection circuit detects the deviation of the symbol timing from the offset amount of the read position of the first and second memories when the maximum value detection circuit detects the maximum value. The output of the timing error detection circuit is supplied to the timing generation circuit, and the deviation of the symbol timing is corrected. As described above, the size of the timing synchronization circuit is reduced by detecting the correlation of the reference symbols.

In the OFDM receiving apparatus according to the second aspect of the present invention, the quadrature detector quadrature-detects an OFDM modulated wave containing a null symbol and a reference symbol for synchronization of timing (the number of effective symbol samples N) to obtain a baseband signal. Convert to signal. The null symbol detection circuit detects a null symbol from the output of the quadrature detector. The timing generation circuit generates a timing signal synchronized with the input signal by the output of the null symbol detection circuit. The first correlator determines a correlation between the N sample data supplied from the first memory and the N sample data supplied from the reference symbol generator. Further, the second correlator obtains the correlation between the N sample data supplied from the second memory and the N sample data supplied from the reference symbol generator. The correlation between the reference symbols is detected by repeating these two correlation operations while shifting the read start positions of the first and second memories. The first squaring circuit obtains a value obtained by squaring the first correlator output, and the second squaring circuit outputs a second squared value.
The value obtained by squaring the output of the correlator is calculated. The adder adds the output of the first squaring circuit and the output of the second squaring circuit. This makes it possible to reliably detect the correlation even when the input signal has a phase shift. The maximum value detection circuit sequentially compares the outputs of the adders and detects the maximum value of the correlation output. The timing error detection circuit detects the deviation of the symbol timing from the offset amount of the read position of the first and second memories when the maximum value detection circuit detects the maximum value.
The output of the timing error detection circuit is supplied to the timing generation circuit, and the deviation of the symbol timing is corrected.
As described above, the size of the timing synchronization circuit is reduced by detecting the correlation of the reference symbols.

In the OFDM receiver according to the third aspect of the present invention, the first memory uses the timing signal from the timing generation circuit to output a part of the effective symbol of the reference symbol from the I-axis signal output of the quadrature detector. And the data in a predetermined range before and after that. The second memory fetches a part of the effective symbol of the reference symbol and data in a predetermined range before and after it from the Q-axis signal output of the quadrature detector in accordance with the timing signal from the timing generation circuit. The reference symbol generator generates I-axis data or Q-axis data of a part of the effective symbols of the reference symbol. From the above,
If correlation detection is possible using part of the reference symbol,
This serves to further reduce the scale of the timing synchronization circuit by detecting the correlation of the reference symbols.

In the OFDM receiving apparatus according to the fourth aspect of the present invention, the maximum value detection circuit adds a predetermined value to the maximum value of the correlation output previously detected, compares this value with the input value, and outputs the maximum value. To detect. As a result, in addition to the correlation output due to the desired wave, even when the correlation output at the same level due to the multipath signal is detected, the correlation output due to the desired wave is detected as the maximum value.

In the OFDM transmission system according to the fifth aspect of the present invention, when transmitting a sine sweep symbol as a reference symbol for timing synchronization, the transmitting side performs OFDM modulation on a sine sweep symbol having a constant amplitude in the frequency domain. And the sine sweep symbol is also used as a reference signal for equalization on the receiving side, and OF
The amplitude error of each carrier is detected and corrected by obtaining the reciprocal of the amplitude of the DM demodulated sine sweep symbol. From the above, when detecting the amplitude error on the receiving side,
Amplitude reference data becomes unnecessary, which acts to reduce the circuit scale of the receiving device.

In the OFDM transmitter according to the sixth aspect of the present invention, the sine soup generator generates a sine sweep symbol having a constant amplitude in the frequency domain. The multiplexing circuit multiplexes the output of the sine sweep generator with the information symbol data and other reference symbol data. The modulation circuit performs OFDM modulation on the output of the multiplexing circuit, and the quadrature modulation circuit performs quadrature modulation on the output of the modulation circuit. As described above, the sine soup symbol having a constant amplitude in the frequency domain is periodically transmitted.

In the OFDM receiver according to the seventh aspect of the present invention, the quadrature detector quadrature-detects the OFDM modulated wave containing the sine sweep symbol and converts it into a baseband signal. The demodulation circuit OFDM demodulates the output of the quadrature detector. The amplitude reciprocal calculation circuit obtains the reciprocal value of the amplitude of the sine soup symbol from the output of the demodulation circuit. The equalization circuit equalizes each carrier by using the output of the amplitude reciprocal calculation circuit as an amplitude correction coefficient. As described above, when the amplitude error is detected, the reference data of the amplitude becomes unnecessary, and the circuit scale of the receiving device is reduced.

[0023]

Embodiments of the present invention will be described in detail below with reference to FIGS. FIG. 1 shows the OFDM of the present invention.
It is a figure which shows one Example of the receiver (henceforth an OFDM receiver) by a transmission system. In FIG. 1, the received signal is converted to a predetermined frequency by the frequency converter 101, converted to a digital signal by the A / D converter 102, and input to the quadrature detector 103.

The quadrature detector 103 quadrature-detects an input signal with a reproduced carrier and outputs a baseband OFDM modulated wave. The in-phase detection axis output (I-axis signal) and the quadrature detection axis output (Q-axis signal) of the quadrature detector 103 are O respectively.
The real part and the imaginary part of the FDM modulated wave. Quadrature detector 103
Is output to the FFT circuit 104.

The FFT circuit 104 receives the input OF
In the DM modulated wave, the FFT operation is performed on the effective symbol excluding the guard period. The output of the FFT circuit 104 is complex data representing the amplitude / phase of each carrier,
The equalizer 105 corrects the amplitude / phase shift due to multipath and the like, and the demultiplexer 106 separates the null symbol and the reference symbol, and outputs only the information symbol as received data.

The output of the quadrature detector 103 is branched and supplied to the null symbol detection circuit 118. The null symbol detection circuit 118 detects the timing of the null symbol at the beginning of the frame. Null symbol detection circuit 11
The output of 8 is supplied to the timing generation circuit 119, thereby achieving frame timing synchronization and coarse symbol timing synchronization.

More accurate symbol timing is detected by using the reference symbol transmitted after the null symbol. The case where a sine sweep symbol is used as the reference symbol will be described below.

The exact symbol timing is determined by detecting the correlation of sine sweep symbols. However, the correlation calculation here is a convolution calculation of a large number of samples, and a huge number of circuits are required to perform real-time processing.

Therefore, by utilizing the timing detected by the null symbol, as shown in FIG. 2, the effective symbol portion of the sine sweep symbol and the signals of several tens of samples before and after the effective symbol portion are fetched into a memory such as a RAM and then correlated. Calculate. The margins before and after the sine sweep are set in consideration of the timing detection error due to the null symbol.

Specifically, as shown in FIG. 1, the I-axis output and the Q-axis output of the quadrature detector 103 are respectively RAM1.
07 and 108 are input. Also, the address generation circuit 1
A W (write) address is supplied from 10 and signals in the range (sample number M) shown in FIG.
Is written to. On the other hand, the ROM 109 stores the I-axis data (the number of samples N) of the sine sweep symbol transmitted in advance.

After the writing to the RAMs 107 and 108 is completed, the correlation detection of the sine sweep symbol is performed. The R (read) address is RA from the address generation circuit 110.
N samples are output from the M samples of data supplied to and written in the Ms 107 and 108. Further, the R address is supplied from the address generation circuit 110 to the ROM 109, and N samples of data are output.

The outputs of the RAM 107 and the ROM 109 are input to the correlator 111, and the correlation between the transmitted sine sweep I-axis data and the received sine sweep I-axis data is detected. Similarly, the RAM 108 and the ROM 1
The output of 09 is input to the correlator 112, and the correlation between the transmitted sine sweep I-axis data and the received sine sweep Q-axis data is detected.

The outputs of the correlators 111 and 112 are added by the adder 115 after the absolute values are obtained by the absolute value detectors 113 and 114, respectively. Here, by obtaining the sum of the above two types of correlation outputs, it is possible to reliably detect the correlation even when the input signal has a phase rotation. The output of the adder 115 is supplied to the maximum value detection circuit 116.

The above calculation is repeated while shifting the read start points of the RAMs 107 and 108. Since the correlation output becomes maximum when the received data sequence and the transmitted data sequence match, the maximum value detection circuit 116 can detect this timing to detect an accurate symbol timing.

The output of the maximum value detection circuit 116 is supplied to the timing error detection circuit 117. In addition, the address offset amount of the read start point of the RAMs 107 and 108 from the address generation circuit 110 is the timing error detection circuit 11.
7 is supplied.

The timing error detection circuit 117 is provided in the RAM 10 at the timing when the correlation output becomes maximum.
The read offset amounts of 7 and 108 are detected, and the deviation of the symbol timing is detected from this value. The output of the timing error detection circuit 117 is supplied to the timing generation circuit 119 and the deviation of the symbol timing is corrected.

In FIG. 1, the absolute value detection circuit 11
It is also possible to replace 3,114 with a squaring circuit.
That is, by correlating the outputs of the correlators 111 and 112 and adding them, the correlation can be reliably detected even when the input signal has a phase rotation.

FIG. 3 is a diagram showing a specific configuration of the correlator 111 of FIG. The configuration of the correlator 112 is also the same. In FIG. 3, the data from the ROM 109 and the RAM 107 are multiplied by the multiplier 301. Multiplier 301
Is output by the adder 302 and the latch circuit 303.
After the values for the samples are integrated, they are fetched by the latch circuit 304 and output.

Here, a clear signal is supplied to the latch circuit 303 at the start of the correlation calculation, and the previous calculation result is cleared to zero. Further, when the integration of N samples is completed, a clock signal is supplied to the latch 304 to take in data.

FIG. 4 is a diagram showing a specific structure of the maximum value detection circuit 116 shown in FIG. In FIG. 4, the adder 11
The correlation output supplied from No. 5 is input to the terminal A of the comparator 401. The latch circuit 402 holds the maximum value of the correlation output. When the sine sweep signal is written in the RAMs 107 and 108, the output is cleared to 0 by the clear signal.

The output of the latch circuit 402 is the adder 4
It is input to the terminal B of the comparator 401 via 03. The output of the comparator 401 becomes H (high level) when A> B, and this is supplied to the clock terminal of the latch circuit 402, and the input signal is held as a new maximum value. Also,
The output of the comparator 401 is output as the maximum value detection timing.

The adder 403 is supplied with a predetermined value from the offset generation circuit 404 and is added to the output of the latch circuit 402. This is because even if the received signal contains a high level multipath signal,
This is for stably detecting the maximum value of the correlation output.

Particularly, when a multipath signal of D / U = 0 dB exists, the level of the correlation peak due to the desired wave detected first and the level of the correlation peak due to the multipath wave detected later become substantially equal. Even in such a case, as shown in FIG. 4, it is possible to stably determine the first correlation peak as the maximum value by offsetting the previously detected maximum value by a predetermined level.

FIG. 5 is a diagram showing a specific configuration of the timing error detection circuit 117 in FIG. In FIG. 5, the latch circuit 501 is supplied with data indicating the offset amount of the read start points of the RAMs 107 and 108 from the address generation circuit 110. In addition, the latch circuit 501
The output of the maximum value detection circuit 116 is supplied to the clock terminal of, and the address offset amount when the correlation output becomes maximum is sequentially latched.

When the correlation detection of all the samples of the RAMs 107 and 108 is completed, the timing signal is supplied to the latch circuit 502 and the output of the latch circuit 501 is fetched. As a result, when the correlation output becomes the maximum, the deviation of the offset amount of the read start points of the RAMs 107 and 108 is obtained. The correction signal generation circuit 503 compares the output of the latch circuit 502 with a predetermined value to generate and output a signal for correcting the deviation of the symbol timing.

As described above, according to the configuration of the embodiment described with reference to FIGS. 1 to 5, OFDM is performed using the sign soup symbol.
In the OFDM receiver for detecting the symbol timing of a symbol, it is possible to reduce the circuit scale and to perform accurate synchronization detection even when the input signal has phase rotation or multipath.

1 to 5, the correlation detection is performed on the data of the entire sine sweep symbol, but the correlation detection can also be performed using a part of the center of the sine sweep symbol. In this case, the writing ranges of the RAMs 107 and 108 may be the central portion of the sine sweep and the portions before and after the central portion, and the content of the ROM 109 may be data of the central portion of the sine sweep.

1 to 5, the case where the sine sweep waveform is used as the reference symbol has been described. However, by changing the contents of the ROM 109,
It can be applied even when other reference symbols are used.

The OFDM receiver for detecting the timing synchronization by utilizing the correlation of the reference symbols has been described above. Next, another embodiment of the present invention will be described. The reference symbol can be used not only as a reference signal for timing synchronization in the receiving apparatus but also as a reference signal for equalizing the deviation of the amplitude / phase of the received signal due to multipath or the like. FIG. 6 is a diagram showing an OFDM transmission system in the case where the reference symbol for timing synchronization is a sine sweep symbol and this is also used as a reference signal for equalization.

As described above, the sine sweep waveform is a complex sine wave whose amplitude is constant and whose frequency changes linearly with time. FIG. 6A shows the amplitude of the sine sweep waveform shown in FIG. 11 in the frequency domain. This is obtained by performing FFT on the N-point complex data shown in FIG. It can be seen from FIG. 6A that the amplitude of the data obtained by converting the sine sweep waveform shown in FIG. 11 into the frequency domain is not constant.

FIG. 6 (b) is a diagram showing a case of the OFDM transmission system of the present invention, and for the data of FIG. 6 (a),
The phase is unchanged, and only the amplitude is modified so that it is constant in the effective carrier portion and zero in other portions.

When the frequency domain data of the sine sweep symbol is modified in this way, amplitude waviness occurs in the time domain as shown in FIGS. 7 (a) and 7 (b).
However, the above-described timing detection can be performed in the receiving device even by using the waveforms of FIGS. 7A and 7B. Furthermore, when this waveform is demodulated by FFT and the amplitude and phase shift of each frequency component are detected as a reference signal for equalization, the amplitude is constant in the frequency domain in advance, so that it is easy to detect the amplitude error. There is.

FIG. 8 is a diagram showing the structure of an OFDM transmitter for transmitting an OFDM signal containing a sine sweep symbol whose amplitude is constant in the frequency domain. In FIG. 8, the information symbol data is input to the multiplexer 803. The null symbol generator 801 generates 0 data for generating a null symbol, and this null symbol is input to the multiplexer 803.
The sine sweep generator 802 generates sine sweep data whose amplitude is constant in the above-mentioned frequency domain, and this sine sweep data also has a multiplexer 803.
Is input to

The multiplexer 803 multiplexes each input in the order of, for example, a null symbol, a sine sweep symbol, and an information symbol to form a transmission frame. The output of the multiplexer 803 is supplied to the IFFT circuit 804, and the real part and the imaginary part of the baseband OFDM modulated wave are generated by the IFFT operation.

The output of the IFFT circuit 804 is supplied to the guard interval adding circuit 805, and the second half of one OFDM symbol is copied as a guard interval before the symbol in order to reduce the influence of multipath interference.

The output of the guard interval adding circuit 805 is quadrature-modulated by a carrier of a predetermined frequency by a quadrature modulator 806 and then converted into an analog signal by a D / A converter 807. The output of the D / A converter 807 is frequency-converted into an RF signal by the frequency converter 808 and transmitted.

FIG. 9 is a diagram showing a concrete configuration of the equalizer 105 of FIG. 1 which constitutes an OFDM receiving apparatus for receiving an OFDM signal including a sine sweep symbol having a constant amplitude in the frequency domain. . In FIG. 9, I data (real part of FFT output) and Q data (imaginary part of FFT output) supplied from the FFT circuit 104 are branched and input to the phase detection circuit 901, and phase detection is performed.

The output of the phase detection circuit 901 is the subtractor 902.
Is input to The phase data of the sine sweep symbol in the frequency domain is input from the ROM 903 to the subtractor 902. That is, the subtractor 902 detects the difference between the phase data of the received sine sweep and the phase data of the transmitted sine sweep for each carrier to detect the amount of phase shift due to the transmission path characteristics. The output of the subtractor 902 is input to the sin / cos conversion circuit 904,
The phase data is converted to Gaussian coordinate data.

On the other hand, the I data and Q data of the FFT output are branched and also input to the amplitude reciprocal calculation circuit 905. The amplitude reciprocal calculation circuit 905 obtains the amplitude reciprocal for each carrier from the I data and the Q data,
The amount of amplitude deviation due to the characteristics of the transmission path is detected.

As described above, the sin / cos conversion circuit 904 converts the phase data output from the subtractor 902 into Gaussian coordinate data, and the amplitude reciprocal calculation circuit 905 calculates F
The reciprocal value of the amplitude is detected from the I data and Q data of the FT output. Here, since a sine sweep symbol having a constant amplitude in the frequency domain is transmitted in advance, the amplitude error of each carrier due to the transmission path characteristics can be detected by obtaining the reciprocal of the amplitude of the received signal. Therefore,
The receiving device has an advantage that the ROM for storing the amplitude reference data is unnecessary.

The output of the amplitude reciprocal calculation circuit 905 is supplied to the multipliers 906 and 907 as a coefficient for amplitude correction, and si
It is multiplied with the output of the n / cos conversion circuit 904. Multiplier 90
The outputs of 6 and 907 are input to the FIFO memory 908. The FIFO memory 908 takes in data for one symbol when the operation result of the sine sweep symbol is inputted, and thereafter, repeatedly outputs the taken data at the symbol period until the next sine soup symbol is inputted. To do.

The output of the FIFO memory 908 is input to the complex multiplier 909 and is subjected to complex multiplication with the input signal.
As a result, the amplitude / phase shift for each carrier is equalized and output.

As described above, according to the configurations of the embodiments described with reference to FIGS. 6 to 9, when the received signal is equalized by using the sine sweep symbol as the reference signal, the circuit scale of the receiving device can be reduced.

[0064]

According to the present invention as described above,
In the OFDM receiver, when detecting the symbol synchronization of the OFDM symbol by detecting the correlation of the reference symbols included in the transmission signal, it is possible to reduce the circuit scale and improve the interference resistance against multipath. Further, even when the received signal is equalized using the sine sweep symbol as the reference signal, the circuit scale of the receiving device can be reduced.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing an embodiment of an OFDM receiving apparatus according to the present invention.

FIG. 2 is a diagram showing a transmission frame configuration for explaining a writing range of the RAM of FIG.

3 is a block circuit diagram showing a specific configuration of correlator 111 in FIG.

4 is a block circuit diagram showing a specific configuration of a maximum value detection circuit 116 in FIG.

5 is a block circuit diagram showing a specific configuration of the timing error detection circuit 117 of FIG.

FIG. 6 is a waveform diagram showing an amplitude change in a frequency domain of a sine sweep waveform for explaining the OFDM transmission system according to the present invention.

FIG. 7 is a waveform diagram showing changes in the time domain when the frequency domain data of the sine sweep symbol is modified, for explaining the OFDM transmission system according to the present invention.

FIG. 8 is a block circuit diagram showing an embodiment of an OFDM transmitter according to the present invention.

FIG. 9 is a block circuit diagram showing a specific configuration of an equalizer in an OFDM receiver according to the present invention.

FIG. 10 is a diagram showing a transmission frame configuration for explaining a conventional OFDM transmission method.

FIG. 11 is a waveform diagram showing an example of a sine sweep waveform according to a conventional OFDM transmission method.

[Explanation of symbols]

101 ... Frequency converter, 102 ... A / D converter, 103
... quadrature detector, 104 ... FFT circuit, 105 ... equalizer,
106 ... Demultiplexer, 107, 108 ... RAM,
109 ... ROM, 110 ... Address generation circuit, 111,
112 ... Correlator, 113, 114 ... Absolute value detector, 11
5 ... Adder, 116 ... Maximum value detection circuit, 117 ... Timing error detection circuit, 118 ... Null symbol detection circuit, 1
19 ... Timing generation circuit, 301 ... Multiplier, 302 ...
Adder, 303, 304 ... Latch circuit, 401 ... Comparator, 402 ... Latch circuit, 403 ... Adder, 404 ... Offset generation circuit, 501, 502 ... Latch circuit, 50
3 ... Correction signal generation circuit 801 ... Null symbol generator, 802 ... Sine sweep generator, 803 ... Multiplexer, 804 ... IFFT circuit, 805 ... Guard interval addition circuit, 806 ... Quadrature modulator, 807 ... D / A converter, 808 ... Frequency converter, 901 ... Phase detection circuit, 902 ... Subtractor, 903 ...
ROM, 904 ... sin / cos conversion circuit, 905 ... Amplitude reciprocal calculation circuit, 906, 907 ... Multiplier, 908 ... F
IFO memory, 909 ... Complex multiplier.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Makoto Sato 3-3-9 Shimbashi, Minato-ku, Tokyo Toshiba Abu E. Co., Ltd.

Claims (7)

[Claims] 1. An OFDM (Orthogonal Frequency Division Multiplex) modulated wave including a null symbol and a reference symbol for timing synchronization (where the number of samples in an effective symbol portion is N (N is a natural number)) is input, and this signal is orthogonalized. A quadrature detector for detecting and converting into a baseband signal to obtain an I-axis (in-phase detection axis) signal and a Q-axis (quadrature detection axis) signal, and a null symbol detection for detecting a null symbol from the output of this quadrature detector. A circuit, a timing generation circuit that generates a timing signal synchronized with an input signal based on the output of the null symbol detection circuit, and an I-axis signal of the quadrature detector based on the timing signal output from the timing generation circuit. From the output,
A first memory for fetching data in an effective symbol portion of the reference symbol and a predetermined range (the number of samples is M (M is a natural number M> N)) before and after the valid symbol portion; and a timing signal output from the timing generation circuit. Based on, from among the Q-axis signal output of the quadrature detector,
A second memory for taking in the data of the effective symbol part of the reference symbol and a predetermined range (the number of samples is M (M is a natural number M> N)) before and after the effective symbol part, and the I-axis of the effective symbol part of the reference symbol Data of N samples are respectively input from the reference symbol generator that generates data or Q-axis data, and the first memory and the reference symbol generator, and a correlation operation is performed on the input two data series. , A first correlator that detects the correlation of the reference symbols by repeating the operation by offsetting the read start position of the first memory, and the second memory and the reference symbol generator, respectively. N samples of data are input, a correlation operation is performed on the two input data series, and this operation is performed at the read start position of the second memory. A second correlator that detects the correlation of the reference symbols by repeating offsets, a first absolute value detector that obtains the absolute value of the output of the first correlator, and the second correlation Second absolute value detector for obtaining the absolute value of the output of the detector, an adder for adding the output of the first absolute value detector and the output of the second absolute value detector, and the output of this adder And a maximum value detection circuit for detecting the maximum value by sequentially comparing, and an offset amount of the read start position of the first and second memories when the maximum value detection circuit detects the maximum value,
An OFDM receiver comprising: a timing error detection circuit for detecting a deviation of symbol timing, and correcting the timing of the timing generation circuit based on the output of the timing error detection circuit. 2. An OFDM (orthogonal frequency division multiplex) modulated wave including a null symbol and a reference symbol for timing synchronization (where the number of samples in the effective symbol portion is N (N is a natural number)) is input, and this signal is orthogonalized. A quadrature detector for detecting and converting into a baseband signal to obtain an I-axis (in-phase detection axis) signal and a Q-axis (quadrature detection axis) signal, and a null symbol detection for detecting a null symbol from the output of this quadrature detector. A circuit, a timing generation circuit that generates a timing signal synchronized with an input signal based on the output of the null symbol detection circuit, and an I-axis signal of the quadrature detector based on the timing signal output from the timing generation circuit. From the output,
A first memory for fetching data in an effective symbol portion of the reference symbol and a predetermined range (the number of samples is M (M is a natural number M> N)) before and after the valid symbol portion; and a timing signal output from the timing generation circuit. Based on, from among the Q-axis signal output of the quadrature detector,
A second memory for taking in the data of the effective symbol part of the reference symbol and a predetermined range (the number of samples is M (M is a natural number M> N)) before and after the effective symbol part, and the I-axis of the effective symbol part of the reference symbol Data of N samples are respectively input from the reference symbol generator that generates data or Q-axis data, and the first memory and the reference symbol generator, and a correlation operation is performed on the input two data series. , A first correlator that detects the correlation of the reference symbols by repeating the operation by offsetting the read start position of the first memory, and the second memory and the reference symbol generator, respectively. N samples of data are input, a correlation operation is performed on the two input data series, and this operation is performed at the read start position of the second memory. And a second correlator that detects the correlation of the reference symbols by repeating the offset, a first squaring circuit that obtains the square of the output of the first correlator, and a second correlator output. A second squaring circuit for obtaining the square of, an adder for adding the output of the first squaring circuit and the output of the second squaring circuit, and comparing the outputs of this adder sequentially A maximum value detection circuit for detecting a value and an offset amount of the read start position of the first and second memories when the maximum value detection circuit detects the maximum value,
An OFDM receiver comprising: a timing error detection circuit for detecting a deviation of symbol timing, and correcting the timing of the timing generation circuit based on the output of the timing error detection circuit. 3. The first memory, based on the timing signal output from the timing generation circuit, selects a part of the effective symbols of the reference symbol from the I-axis signal output of the quadrature detector and the part thereof. The second memory captures data in a predetermined range before and after, and the second memory outputs the Q of the quadrature detector based on the timing signal output from the timing generation circuit.
From the axis signal output, a part of the effective symbol of the reference symbol and data in a predetermined range before and after the effective symbol are fetched, and the reference symbol generator outputs the I-axis data or the Q-axis of a part of the effective symbol of the reference symbol. The OF according to claim 1, wherein the OF is generated.
DM receiver. 4. The maximum value detecting circuit adds a predetermined value to the previously detected maximum value and compares the value with an input value to detect the maximum value. The OFDM receiver according to any one of 2 and 3. 5. In an OFDM (Orthogonal Frequency Division Multiplexing) transmission system for transmitting a sine sweep symbol as the reference symbol for timing synchronization, a transmitting means for OFDM-modulating and transmitting a sine sweep symbol having a constant amplitude in a frequency domain. And a receiving means for using the sine sweep symbol as a reference symbol for equalization to obtain the reciprocal of the amplitude of the OFDM demodulated sine sweep symbol, and detecting and correcting the amplitude error of each orthogonal frequency carrier from the reciprocal of the amplitude. An OFDM transmission system characterized by comprising: 6. A sine sweep generator for generating a sine sweep symbol having a constant amplitude in the frequency domain, and a multiplexing circuit for multiplexing the output of this sine sweep generator, information symbol data and other reference symbol data. An OFDM transmitting apparatus comprising: a modulation circuit for OFDM-modulating the output of the multiplexing circuit; and a quadrature modulator for quadrature-modulating the output of the modulation circuit. 7. A quadrature detector for inputting an OFDM modulated wave containing a sine sweep symbol having a constant amplitude in the frequency domain, quadrature detecting this signal and converting it to a baseband signal, and an output of this quadrature detector A demodulation circuit for OFDM demodulation, an amplitude reciprocal calculation circuit for obtaining the reciprocal value of the amplitude of the sine-soup symbol from the output of this demodulation circuit, and an output of this amplitude reciprocal calculation circuit as an amplitude correction coefficient for each orthogonal frequency carrier. An OFDM receiver including an equalization circuit for performing equalization.