JPH08250962A - Lc filter - Google Patents

Lc filter

Info

Publication number
JPH08250962A
JPH08250962A JP7051471A JP5147195A JPH08250962A JP H08250962 A JPH08250962 A JP H08250962A JP 7051471 A JP7051471 A JP 7051471A JP 5147195 A JP5147195 A JP 5147195A JP H08250962 A JPH08250962 A JP H08250962A
Authority
JP
Japan
Prior art keywords
conductor patterns
substrate
filter
spiral
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP7051471A
Other languages
Japanese (ja)
Inventor
Yoshiaki Akachi
義昭 赤地
Katsumi Yabusaki
勝巳 薮崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP7051471A priority Critical patent/JPH08250962A/en
Publication of JPH08250962A publication Critical patent/JPH08250962A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE: To improve the attenuation characteristic at a high frequency band by providing a ground pattern between spiral conductor patterns forming different inductors arranged side by side. CONSTITUTION: Plural sets of inductors consisting of one set of spiral conductor patterns 2a, 2b formed on both sides of a board 9 and of conductor patterns of throughhole sections 4a, 4b provided in the center of the spiral to connect the one set of the conductor patterns 2a, 2b are connected in series. Furthermore, a capacitor 8 is connected to a connection section or both the connection section and a non-connection section of plural inductors. Then a ground pattern 3 is provided between the spiral conductor patterns 2a, 2b being components of the different inductors. Thus, stray capacitance between the conductor patterns 2a, 2b is reduced and the attenuation characteristic at a high frequency band is improved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は,インダクタンス及びコ
ンデンサで構成されたLCフィルタに係り,特に,渦巻
状の導体パターンで作られたインダクタンスを複数直列
に接続したLCフィルタに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LC filter composed of an inductance and a capacitor, and more particularly to an LC filter in which a plurality of inductances made of a spiral conductor pattern are connected in series.

【0002】[0002]

【従来の技術】従来より,インダクタンス及びコンデン
サで構成されたLCフィルタとしては,基板上にチップ
型のインダクタンス及びコンデンサを実装したものや,
基板上に形成された渦巻状の導体パターンで作られたイ
ンダクタンス部と前記基板上に実装されたコンデンサと
で構成されたもの(特開昭63−15619号公報)な
ど各種のものが知られている。
2. Description of the Related Art Conventionally, as an LC filter composed of an inductance and a capacitor, a chip type inductance and a capacitor mounted on a substrate,
Various things are known such as an inductance part made of a spiral conductor pattern formed on a substrate and a capacitor mounted on the substrate (Japanese Patent Laid-Open No. 63-15619). There is.

【0003】これらのLCフィルタは,使用目的や使用
状態等に応じて選択的に使用されているが,基板上に形
成した渦巻状の導体パターンでインダクタンス部を作っ
たものは,形状やコストの点で優れているので使用され
ることが多くなっている。
These LC filters are selectively used according to the purpose of use and the state of use. However, the one in which the inductance part is formed by the spiral conductor pattern formed on the substrate has a large shape and cost. It is often used because it is excellent.

【0004】[0004]

【発明が解決しようとする課題】ところが,上記渦巻状
の導体パターンで作ったインダクタンスを基板上に複数
個直列に接続して設けた場合,異なるインダクタンスを
構成する隣合う導体パターン間の浮遊容量によりLCフ
ィルタの高周波領域に於ける減衰特性が悪化する。この
浮遊容量は,渦巻状の導体パターン同士が近づくにつれ
て増加するため,LCフィルタを小型化するために異な
るインダクタンスを構成する導体パターン間の距離を小
さくした場合には特に問題となる。
However, when a plurality of inductances formed by the spiral conductor pattern are connected in series on the substrate, the stray capacitance between adjacent conductor patterns forming different inductances causes The attenuation characteristic in the high frequency region of the LC filter deteriorates. Since the stray capacitance increases as the spiral conductor patterns approach each other, it becomes a particular problem when the distance between the conductor patterns forming different inductances is reduced in order to downsize the LC filter.

【0005】又,渦巻状の導体パターンで作ったインダ
クタンスでは,大きなインダクタンス値を確保すること
が容易でなく,隣合って配置されたインダクタンス間の
磁気的影響も無視できなかった。
In addition, it is not easy to secure a large inductance value with an inductance made of a spiral conductor pattern, and the magnetic influence between the adjacently arranged inductances cannot be ignored.

【0006】そこで,本発明は,渦巻状の導体パターン
で作ったインダクタンスを基板上に複数直列に接続した
LCフィルタに於いて,大きなインダクタンス値を確保
すると共に,隣合う渦巻状の導体パターン間の浮遊容量
を減少させることにより,高周波領域に於ける減衰特性
を向上させたLCフィルタを提供することを目的とす
る。
Therefore, the present invention secures a large inductance value in an LC filter in which a plurality of inductances made of spiral conductor patterns are connected in series on a substrate, and at the same time, between adjacent spiral conductor patterns. It is an object of the present invention to provide an LC filter having improved attenuation characteristics in a high frequency region by reducing stray capacitance.

【0007】[0007]

【課題を解決するための手段】本発明のLCフィルタ
は,基板の両面に形成された一組の渦巻状の導体パター
ンと,前記一組の導体パターンを接続するため渦巻の中
心部に設けられたスルーホール部の導体パターンとで構
成されたインダクタンスを複数個直列に接続し,更に,
前記複数個のインダクタンスの接続部又は接続部と非接
続部の双方にコンデンサを接続したLCフィルタに於い
て,隣合って配置され,異なるインダクタンスを構成す
る前記渦巻状の導体パターンの間に,グランドパターン
を設けたことを特徴とするものである。
The LC filter of the present invention is provided at the center of a spiral for connecting a set of spiral conductor patterns formed on both surfaces of a substrate and the set of conductor patterns. Connect a plurality of inductances composed of the conductor pattern of the through-hole part in series, and
In an LC filter in which capacitors are connected to both the connecting portion or the connecting portion and the non-connecting portion of the plurality of inductances, a ground is provided between the spiral conductor patterns that are arranged adjacent to each other and form different inductances. The feature is that a pattern is provided.

【0008】[0008]

【作用】本発明のLCフィルタは,基板の両面に形成さ
れた一組の渦巻状の導体パターンと,前記一組の導体パ
ターンを接続するため渦巻の中心部に設けられたスルー
ホール部の導体パターンとで構成されたインダクタンス
を複数個直列に接続し,更に,前記複数個のインダクタ
ンスの接続部又は接続部と非接続部の双方にコンデンサ
を接続したLCフィルタに於いて,隣合って配置され,
異なるインダクタンスを構成する前記渦巻状の導体パタ
ーンの間に,グランドパターンを設けたものであるか
ら,隣合う渦巻状の導体パターン間の浮遊容量を減少さ
せ,高周波領域に於ける減衰特性を向上させることがで
きる。
According to the LC filter of the present invention, a set of spiral conductor patterns formed on both surfaces of a substrate and a conductor of a through hole provided in the center of the spiral for connecting the set of conductor patterns. In an LC filter in which a plurality of inductances each composed of a pattern are connected in series, and capacitors are connected to both the connecting portions or both the connecting portion and the non-connecting portion of the plurality of inductances, they are arranged adjacent to each other. ,
Since the ground pattern is provided between the spiral conductor patterns forming different inductances, the stray capacitance between the adjacent spiral conductor patterns is reduced and the attenuation characteristic in the high frequency region is improved. be able to.

【0009】又、上記作用効果は、隣合う渦巻状の導体
パターン間の距離が1mm以下である場合には、より有
効となる。
Further, the above-mentioned effects are more effective when the distance between the adjacent spiral conductor patterns is 1 mm or less.

【0010】[0010]

【実施例】本発明は、フェライト基板、複合フェライト
基板、ガラエポ基板、誘電体基板等のあらゆる基板で実
施できるが、本実施例では複合フェライト基板で実施し
た場合とガラエポ基板で実施した場合について説明す
る。
EXAMPLES The present invention can be carried out on any substrate such as a ferrite substrate, a composite ferrite substrate, a glass epoxy substrate, a dielectric substrate, etc. In this example, description will be made on the case of performing the composite ferrite substrate and the glass epoxy substrate. To do.

【0011】(複合フェライト基板で実施した場合)ま
ず、製造工程について説明する。
(When Implemented on Composite Ferrite Substrate) First, the manufacturing process will be described.

【0012】(1)焼成済みのMnーMgーZn系フェ
ライトを、平均粒径2〜50μmに粉砕したフェライト
粉末の含有率が65重量%となるように、液晶ポリマー
樹脂と混練し、複合フェライト基板の材料である複合フ
ェライト樹脂を製作する。
(1) A composite ferrite is prepared by kneading a fired Mn-Mg-Zn-based ferrite with a liquid crystal polymer resin so that the content of ferrite powder crushed to an average particle size of 2 to 50 μm is 65% by weight. The composite ferrite resin that is the material of the substrate is manufactured.

【0013】(2)この複合フェライト樹脂を金型でイ
ンジェクト成形し、表裏の導通パターンを設けるための
スルーホールを有する基板(縦2mm、横4.5mm、
厚さ1.6mm)を複数個配列した集合基板を製作す
る。この際、必要に応じて基板を分割するためのVカッ
ト、基板の位置決め用のガイド穴、表裏の電極を接続す
る部分となる穴等を集合基板に設けてもよい。
(2) A substrate having through holes (2 mm in length, 4.5 mm in width,) having through holes for forming conductive patterns on the front and back sides, which is obtained by injecting the composite ferrite resin with a mold.
A plurality of substrates having a thickness of 1.6 mm are arrayed to produce a collective substrate. At this time, if necessary, a V-cut for dividing the substrate, guide holes for positioning the substrate, holes for connecting the front and back electrodes, and the like may be provided in the collective substrate.

【0014】(3)この集合基板のメッキ密着力を向上
させるために表面エッチングを施した後に、無電解銅メ
ッキ、電解銅メッキの順でメッキ処理を行い基板の表面
に導体膜を形成する。
(3) After performing surface etching to improve the plating adhesion of the aggregated substrate, electroless copper plating and electrolytic copper plating are performed in this order to form a conductor film on the surface of the substrate.

【0015】(4)導体膜を形成した集合基板に対して
非露光部がパターンとなる電着レジスト法により図1に
示したような導体膜のパターンを形成する(図1
(a),(b)は集合基板に於ける一の単体基板を示
し、(a)を基板の表面とした場合、(b)は裏面の透
視図を示す)。即ち、基板の表面については、インダク
タンスを形成する渦巻状の導体パターン2a、2b、グ
ランドパターン3、電極6a、6b以外の部分を露光
し、裏面については、コイル部を形成する渦巻状の導体
パターン2a’、2b’、チップコンデンサ実装用ラン
ド5a、5b、電極6a’、6b’以外の部分を露光す
る。
(4) A conductor film pattern as shown in FIG. 1 is formed on an aggregate substrate on which a conductor film is formed by an electrodeposition resist method in which a non-exposed portion becomes a pattern (FIG. 1).
(A) and (b) show one single substrate in the collective substrate, and when (a) is the front surface of the substrate, (b) shows a perspective view of the back surface). That is, on the front surface of the substrate, the portions other than the spiral conductor patterns 2a and 2b forming the inductance, the ground pattern 3, and the electrodes 6a and 6b are exposed, and on the back surface, the spiral conductor pattern forming the coil portion. The portions other than 2a 'and 2b', the chip capacitor mounting lands 5a and 5b, and the electrodes 6a 'and 6b' are exposed.

【0016】ここで、基板の表面に形成された渦巻状の
導体パターン2aと裏面に形成された渦巻状の導体パタ
ーン2a’はスルーホール4aを介して導通し、基板の
表面の渦巻状の導体パターン2bと裏面の渦巻状の導体
パターン2b’はスルーホール4aを介して導通する。
又、表面の電極6aと裏面の電極6a’、表面の電極6
bと裏面の電極6b’、グランドパターン3とグランド
側のチップコンデンサ実装用ランド5bは、集合基板を
成形する際に設けた穴の一部7を介して導通する。
Here, the spiral conductor pattern 2a formed on the front surface of the substrate and the spiral conductor pattern 2a 'formed on the back surface are electrically connected through the through holes 4a, and the spiral conductor pattern on the front surface of the substrate. The pattern 2b and the spiral conductor pattern 2b 'on the back surface are electrically connected to each other through the through hole 4a.
Further, the front surface electrode 6a, the rear surface electrode 6a ', and the front surface electrode 6a
b, the electrode 6b 'on the back surface, the ground pattern 3, and the chip-capacitor mounting land 5b on the ground side are electrically connected through a part 7 of a hole provided when the collective substrate is molded.

【0017】更に、酸化防止のためパターンを形成した
銅の表面に、ニッケルメッキ、錫メッキ、半田メッキ等
のメッキ処理を施してもよい。
Further, the surface of the copper having a pattern formed thereon for preventing oxidation may be plated with nickel, tin, solder or the like.

【0018】(5)基板の裏面に形成されたチップコン
デンサ実装用ランド5a、5bに図1(c)に示したよ
うにチップコンデンサ8を半田付けした後、集合基板を
分割してLCフィルタ9を得る。
(5) After the chip capacitors 8 are soldered to the chip capacitor mounting lands 5a and 5b formed on the back surface of the substrate as shown in FIG. 1C, the collective substrate is divided and the LC filter 9 is divided. To get

【0019】更に、インダクタンスを形成する渦巻状の
導体パターンの表面に保護用のレジスト用インクを塗布
してもよい。
Further, protective resist ink may be applied to the surface of the spiral conductor pattern forming the inductance.

【0020】次に、こうして得られたLCフィルタの回
路構成と電気的特性について説明する。
Next, the circuit configuration and electrical characteristics of the LC filter thus obtained will be described.

【0021】図2は上述のLCフィルタの回路図で、図
1の渦巻状の導体パターン2a、2a’は回路図に示し
たインダクタンスL1に対応し、渦巻状の導体パターン
2b、2b’はインダクタンスL2に対応する。つま
り,基板の両面に設けられた一組の渦巻状の導体パター
ンにより,一つのインダクタンスが形成される。又、図
1のチップコンデンサ8は回路図に示したコンデンサC
1に対応する。
FIG. 2 is a circuit diagram of the LC filter described above. The spiral conductor patterns 2a and 2a 'in FIG. 1 correspond to the inductance L1 shown in the circuit diagram, and the spiral conductor patterns 2b and 2b' are inductances. Corresponds to L2. That is, one inductance is formed by a set of spiral conductor patterns provided on both surfaces of the substrate. The chip capacitor 8 in FIG. 1 is the capacitor C shown in the circuit diagram.
Corresponds to 1.

【0022】同回路図で、インダクタンスL1,L2と
並列に接続されているCは浮遊容量であり,この容量
が大きいとローパスフィルタの高周波領域に於ける減衰
特性が悪化するため、Cの値は小さい方がよい。
In the circuit diagram, C p connected in parallel with the inductances L1 and L2 is a stray capacitance. If this capacitance is large, the attenuation characteristic in the high frequency region of the low pass filter deteriorates, so C p The smaller the value, the better.

【0023】表1は、図2に示した構成を有するLCフ
ィルタのINとOUT間の浮遊容量の測定値を示す。こ
こで,同表の試料A及び試料1〜4に於ける、渦巻状の
導体パターンの幅W1,W1’、両渦巻状の導体パター
ン間の距離W2、W2’、グランドパターンの幅W3は
下記のとうりとした(W1、W1’、W2、W2’、W
3は図1に於ける各部の寸法を示す)。又、試料3、試
料4はグランドパターンを設けなかった。
Table 1 shows measured values of the stray capacitance between IN and OUT of the LC filter having the configuration shown in FIG. Here, in Sample A and Samples 1 to 4 of the same table, the widths W1 and W1 ′ of the spiral conductor patterns, the distances W2 and W2 ′ between the spiral conductor patterns, and the width W3 of the ground pattern are as follows. Smooth (W1, W1 ', W2, W2', W
3 shows the size of each part in FIG. 1). In addition, samples 3 and 4 were not provided with a ground pattern.

【0024】試料A:W1=W1’=1.35mm、W
2=W2’=1.5mm、グランドパターン無し、L1
・L2の巻数は表裏各2周 試料1:W1=W1’=1.35mm、W2=W2’=
1.0mm、グランドパターン無し、L1・L2の巻数
は表裏各2周 試料2:W1=1.55mm、W1’=1.35mm、
W2=0.5mm、W2’=1.0mm、グランドパタ
ーン無し、L1・L2の巻数は表裏各2周 試料3:W1=W1’=1.35mm、W2=W2’=
1.0mm、W3=0.3mm、L1・L2の巻数は表
裏各2周 試料4:W1=1.55mm、W1’=1.35mm、
W2=0.5mm、W2’=1.0mm、W3=0.3
mm、L1・L2の巻数は表裏各2周
Sample A: W1 = W1 '= 1.35 mm, W
2 = W2 '= 1.5 mm, no ground pattern, L1
・ The number of turns of L2 is 2 times for each of the front and back. Sample 1: W1 = W1 ′ = 1.35 mm, W2 = W2 ′ =
1.0 mm, no ground pattern, the number of turns of L1 and L2 is two turns for each of the front and back. Sample 2: W1 = 1.55 mm, W1 ′ = 1.35 mm,
W2 = 0.5 mm, W2 ′ = 1.0 mm, no ground pattern, the number of turns of L1 and L2 is two for each front and back Sample 3: W1 = W1 ′ = 1.35 mm, W2 = W2 ′ =
1.0 mm, W3 = 0.3 mm, the number of turns of L1 and L2 is two turns for each front and back Sample 4: W1 = 1.55 mm, W1 ′ = 1.35 mm,
W2 = 0.5 mm, W2 ′ = 1.0 mm, W3 = 0.3
mm, the number of turns of L1 and L2 is 2 laps on each side

【0025】[0025]

【表1】 [Table 1]

【0026】表1からも明らかなように、両渦巻状の導
体パターン間の距離W2、W2’が短くなるにつれて、
浮遊容量が増加し、特にW2、W2’が1mm以下(試
料1、2)になると、その影響が問題となることが多
い。このような場合に、両渦巻状の導体パターン間にグ
ランドパターンを設けると(試料3、4)、両渦巻状の
導体パターン間の距離W2、W2’を1.5mmとした
場合(試料A)とほぼ同じ値まで浮遊容量を減少させる
ことができる。
As is clear from Table 1, as the distances W2 and W2 'between the spiral conductor patterns become shorter,
When the stray capacitance increases, and especially when W2 and W2 ′ are 1 mm or less (Samples 1 and 2), the influence thereof often becomes a problem. In this case, if a ground pattern is provided between the spiral conductor patterns (Samples 3 and 4), the distances W2 and W2 ′ between the spiral conductor patterns are set to 1.5 mm (Sample A). The stray capacitance can be reduced to about the same value as.

【0027】図3は、上記試料2(L1=L2=23n
H)、試料4(L1=L2=23nH)にC1=30p
Fのチップコンデサを実装して測定した、LCフィルタ
の減衰特性を示す。同図からも明らかなように、グラン
ドパターンを設けた場合のほうが、1GHz以上の領域
に於ける減衰特性が向上している。尚、C1の値により
高域遮断周波数の設定を変えた場合,減衰特性の向上が
みられる周波数領域は変化するが,いずれの場合でも高
周波領域に於ける減衰特性が向上する。
FIG. 3 shows the sample 2 (L1 = L2 = 23n).
H), C1 = 30p in sample 4 (L1 = L2 = 23nH)
The attenuation characteristic of the LC filter measured by mounting the F chip capacitor is shown. As is clear from the figure, when the ground pattern is provided, the attenuation characteristic in the region of 1 GHz or higher is improved. Incidentally, when the setting of the high cutoff frequency is changed by the value of C1, the frequency range where the improvement of the attenuation characteristic is observed changes, but in any case, the attenuation characteristic in the high frequency region is improved.

【0028】尚、グランドパターンの幅W3は、インダ
クタンスを構成する渦巻状の導体パターンのパターン幅
より広いことが好ましく、少なくともパターン幅と同程
度であることが好ましい。
The width W3 of the ground pattern is preferably wider than the pattern width of the spiral conductor pattern forming the inductance, and at least about the same as the pattern width.

【0029】(ガラエポ基板で実施した場合)上述複合
フェライト基板の場合とほぼ同様の導体パターン(L1
・L2の巻数は表裏各3周)を有するガラエポ基板(縦
2.5mm、横4.8mm、厚さ0.5mm)を,通常
の両面基板を製造する場合と同様の方法で製作した。尚
基板の各部の寸法は下記のとおりとした。
(When implemented on the glass epoxy substrate) The conductor pattern (L1
A glass epoxy substrate (2.5 mm in length, 4.8 mm in width, 0.5 mm in thickness) having three turns of L2 on each of the front and back sides was manufactured by the same method as in the case of manufacturing a normal double-sided board. The dimensions of each part of the substrate are as follows.

【0030】試料5:W1=W1’=1.6mm、W2
=W2’=1.2mm、W3=0.6mm、L1・L2
の巻数は表裏各3周 試料6:W1=W1’=1.6mm、W2=W2’=
1.2mm、グランドパターン無し、L1・L2の巻数
は表裏各3周 尚、上記ガラエポ基板に於けるL1、L2は両試料(試
料5、試料6)共、40nHであった。
Sample 5: W1 = W1 '= 1.6 mm, W2
= W2 '= 1.2mm, W3 = 0.6mm, L1 ・ L2
The number of turns is 3 for each of the front and back. Sample 6: W1 = W1 '= 1.6 mm, W2 = W2' =
1.2 mm, no ground pattern, and the number of turns of L1 and L2 was 3 turns on each of the front and back sides. L1 and L2 in the glass epoxy substrate were 40 nH for both samples (Sample 5 and Sample 6).

【0031】図4,このガラエポ基板のチップコンデン
サ実装用ランドにC1=33pFのチップコンデンサを
実装して測定した,LCフィルタの減衰特性を示す。同
図からも明らかなように、グランドパターンを設けた場
合のほうが、1GHz以上の領域に於ける減衰特性が向
上している。
FIG. 4 shows the attenuation characteristic of the LC filter measured by mounting a chip capacitor of C1 = 33 pF on the chip capacitor mounting land of the glass epoxy substrate. As is clear from the figure, when the ground pattern is provided, the attenuation characteristic in the region of 1 GHz or higher is improved.

【0032】(グランドパターン及び渦巻状の導体パタ
ーンについて)上述のLCフィルタは,2つのインダク
タンスを直列に接続したものに限らず,図8の回路図に
示したように3つ以上のインダクタンスL1,L2,L
3を直列に接続したものであってもよい。この場合,図
5に示したようにグランドパターン3a,3bの一方を
表面に,他方を裏面に設けてもよく,図6に示したよう
に同一面に設けてもよい。又,3つ以上のインダクタン
スを設けた場合には,図7に示したように各部のグラン
ドパターンを導体パターンで接続していてもよい。
(Regarding the ground pattern and the spiral conductor pattern) The above-mentioned LC filter is not limited to one in which two inductances are connected in series, but three or more inductances L1, L1 and L2 as shown in the circuit diagram of FIG. L2, L
3 may be connected in series. In this case, one of the ground patterns 3a and 3b may be provided on the front surface and the other on the back surface as shown in FIG. 5, or they may be provided on the same surface as shown in FIG. When three or more inductances are provided, the ground pattern of each part may be connected by a conductor pattern as shown in FIG.

【0033】尚、本実施例では、T型又はT型を多段接
続したLCフィルタについて説明したが、π型を多段接
続したLCフィルタであっても同様の効果が得られる。
In this embodiment, the T-type or the LC filter in which T-types are connected in multiple stages has been described, but the same effect can be obtained even in the case of an LC filter in which π-types are connected in multiple stages.

【0034】次に,図5,図6,図8に示した基板に於
けるインダクタンスL1,L2,L3(図8)について
説明する。
Next, the inductances L1, L2 and L3 (FIG. 8) in the substrate shown in FIGS. 5, 6 and 8 will be described.

【0035】本発明に於けるインダクタンスは外側から
中心部に向かって渦巻状に形成された導体パターンと,
前記導体パターンとスルーホールを介して接続し中心部
から外側に向かって渦巻状に形成された導体パターンと
で構成されているので,インダクタンスを形成する渦巻
状の導体パターンの巻始めと巻終りは共に渦巻の外側と
なる。従って,容易に複数のインダクタンスを直列に接
続したパターンを構成することができる。
The inductance in the present invention includes a conductor pattern formed in a spiral shape from the outside toward the center,
Since the conductor pattern is connected to the conductor pattern through the through hole and is formed in a spiral shape from the center toward the outside, the start and end of the spiral conductive pattern forming the inductance are Both are outside the spiral. Therefore, it is possible to easily form a pattern in which a plurality of inductances are connected in series.

【0036】又,渦巻状の導体パターンの巻始めからス
ルーホールに向かう旋回方向と,この導体パターンとス
ルーホールを介して接続した反対面の導体パターンのス
ルーホールから巻終りに向かう旋回方向を,一方の面か
らみた場合(反対面は透視する),両者が同一になって
いるため,同一パターン長でより大きなインダクタンス
値を得ることができる。
Further, the swirl direction of the spiral conductor pattern from the winding start to the through hole and the swirl direction from the through hole of the conductor pattern on the opposite surface connected to this conductor pattern via the through hole to the end of winding. When viewed from one surface (the other surface is seen through), since both are the same, a larger inductance value can be obtained with the same pattern length.

【0037】次に,L1に対応する図5,図6,図7の
渦巻状の導体パターン12a,12a’,L2に対応し
た導体パターン12b,12b’,L3に対応した導体
パターン12c,12’について説明する。
Next, the spiral conductor patterns 12a, 12a 'corresponding to L1 in FIGS. 5, 6 and 7 and the conductor patterns 12b, 12b' corresponding to L2, and the conductor patterns 12c, 12 'corresponding to L3. Will be described.

【0038】図8のINに対応する電極16a,16
a’(両電極は接続している)からOUTに対応する電
極16b,16b’(両電極は接続している)に向かっ
て導体パターンを見た場合,隣合う渦巻状の導体パター
ン12a,12a’と導体パターン12b,12b’と
の旋回方向は逆向きになっている。又,同様に渦巻状の
導体パターン12b,12b’と導体パターン12c,
12c’との旋回方向も逆向きになっている。
Electrodes 16a, 16 corresponding to IN in FIG.
When looking at the conductor patterns from a '(both electrodes are connected) to the electrodes 16b, 16b' (both electrodes are connected) corresponding to OUT, adjacent spiral conductor patterns 12a, 12a The turning directions of the'and the conductor patterns 12b and 12b 'are opposite to each other. Similarly, the spiral conductor patterns 12b, 12b 'and the conductor patterns 12c,
The turning direction of 12c 'is also opposite.

【0039】このように,異なったインダクタンスを形
成する渦巻状の導体パターンを同一平面上に配置する場
合に隣合う渦巻状の導体パターンの旋回方向(パターン
を同一進行方向から見た場合)を互いに異ならせたこと
により,両者の磁気的影響を小さくすることができる。
In this way, when the spiral conductor patterns forming different inductances are arranged on the same plane, the swirling directions of adjacent spiral conductor patterns (when the patterns are viewed from the same advancing direction) are mutually different. By making them different, the magnetic influence of both can be reduced.

【0040】[0040]

【効果】本発明は,以上説明したようにグランドパター
ンを設けたことにより,LCフィルタの高周波領域に於
ける減衰特性を向上させることができる。又,LCフィ
ルタのインダクタンスを,渦巻状の導体パターンで構成
した場合に,高いインダクタンス値を確保することがで
きる。
The present invention can improve the attenuation characteristic in the high frequency region of the LC filter by providing the ground pattern as described above. Further, when the inductance of the LC filter is formed of a spiral conductor pattern, a high inductance value can be secured.

【図面の簡単な説明】[Brief description of drawings]

【図1】実施例で用いたLCフィルタの基板を示した平
面図である。
FIG. 1 is a plan view showing a substrate of an LC filter used in an example.

【図2】実施例のLCフィルタの回路を示した回路図で
ある。
FIG. 2 is a circuit diagram showing a circuit of an LC filter according to an embodiment.

【図3】実施例のLCフィルタの減衰特性を示したグラ
フである。
FIG. 3 is a graph showing the attenuation characteristic of the LC filter of the example.

【図4】実施例のLCフィルタの減衰特性を示したグラ
フである。
FIG. 4 is a graph showing the attenuation characteristic of the LC filter of the example.

【図5】実施例で用いたLCフィルタの基板を示した平
面図である。
FIG. 5 is a plan view showing a substrate of an LC filter used in an example.

【図6】実施例で用いたLCフィルタの基板を示した平
面図である。
FIG. 6 is a plan view showing a substrate of an LC filter used in an example.

【図7】実施例で用いたLCフィルタの基板を示した平
面図である。
FIG. 7 is a plan view showing a substrate of an LC filter used in an example.

【図8】実施例のLCフィルタの回路を示した回路図で
ある。
FIG. 8 is a circuit diagram showing a circuit of an LC filter of an example.

【符号の説明】[Explanation of symbols]

2a,2a’,2b,2b’,12a,12a’,12
b,12b’,12c,12c’ 渦巻状の導体パター
ン 3,13 グランドパターン 4a,4b,14a,14b,14c スルーホール 5a,5b,15a,15b チップコンデンサ実装用
ランド 6a,6a’,6b,6b’,16a,16a’,16
b,16b’ 電極 8,18 チップコンデンサ 9,19 基板
2a, 2a ', 2b, 2b', 12a, 12a ', 12
b, 12b ', 12c, 12c' Spiral conductor pattern 3, 13 Ground pattern 4a, 4b, 14a, 14b, 14c Through hole 5a, 5b, 15a, 15b Chip capacitor mounting land 6a, 6a ', 6b, 6b ', 16a, 16a', 16
b, 16b 'electrode 8,18 chip capacitor 9,19 substrate

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 基板の両面に形成された一組の渦巻状の
導体パターンと,前記一組の導体パターンを接続するた
め渦巻の中心部に設けられたスルーホール部の導体パタ
ーンとで構成されたインダクタンスを複数個直列に接続
し,更に,前記複数個のインダクタンスの接続部又は接
続部と非接続部の双方にコンデンサを接続したLCフィ
ルタに於いて,隣合って配置され,異なるインダクタン
スを構成する前記渦巻状の導体パターンの間に,グラン
ドパターンを設けたことを特徴とするLCフィルタ。
1. A set of spiral conductor patterns formed on both surfaces of a substrate, and a through-hole conductor pattern provided at the center of the spiral for connecting the set of conductor patterns. In a LC filter in which a plurality of inductances are connected in series, and capacitors are connected to both the connecting portion or both connecting portion and non-connecting portion of the plurality of inductances, they are arranged adjacent to each other to form different inductances. An LC filter, wherein a ground pattern is provided between the spiral conductor patterns.
【請求項2】 請求項1のLCフィルタに於いて、隣合
って配置され,異なるインダクタンスを構成する渦巻状
の導体パターン間の距離を,前記導体パターン幅以上1
mm以下としたことを特徴とする請求項1記載のLCフ
ィルタ。
2. The LC filter according to claim 1, wherein the distance between the spiral conductor patterns arranged adjacent to each other and forming different inductances is equal to or more than 1 of the conductor pattern width.
The LC filter according to claim 1, wherein the LC filter has a thickness of not more than mm.
JP7051471A 1995-03-10 1995-03-10 Lc filter Withdrawn JPH08250962A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7051471A JPH08250962A (en) 1995-03-10 1995-03-10 Lc filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7051471A JPH08250962A (en) 1995-03-10 1995-03-10 Lc filter

Publications (1)

Publication Number Publication Date
JPH08250962A true JPH08250962A (en) 1996-09-27

Family

ID=12887868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7051471A Withdrawn JPH08250962A (en) 1995-03-10 1995-03-10 Lc filter

Country Status (1)

Country Link
JP (1) JPH08250962A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000182868A (en) * 1998-12-11 2000-06-30 Murata Mfg Co Ltd Coil part and manufacture thereof
JP2002329611A (en) * 2001-05-02 2002-11-15 Murata Mfg Co Ltd Laminated composite balum transformer
US6734760B2 (en) * 2001-04-04 2004-05-11 Murata Manufacturing Co., Ltd. Lumped filter, shared antenna unit, and communication device
KR100438160B1 (en) * 2002-03-05 2004-07-01 삼성전자주식회사 Device having inductor and capacitor and a fabrication method thereof
KR100709782B1 (en) * 2006-02-16 2007-04-23 충북대학교 산학협력단 High frequency semiconductor passive device and manufacturing method thereof
JP2010232765A (en) * 2009-03-26 2010-10-14 Fujikura Ltd Electric circuit equipped with inductor and capacitor
WO2016170708A1 (en) * 2015-04-20 2016-10-27 株式会社村田製作所 Circuit board and filter circuit using same
WO2020255791A1 (en) * 2019-06-18 2020-12-24 凸版印刷株式会社 Multi-layer wiring board having lc resonance circuit, and electronic component package using multi-layer wiring board having lc resonance circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000182868A (en) * 1998-12-11 2000-06-30 Murata Mfg Co Ltd Coil part and manufacture thereof
US6734760B2 (en) * 2001-04-04 2004-05-11 Murata Manufacturing Co., Ltd. Lumped filter, shared antenna unit, and communication device
JP2002329611A (en) * 2001-05-02 2002-11-15 Murata Mfg Co Ltd Laminated composite balum transformer
KR100438160B1 (en) * 2002-03-05 2004-07-01 삼성전자주식회사 Device having inductor and capacitor and a fabrication method thereof
KR100709782B1 (en) * 2006-02-16 2007-04-23 충북대학교 산학협력단 High frequency semiconductor passive device and manufacturing method thereof
JP2010232765A (en) * 2009-03-26 2010-10-14 Fujikura Ltd Electric circuit equipped with inductor and capacitor
WO2016170708A1 (en) * 2015-04-20 2016-10-27 株式会社村田製作所 Circuit board and filter circuit using same
WO2020255791A1 (en) * 2019-06-18 2020-12-24 凸版印刷株式会社 Multi-layer wiring board having lc resonance circuit, and electronic component package using multi-layer wiring board having lc resonance circuit

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