JPH08250543A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH08250543A
JPH08250543A JP5530595A JP5530595A JPH08250543A JP H08250543 A JPH08250543 A JP H08250543A JP 5530595 A JP5530595 A JP 5530595A JP 5530595 A JP5530595 A JP 5530595A JP H08250543 A JPH08250543 A JP H08250543A
Authority
JP
Japan
Prior art keywords
semiconductor chip
circuit board
adhesive
resin
conductive resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5530595A
Other languages
Japanese (ja)
Inventor
Shuichi Ishiwata
修一 石綿
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP5530595A priority Critical patent/JPH08250543A/en
Publication of JPH08250543A publication Critical patent/JPH08250543A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]

Abstract

PURPOSE: To lower the connecting resistance by fixing a semiconductor chip and a circuit board by a bonding agent at a part of a region, wherein the semiconductor chip other than a protruding electrodes, which are contributing to the electric connection of the semiconductor chip and the circuit board, faces the circuit board. CONSTITUTION: Under the state, wherein a semiconductor chip 10 is mounted on a circuit board 12, heating, is performed at 120 deg.C for 30 minutes, and a conductive resin 13 and a bonding agent 15 are hardened at the same time. As a result, the semiconductor chip 10 is temporarily fixed on the circuit board 12, and protruding electrodes 11 of the semiconductor chip 10 and bonding pads 14 of the circuit board 12 can be electrically connected. The conductive resin 13 is formed by mixed kneading with thermosetting epoxy resin so that the weight ratio of contained filler becomes 90-95% in much account of connection resistance. Thus, even the protruding electrodes of the semiconductor chip can obtain the electric connection with the bonding pads of the circuit board.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体チップと回路基
板を接続する手段としてフリップチップ実装を用いた半
導体装置の中で、特に低温接続や鉛レス接続を目的に接
続部材として導電性樹脂を用いた半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using flip-chip mounting as means for connecting a semiconductor chip and a circuit board, and particularly, a conductive resin is used as a connecting member for the purpose of low temperature connection or leadless connection. The present invention relates to a semiconductor device used.

【0002】[0002]

【従来の技術】従来、接続部材として導電性樹脂を用い
たフリップチップ実装は、低温接続が可能なために主に
液晶パネル用のガラス回路基板上に駆動用半導体チップ
を実装することを目的に普及してきた。一方、広く一般
的に用いられるセラミック回路基板やガラスエポキシ回
路基板へのフリップチップ実装では、典型的な接続部材
として鉛と錫を主成分とするはんだが用いられてきた。
2. Description of the Related Art Conventionally, flip-chip mounting using a conductive resin as a connecting member is mainly intended to mount a driving semiconductor chip on a glass circuit board for a liquid crystal panel because low-temperature connection is possible. It has become popular. On the other hand, in flip-chip mounting on a ceramic circuit board or a glass epoxy circuit board that is widely and commonly used, solder containing lead and tin as main components has been used as a typical connecting member.

【0003】鉛と錫を主成分とするはんだは、安価で入
手性に優れ接続抵抗を低くすることができる上に機械的
性質にも優れる。しかし、近年において鉛の有害性が着
目されるにつれて、鉛を含有しないはんだ成分や他の接
続部材の検討が盛んになってきた。
Solder containing lead and tin as main components is inexpensive, has excellent availability, can reduce connection resistance, and is also excellent in mechanical properties. However, in recent years, as attention has been paid to the harmfulness of lead, a solder component containing no lead and other connecting members have been actively studied.

【0004】次に第1の従来例として導電性樹脂を接続
部材に用いた液晶パネル用のフリップチップ実装による
半導体装置の構造と製造方法を図14から図18を用い
て説明する。図14は半導体装置を構成する半導体チッ
プ40を素子形成面から見た図である。半導体チップ4
0の素子形成面には突起電極41が複数配置されてい
る。図15は半導体装置を構成する回路基板42を、半
導体チップ40を搭載する面から見た図である。半導体
チップ40の突起電極41に相対する位置にボンディン
グパッド44が配置されている。
Next, as a first conventional example, a structure and a manufacturing method of a semiconductor device by flip chip mounting for a liquid crystal panel using a conductive resin as a connecting member will be described with reference to FIGS. 14 to 18. FIG. 14 is a view of the semiconductor chip 40 constituting the semiconductor device as seen from the element formation surface. Semiconductor chip 4
A plurality of protruding electrodes 41 are arranged on the element formation surface of 0. FIG. 15 is a view of the circuit board 42 constituting the semiconductor device as seen from the surface on which the semiconductor chip 40 is mounted. The bonding pad 44 is arranged at a position facing the protruding electrode 41 of the semiconductor chip 40.

【0005】図16は、半導体チップ40を回路基板4
2に搭載する直前の状態の半導体チップ40と回路基板
42の断面を示している。半導体チップは入出力端子と
して突起電極41を持ち、回路基板42には半導体チッ
プ40の突起電極41に相対する位置に回路基板42側
の入出力端子としてボンディングパッド44がある。ま
た、突起電極41の先端には、半導体チップ40を回路
基板42上に搭載する前に接続部材である導電性樹脂4
3が、隣接する突起電極41同士を短絡することのない
ように必要最少量転写されている。
FIG. 16 shows the semiconductor chip 40 on the circuit board 4.
2 shows a cross section of the semiconductor chip 40 and the circuit board 42 in a state immediately before mounting on the semiconductor device 2. The semiconductor chip has protruding electrodes 41 as input / output terminals, and the circuit board 42 has bonding pads 44 as input / output terminals on the side of the circuit board 42 at positions facing the protruding electrodes 41 of the semiconductor chip 40. Further, at the tip of the protruding electrode 41, before the semiconductor chip 40 is mounted on the circuit board 42, the conductive resin 4 as a connecting member is attached.
3 is transferred in the required minimum amount so as not to short-circuit the adjacent protruding electrodes 41.

【0006】次に半導体チップ40と回路基板42の相
対位置を調整した後に、図17のように半導体チップ4
0を回路基板42上に搭載し、導電性樹脂43の硬化条
件によって加熱硬化する。ここで相対する突起電極41
とボンディングパッド44は導電性樹脂43を介して接
続される。つまり、導電性樹脂43は半導体チップ40
の仮固定と、半導体チップ40と回路基板42の電気的
接続の両方の機能を果たす必要がある。
Next, after adjusting the relative positions of the semiconductor chip 40 and the circuit board 42, as shown in FIG.
0 is mounted on the circuit board 42, and is heated and hardened depending on the hardening condition of the conductive resin 43. The protruding electrode 41 facing here
And the bonding pad 44 are connected via the conductive resin 43. That is, the conductive resin 43 is applied to the semiconductor chip 40.
It is necessary to fulfill the functions of both the temporary fixing and the electrical connection between the semiconductor chip 40 and the circuit board 42.

【0007】この段階で、回路基板42の側から半導体
チップ40の接続及び動作の電気的な検査が可能とな
る。もし、この段階で半導体チップ40のリペアの必要
性が生じた場合は、導電性樹脂43の密着力は仮固定程
度なので容易に回路基板42から半導体チップ40を取
り外すことができる。
At this stage, it is possible to electrically inspect the connection and operation of the semiconductor chip 40 from the side of the circuit board 42. If the semiconductor chip 40 needs to be repaired at this stage, the adhesive force of the conductive resin 43 is about temporary fixing, so that the semiconductor chip 40 can be easily removed from the circuit board 42.

【0008】仮固定を終えた後に図18に示すように、
半導体チップ40の端部よりディスペンサなどを用いて
封止樹脂45を半導体チップ40と回路基板42の間に
充填する。充填された封止樹脂45は加熱場合によって
はUV光の照射によって硬化される。封止樹脂45は、
封止樹脂45の硬化によって半導体チップ40を回路基
板42に強固に固定するとともに、封止樹脂45の硬化
収縮によって突起電極41とボンディングパッド44の
接続抵抗を下げる働きを持ち、さらに湿度や温度サイク
ルに対する信頼性を確保した半導体装置を完成する。
After the temporary fixing is completed, as shown in FIG.
The sealing resin 45 is filled between the semiconductor chip 40 and the circuit board 42 from the end of the semiconductor chip 40 using a dispenser or the like. The filled sealing resin 45 is cured by irradiation with UV light in some cases when heated. The sealing resin 45 is
The semiconductor chip 40 is firmly fixed to the circuit board 42 by the curing of the sealing resin 45, and the curing shrinkage of the sealing resin 45 reduces the connection resistance between the protruding electrode 41 and the bonding pad 44. To complete a semiconductor device with high reliability.

【0009】図19から図22を用いて導電性樹脂を接
続部材に用いたセラミック回路基板やガラスエポキシ回
路基板へのフリップチップ実装を行った半導体装置の構
造と製造方法を第2の従来例として説明する。図19は
半導体装置を構成する半導体チップ50を素子形成面か
ら見た図である。半導体チップ50の素子形成面には、
第1の従来例として示した図14の半導体チップ40の
ように突起電極41が複数配置されているが、半導体チ
ップ40の突起電極41が半導体チップ40の中央部に
も配置されていることに対して、基本的には突起電極5
1の配置個所は半導体チップ50の周辺部に限定されて
いる。
As a second conventional example, a structure and a manufacturing method of a semiconductor device which is flip-chip mounted on a ceramic circuit board or a glass epoxy circuit board using a conductive resin as a connecting member will be described with reference to FIGS. 19 to 22. explain. FIG. 19 is a view of the semiconductor chip 50 forming the semiconductor device as seen from the element formation surface. On the element formation surface of the semiconductor chip 50,
A plurality of protruding electrodes 41 are arranged as in the semiconductor chip 40 of FIG. 14 shown as the first conventional example, but the protruding electrode 41 of the semiconductor chip 40 is also arranged in the central portion of the semiconductor chip 40. On the other hand, basically the protruding electrode 5
The location of 1 is limited to the peripheral portion of the semiconductor chip 50.

【0010】図20は半導体装置を構成する回路基板5
2を、半導体チップ50を搭載する面から見た図であ
る。半導体チップ50の突起電極51に相対する位置に
ボンディングパッド54が配置されている。さらに回路
基板52上のボンディングパッド54の間であり半導体
チップ50のほぼ中央に相対する位置に、封止樹脂55
を予めボンディングパッド54を覆わぬように盛り上げ
て塗布してある。
FIG. 20 shows a circuit board 5 which constitutes a semiconductor device.
FIG. 2 is a view of No. 2 viewed from the surface on which the semiconductor chip 50 is mounted. The bonding pad 54 is arranged at a position facing the protruding electrode 51 of the semiconductor chip 50. Further, the sealing resin 55 is provided between the bonding pads 54 on the circuit board 52 and at a position facing substantially the center of the semiconductor chip 50.
Is applied in advance so as not to cover the bonding pad 54.

【0011】図21は、半導体チップ50を回路基板5
2に搭載する直前の状態の半導体チップ50と回路基板
52の断面を示している。半導体チップは入出力端子と
して突起電極51を持ち、回路基板52には半導体チッ
プ50の突起電極51に相対する位置に回路基板52側
の入出力端子としてボンディングパッド54がある。ま
た、突起電極51の先端には、半導体チップ50を回路
基板52上に搭載する前に接続部材である導電性樹脂5
3が、隣接する突起電極51同士を短絡することのない
ように必要最少量転写されている。
FIG. 21 shows the semiconductor chip 50 on the circuit board 5.
2 shows a cross section of the semiconductor chip 50 and the circuit board 52 in a state immediately before being mounted on the semiconductor device 2. The semiconductor chip has protruding electrodes 51 as input / output terminals, and the circuit board 52 has bonding pads 54 as input / output terminals on the side of the circuit board 52 at positions facing the protruding electrodes 51 of the semiconductor chip 50. In addition, at the tip of the protruding electrode 51, before the semiconductor chip 50 is mounted on the circuit board 52, the conductive resin 5 as a connecting member is attached.
3 is transferred in a necessary minimum amount so as not to short-circuit adjacent protruding electrodes 51.

【0012】次に半導体チップ50と回路基板52の相
対位置を調整した後に、図22のように半導体チップ5
0を回路基板52上に搭載すると、半導体チップ50と
回路基板52の間で圧縮を受けた封止樹脂55は、半導
体チップ50と回路基板52の間に広がり充填される。
この時に突起電極51の先端に転写されている導電性樹
脂53の導電フィラーが封止樹脂55によって流出しな
いように、半導体チップ50を回路基板52に搭載する
前に仮硬化状態にしておく方法も提案されている。
Next, after adjusting the relative positions of the semiconductor chip 50 and the circuit board 52, as shown in FIG.
When 0 is mounted on the circuit board 52, the sealing resin 55 compressed between the semiconductor chip 50 and the circuit board 52 spreads and is filled between the semiconductor chip 50 and the circuit board 52.
At this time, in order to prevent the conductive filler of the conductive resin 53 transferred to the tip of the protruding electrode 51 from flowing out by the sealing resin 55, a method of preliminarily curing the semiconductor chip 50 on the circuit board 52 is also possible. Proposed.

【0013】このように半導体チップ50を回路基板5
2に搭載すると同時に封止樹脂55の充填が終了するた
め、次に封止樹脂55を加熱硬化させることによって半
導体チップ50を回路基板52に固定するとともに導電
性樹脂53を介して各突起電極51とボンディングパッ
ド54の間の電気的接続を行い半導体装置は完成する。
In this way, the semiconductor chip 50 is mounted on the circuit board 5
Since the filling of the sealing resin 55 is completed at the same time when the semiconductor chip 50 is mounted on the circuit board 2, the semiconductor chip 50 is fixed to the circuit board 52 by heating and curing the sealing resin 55, and each protruding electrode 51 is connected via the conductive resin 53. And the bonding pad 54 are electrically connected to complete the semiconductor device.

【0014】[0014]

【発明が解決しようとする課題】一般に接続部材として
用いられる導電性樹脂は、導電性を得るための導電フィ
ラーとして金属粉を含有したエポキシ樹脂である。含有
する金属粉としては、銀または銀パラジウムを鱗片状に
したものが多く用いられる。
The conductive resin generally used as the connecting member is an epoxy resin containing metal powder as a conductive filler for obtaining conductivity. As the metal powder to be contained, scaly silver or silver palladium is often used.

【0015】第1の従来例では、導電性樹脂43を半導
体チップ40の仮固定と、半導体チップ40と回路基板
42の電気的接続の二つの目的に用いた。半導体チップ
40を導電性樹脂43によって仮固定した後に、封止樹
脂45を充填するために、仮固定の強度は十分に必要で
ある。したがって導電性樹脂43に含まれる樹脂成分の
量が必然的に多くなる。
In the first conventional example, the conductive resin 43 is used for two purposes of temporarily fixing the semiconductor chip 40 and electrically connecting the semiconductor chip 40 and the circuit board 42. In order to fill the sealing resin 45 after the semiconductor chip 40 is temporarily fixed with the conductive resin 43, sufficient temporary fixing strength is required. Therefore, the amount of the resin component contained in the conductive resin 43 inevitably increases.

【0016】一方、導電性樹脂43に含まれる導電フィ
ラーの含有率は多ければ多いほど接続抵抗を降下させる
効果があるのだが、先に述べた仮固定の強度を考慮する
と導電性樹脂43中の導電フィラーの含有率は、導電フ
ィラーの金属粉が銀または銀パラジウムの場合の重量比
で80%程度が限界である。これ以上含有させた場合
は、導電性樹脂43中の樹脂成分比率が少なすぎ、導電
性樹脂43の接着強度が低下して、封止樹脂45を充填
する前、または充填中に、仮固定している半導体チップ
40が回路基板42から脱落するか、何れかの接続箇所
でオープンが発生してしまう可能性が高く、歩留まりが
低下するとともに作業性が極端に悪くなる。
On the other hand, the higher the content of the conductive filler contained in the conductive resin 43 is, the more the effect of lowering the connection resistance is obtained. However, considering the strength of temporary fixing described above, the conductive resin 43 in the conductive resin 43 has The content of the conductive filler is limited to about 80% by weight when the metal powder of the conductive filler is silver or silver palladium. When it is contained more than this, the resin component ratio in the conductive resin 43 is too small, and the adhesive strength of the conductive resin 43 is lowered, so that the sealing resin 45 is temporarily fixed before or during the filling. There is a high possibility that the existing semiconductor chip 40 will fall off the circuit board 42 or an open will occur at any of the connection points, resulting in a decrease in yield and extremely poor workability.

【0017】第1の従来例は、主に液晶パネルの駆動半
導体チップをガラス回路基板上に実装するために実用化
されてきた。この液晶パネルに用いられるガラス回路基
板に形成された回路パターンは、抵抗の大きい透明電極
材料、例えばITO等で形成されているために、駆動半
導体チップの接続抵抗値はあまり大きな問題にされてこ
なかった。しかし、液晶パネル以外の用途に導電性樹脂
を接続部材に用いたフリップチップ実装を適応していく
ためには、回路の高速化や低消費電力の観点から実装時
の接続抵抗値を低く抑えることが求められている。実際
に前述の導電フィラー含有率の導電性樹脂を接続部材に
用いた場合、接続端子1カ所の接続抵抗値は数百mΩ〜
1Ωのオーダーとなってしまう。
The first conventional example has been put into practical use mainly for mounting a driving semiconductor chip of a liquid crystal panel on a glass circuit board. Since the circuit pattern formed on the glass circuit board used in this liquid crystal panel is made of a transparent electrode material having a high resistance, such as ITO, the connection resistance value of the driving semiconductor chip has not been a big problem. It was However, in order to adapt flip-chip mounting that uses conductive resin as a connecting member for applications other than liquid crystal panels, the connection resistance value during mounting must be kept low from the viewpoint of circuit speed and low power consumption. Is required. When the conductive resin having the above-mentioned conductive filler content is actually used for the connecting member, the connection resistance value at one connection terminal is several hundred mΩ to
It will be in the order of 1Ω.

【0018】第2の従来例は、第1の従来例では接続抵
抗が高く液晶パネル以外の用途に適さないことから、接
続抵抗を低くするための試みである。つまり、導電性樹
脂53は半導体チップ50を回路基板52に仮固定する
機能を放棄し、あくまでも導電性樹脂53を介して各突
起電極51とボンディングパッド54の間の電気的接続
を行うことに目的を限定している。
The second conventional example is an attempt to reduce the connection resistance because the first conventional example has a high connection resistance and is not suitable for applications other than liquid crystal panels. That is, the purpose of the conductive resin 53 is to abandon the function of temporarily fixing the semiconductor chip 50 to the circuit board 52, and to make electrical connection between the protruding electrodes 51 and the bonding pads 54 through the conductive resin 53. Is limited.

【0019】その結果、導電性樹脂53は含有する導電
フィラーが転写によって突起電極51に付着し、転写後
に形状を損なわぬ程度に微量の樹脂成分を含有すればよ
い。具体的には導電性樹脂53に含有する導電フィラー
の金属粉が銀または銀パラジウムの場合の重量比で90
〜95%に調整されていれば、接続端子1カ所の接続抵
抗値は10〜50mΩにすることが可能となる。
As a result, the conductive resin 53 contained in the conductive resin 53 may contain a small amount of resin component to such an extent that the conductive filler adheres to the protruding electrode 51 by transfer and does not damage the shape after transfer. Specifically, when the metal powder of the conductive filler contained in the conductive resin 53 is silver or silver palladium, the weight ratio is 90.
If adjusted to ˜95%, the connection resistance value at one connection terminal can be set to 10 to 50 mΩ.

【0020】しかし、導電性樹脂53に半導体チップ5
0を回路基板52に仮固定するだけの接着強度は到底望
めないために、半導体チップ50の固定のために先に回
路基板52上に封止樹脂55を供給しておき、先に述べ
たように半導体チップ50を回路基板52に搭載すると
同時に封止樹脂55を半導体チップ50と回路基板52
の間に充填する必要がある。
However, the semiconductor chip 5 is not attached to the conductive resin 53.
Since the adhesive strength for temporarily fixing 0 to the circuit board 52 cannot be expected at all, the sealing resin 55 is previously supplied onto the circuit board 52 for fixing the semiconductor chip 50, as described above. The semiconductor chip 50 is mounted on the circuit board 52, and at the same time, the sealing resin 55 is placed on the semiconductor chip 50 and the circuit board 52.
Need to fill in between.

【0021】封止樹脂55は、半導体チップ50を搭載
するときに半導体チップ50と回路基板52の距離が縮
まることによって広がっていくが、ここで突起電極51
の先端に転写された導電性樹脂53とボンディングパッ
ド54の間に封止樹脂55が浸入して導通不良を起こさ
ぬようにしなければならない。しかも広がった封止樹脂
55が半導体チップ50の外形に対して良好なフィレッ
トが形成されるように量を調整する必要がある。このよ
うに完成した半導体装置の信頼性を確保するには非常に
微妙なコントロールが要求される。
The sealing resin 55 spreads when the semiconductor chip 50 and the circuit board 52 are shortened when the semiconductor chip 50 is mounted.
It is necessary to prevent the encapsulation resin 55 from penetrating between the conductive resin 53 transferred to the tip of the and the bonding pad 54 and causing the conduction failure. Moreover, it is necessary to adjust the amount so that the expanded sealing resin 55 forms a good fillet with respect to the outer shape of the semiconductor chip 50. Very delicate control is required to ensure the reliability of the completed semiconductor device.

【0022】しかも、図20と図21に示すように、予
め半導体チップ50と回路基板52の間隙を十分に充填
できるだけの量の封止樹脂55を回路基板52上に供給
しておくために、第1の従来例の図14のように半導体
チップ50の中央部にも突起電極51を配置することが
不可能である。つまり、第2の従来例では半導体チップ
50の突起電極51の配置に大きな制約があり、フリッ
プチップ実装が半導体チップの中央部にも突起電極を配
置できることで半導体チップの多ピン化に対応可能であ
るというメリットを活かすことができない。
In addition, as shown in FIGS. 20 and 21, in order to previously supply the sealing resin 55 on the circuit board 52 in an amount sufficient to sufficiently fill the gap between the semiconductor chip 50 and the circuit board 52, As shown in FIG. 14 of the first conventional example, it is impossible to dispose the protruding electrode 51 also in the central portion of the semiconductor chip 50. That is, in the second conventional example, there is a large restriction on the arrangement of the protruding electrodes 51 of the semiconductor chip 50, and the flip-chip mounting can also arrange the protruding electrodes at the central portion of the semiconductor chip, which makes it possible to cope with the increase in the number of pins of the semiconductor chip. You cannot take advantage of the advantage of being there.

【0023】さらに半導体チップ50の接続及び動作の
電気的な検査は、封止樹脂55の硬化後に行わなければ
ならず、不良と判断された場合の半導体チップ50の取
り外しは、半導体チップ50の全面が封止樹脂55によ
って固定されているので、第1の従来例に比べて困難で
ある。少なくとも半導体チップ50を取り外した後に、
回路基板52上に残された封止樹脂55等をきれいに取
り除かなければならない。
Furthermore, the electrical inspection of the connection and operation of the semiconductor chip 50 must be performed after the sealing resin 55 has been cured, and when the semiconductor chip 50 is determined to be defective, the semiconductor chip 50 can be removed from the entire surface of the semiconductor chip 50. Is fixed by the sealing resin 55, which is more difficult than the first conventional example. After removing at least the semiconductor chip 50,
The sealing resin 55 and the like left on the circuit board 52 must be removed cleanly.

【0024】つまり、第1の従来例では、封止前の仮固
定の強度と接続抵抗値のバランスが難しく、主な用途は
液晶パネル用のガラス回路基板への半導体チップの実装
に限られており、一方、第2の従来例では、回路基板の
制約をなくしたものの封止樹脂のコントロールの難し
さ、突起電極配置の制約、リペアの必要な不良半導体チ
ップの取り外しの制約があり、いずれも導電性樹脂を接
続部材に用いたフリップチップ実装の普及を困難にして
いる。
That is, in the first conventional example, it is difficult to balance the strength of temporary fixing before sealing and the connection resistance value, and the main application is limited to mounting a semiconductor chip on a glass circuit board for a liquid crystal panel. On the other hand, in the second conventional example, although the restriction of the circuit board is eliminated, the control of the sealing resin is difficult, the projection electrode arrangement is restricted, and the defective semiconductor chip requiring repair is restricted. This makes it difficult to popularize flip chip mounting using a conductive resin as a connecting member.

【0025】本発明の目的は、封止樹脂充填前の半導体
チップの仮固定強度を維持しつつ、接続抵抗を低くする
とともに、突起電極配置の制約を少なくして、リペアも
容易な、導電性樹脂を接続部材に用いたフリップ実装に
よる半導体装置の構成を提供することである。
The object of the present invention is to maintain the temporary fixing strength of the semiconductor chip before filling the encapsulating resin, to lower the connection resistance, to reduce the restrictions on the arrangement of the protruding electrodes, and to facilitate the repair, and to improve the conductivity. It is intended to provide a configuration of a semiconductor device by flip mounting using a resin as a connecting member.

【0026】[0026]

【課題を解決するための手段】上記目的を達成するため
に、本発明の半導体装置は、下記記載の構成を採用す
る。
In order to achieve the above object, the semiconductor device of the present invention adopts the structure described below.

【0027】本発明の半導体装置は、半導体チップに形
成された突起電極と回路基板のボンディングパッドの間
の接続部材として、導電フィラーの金属粉を重量比で9
0〜95%含有する導電性樹脂を用い、前記半導体チッ
プを前記回路基板にフリップチップ実装した半導体装置
であつて、半導体チップと回路基板の電気的接続に寄与
する突起電極以外の半導体チップと回路基板が対向する
領域の一部で、前記半導体チップと前記回路基板が接着
剤によって固定するとともに、前記半導体チップと前記
回路基板の間隙を封止樹脂で充填されていることを特徴
とする。
In the semiconductor device of the present invention, the metal powder of the conductive filler is used as a connecting member between the protruding electrode formed on the semiconductor chip and the bonding pad of the circuit board in a weight ratio of 9%.
A semiconductor device in which the semiconductor chip is flip-chip mounted on the circuit board using a conductive resin containing 0 to 95%, wherein the semiconductor chip and the circuit other than the projecting electrodes contribute to the electrical connection between the semiconductor chip and the circuit board. The semiconductor chip and the circuit board are fixed by an adhesive in a part of a region where the boards face each other, and a gap between the semiconductor chip and the circuit board is filled with a sealing resin.

【0028】さらに前記の半導体装置において、前記接
着剤が前記導電性樹脂中の導電フィラー成分を除く樹脂
成分と同一の樹脂であり、前記接着剤には前記導電性フ
ィラーを含まないことも特徴とする。
Further, in the above semiconductor device, the adhesive is the same resin component as the resin component other than the conductive filler component in the conductive resin, and the adhesive does not contain the conductive filler. To do.

【0029】また、本発明の半導体装置は、半導体チッ
プに半導体チップと回路基板の電気的接続に寄与する突
起電極と電気的接続に寄与しないダミーの突起電極とを
設け、前記ダミーの突起電極と回路基板の間を接着剤で
固定したことも特徴とする。
Further, in the semiconductor device of the present invention, the semiconductor chip is provided with the protruding electrode that contributes to the electrical connection between the semiconductor chip and the circuit board and the dummy protruding electrode that does not contribute to the electrical connection. Another feature is that the circuit boards are fixed with an adhesive.

【0030】[0030]

【作用】本発明においては、半導体チップに形成された
突起電極と回路基板のボンディングパッドの間の接続部
材として、導電フィラーの金属粉を重量比で90〜95
%含有する導電性樹脂を用いているために、低い接続抵
抗値で半導体チップの突起電極と回路基板のボンディン
グパッドの間の電気的接続が取れる。
In the present invention, the metal powder of the conductive filler is used as a connecting member between the protruding electrode formed on the semiconductor chip and the bonding pad of the circuit board in a weight ratio of 90 to 95.
% Of the conductive resin is used, the electrical connection between the protruding electrode of the semiconductor chip and the bonding pad of the circuit board can be made with a low connection resistance value.

【0031】さらに、半導体チップと回路基板の電気的
接続に寄与する突起電極以外の半導体チップと回路基板
が対向する領域の一部で、前記半導体チップと前記回路
基板が、前記導電性樹脂中の導電フィラー成分を除く樹
脂成分と同一の樹脂であり、前記接着剤には前記導電性
フィラーを含まない接着剤によって固定されているの
で、封止樹脂充填前の半導体チップの仮固定の接着強度
は十分に得られ、工程中の半導体チップの脱落や何れか
の接続箇所のオープンが発生する確率が低く、歩留まり
を確保できるとともに作業性に優れるとともに、半導体
チップの突起電極を除く領域の一部で固定すればよいの
で、半導体チップの突起電極配置を著しく制約すること
はない。
Further, the semiconductor chip and the circuit board are formed in the conductive resin in a part of a region where the semiconductor chip and the circuit board are opposed to each other except for the protruding electrodes that contribute to the electrical connection between the semiconductor chip and the circuit board. It is the same resin as the resin component excluding the conductive filler component, and since the adhesive is fixed by the adhesive that does not contain the conductive filler, the adhesive strength of the temporary fixing of the semiconductor chip before sealing resin filling is Sufficiently obtained, the probability that the semiconductor chip will drop out during the process or open at any connection point will be low, the yield can be secured and the workability is excellent, and it will be possible in a part of the area excluding the protruding electrodes of the semiconductor chip. Since it may be fixed, the arrangement of the protruding electrodes on the semiconductor chip is not significantly restricted.

【0032】半導体チップの突起電極と回路基板のボン
ディングパッドの間は、すでに導電性樹脂によって接続
されているので、封止樹脂充填前に回路基板の側から半
導体チップの接続及び動作の電気的な検査が可能とな
る。ここで、もし不良が発見され半導体チップをリペア
のために取り外すことになっても、封止樹脂による半導
体チップと回路基板の間隙全域の接着固定ではなく、半
導体チップと回路基板が対向する領域の一部での接着剤
による固定のため、容易に半導体チップを取り外すこと
ができる。また、回路基板上に残される接着剤は極わず
かであり、これらを取り除くことも容易である。
Since the protruding electrodes of the semiconductor chip and the bonding pads of the circuit board are already connected by the conductive resin, the semiconductor chip is electrically connected and operated electrically from the circuit board side before the sealing resin is filled. Inspection is possible. Here, even if a defect is found and the semiconductor chip is to be removed for repair, it is not adhesively fixed in the entire gap between the semiconductor chip and the circuit board by the sealing resin, but in the area where the semiconductor chip and the circuit board face each other. Since the adhesive is partially fixed, the semiconductor chip can be easily removed. Further, the adhesives left on the circuit board are very small, and it is easy to remove them.

【0033】次に、前記接着剤を前記導電性樹脂中の導
電フィラー成分を除く樹脂成分と同一の樹脂とすれば、
接着剤と導電性樹脂の硬化条件が同一になることから、
同時に両者を硬化することで、工程を少なくすることが
できる。
Next, if the adhesive is the same resin component as the resin component excluding the conductive filler component in the conductive resin,
Since the curing conditions for the adhesive and the conductive resin are the same,
By curing both at the same time, the number of steps can be reduced.

【0034】また、本発明の半導体装置は、半導体チッ
プに半導体チップと回路基板の電気的接続に寄与する突
起電極と電気的接続に寄与しないダミーの突起電極とを
設け、前記ダミーの突起電極と回路基板の間を接着剤で
固定することにより、接着剤の塗布量を極少量にするこ
とができ、接着剤が広がることを避けることができるた
め、半導体チップに形成する突起電極配置の制約をさら
に少なくすることができる。
Further, in the semiconductor device of the present invention, the semiconductor chip is provided with the bump electrode that contributes to the electrical connection between the semiconductor chip and the circuit board and the dummy bump electrode that does not contribute to the electrical connection. By fixing the circuit boards with an adhesive, the amount of adhesive applied can be minimized and the spread of the adhesive can be avoided. It can be further reduced.

【0035】[0035]

【実施例】以下、図面を用いて本発明の第1の実施例に
おける半導体装置の構成を説明する。図1は半導体装置
を構成する半導体チップ10を素子形成面から見た図で
ある。また、図2は半導体装置を構成する回路基板12
を、半導体チップ10を搭載する面から見た図である。
図3は、半導体チップ10を回路基板12に搭載する直
前の状態の半導体チップ10と回路基板12の断面を示
している。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of a semiconductor device according to a first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a view of a semiconductor chip 10 constituting a semiconductor device as seen from an element formation surface. Further, FIG. 2 shows a circuit board 12 constituting a semiconductor device.
FIG. 3 is a view of the semiconductor device viewed from the surface on which the semiconductor chip 10 is mounted.
FIG. 3 shows a cross section of the semiconductor chip 10 and the circuit board 12 immediately before the semiconductor chip 10 is mounted on the circuit board 12.

【0036】半導体チップ10の素子形成面には突起電
極11が半導体チップ10に複数形成されている。半導
体チップ10は1辺が5.4mmの正方形で厚みが0.
625mmの大きさであり、間隔が200μmの突起電
極11を図1のように148個配置した。
A plurality of protruding electrodes 11 are formed on the semiconductor chip 10 on the element forming surface of the semiconductor chip 10. The semiconductor chip 10 is a square having a side of 5.4 mm and a thickness of 0.
As shown in FIG. 1, 148 protruding electrodes 11 each having a size of 625 mm and having an interval of 200 μm were arranged.

【0037】突起電極11の詳細を図4に示す。半導体
チップ10上に窒化膜等で形成されている保護膜18
は、Alの入出力端子17部分で開口している。入出力端
子17の開口上および保護膜18上に、半導体内部への
金属の拡散防止や突起電極11の密着力を高める目的
で、バリア層19をスパッタ、蒸着等の手段により形成
する。バリア層19としてはTi、Cr、Ni等を用いる。
The details of the bump electrode 11 are shown in FIG. A protective film 18 formed of a nitride film or the like on the semiconductor chip 10.
Is open at the Al input / output terminal 17 portion. A barrier layer 19 is formed on the openings of the input / output terminals 17 and on the protective film 18 by means such as sputtering or vapor deposition for the purpose of preventing metal diffusion into the semiconductor and enhancing the adhesion of the protruding electrodes 11. As the barrier layer 19, Ti, Cr, Ni or the like is used.

【0038】バリア層19の上には、さらに図には示し
ていないレジスト層が塗布され、このレジスト層の突起
電極形成部をフォトリソグラフィーによって開口した後
に、前記バリア層19をカソード電極膜として前記レジ
スト層の開口部に電気メッキによって突起電極11を形
成する。突起電極11としては、Au、Cu等をもちいる
が、導電性樹脂13の導電フィラーとの接触抵抗を考慮
すると、突起電極11の少なくとも表面はAuなどの酸化
されにくい材料が望ましい。
On the barrier layer 19, a resist layer (not shown) is further applied, and after the projection electrode forming portion of the resist layer is opened by photolithography, the barrier layer 19 is used as a cathode electrode film. The protruding electrode 11 is formed in the opening of the resist layer by electroplating. Although Au, Cu, or the like is used as the protruding electrode 11, considering the contact resistance of the conductive resin 13 with the conductive filler, it is desirable that at least the surface of the protruding electrode 11 is made of a material such as Au that is not easily oxidized.

【0039】突起電極11を形成した後に、前記レジス
ト層を専用の剥離液によって剥離し、さらに露出してい
るバリア層19を突起電極11をマスクとして利用しエ
ッチングによって取り去ると、図4のような構造の突起
電極11が形成される。
After forming the bump electrodes 11, the resist layer is peeled off by a dedicated peeling liquid, and the exposed barrier layer 19 is removed by etching using the bump electrodes 11 as a mask, as shown in FIG. A protruding electrode 11 having a structure is formed.

【0040】図1から図3に戻って、さらに説明を続け
る。回路基板12上のボンディングパッド14の形成方
法は、一般にセラミック回路基板やガラスエポキシ回路
基板等、基材によっても異なるが、各種の形成方法が公
知であり、ここでは詳述しない。ボンディングパッド1
4の材質としてはCuが一般的であるが、ここではやはり
導電性樹脂13の導電フィラーとの接触抵抗を考慮し
て、Cuの上にNi、さらにAuをメッキした。回路基板12
上のボンディングパッド14は、当然のことながら半導
体チップ10の突起電極11に相対する位置に配置して
いる。
Returning to FIG. 1 to FIG. 3, the description will be further continued. The method of forming the bonding pad 14 on the circuit board 12 generally differs depending on the base material such as a ceramic circuit board or a glass epoxy circuit board, but various forming methods are known and will not be described in detail here. Bonding pad 1
Although Cu is generally used as the material of No. 4, Ni and Au are plated on Cu in consideration of the contact resistance of the conductive resin 13 with the conductive filler. Circuit board 12
As a matter of course, the upper bonding pad 14 is arranged at a position facing the protruding electrode 11 of the semiconductor chip 10.

【0041】また図3に示したように、半導体チップ1
0の突起電極11の先端には、突起電極11とボンディ
ングパッド14の接続部材である導電性樹脂13が、隣
接する突起電極11同士を短絡することのないように必
要最少量転写されている。
Further, as shown in FIG. 3, the semiconductor chip 1
A conductive resin 13, which is a connecting member between the bump electrode 11 and the bonding pad 14, is transferred to the tip of the bump electrode 11 of 0 in the minimum amount necessary so as not to short-circuit the adjacent bump electrodes 11.

【0042】図5を用いて導電性樹脂13の転写につい
て説明する。導電性樹脂13は、薄い皿状の容器20に
満たされ、満たされた導電性樹脂13の表面をスキージ
ーで平滑化した後に、前記容器20に半導体チップ10
を下降して、突起電極11の先端のみ満たされた導電性
樹脂13に接触することで転写される。導電性樹脂13
の転写量は、前記容器への半導体チップ10の降下量で
制御することが可能である。本実施例では、高さ40μ
mの突起電極11の先端10μmを導電性樹脂13に浸
して転写した。
Transfer of the conductive resin 13 will be described with reference to FIG. The conductive resin 13 is filled in a thin dish-shaped container 20, the surface of the filled conductive resin 13 is smoothed with a squeegee, and then the semiconductor chip 10 is placed in the container 20.
And is transferred to contact with the conductive resin 13 filled only in the tip of the bump electrode 11. Conductive resin 13
The transfer amount can be controlled by the amount of the semiconductor chip 10 dropped into the container. In this embodiment, the height is 40μ.
The tip 10 μm of the projection electrode 11 of m was immersed in the conductive resin 13 and transferred.

【0043】ここで、導電性樹脂13について説明す
る。本発明に用いた導電性樹脂13が求められる主たる
機能は、低い接続抵抗値で半導体チップ10の突起電極
11と回路基板12のボンディングパッド14の間の電
気的接続を得ることである。あくまでも接着力に関して
は、導電性樹脂13が前記突起電極11に転写されてか
ら半導体チップ10と回路基板12の間に封止樹脂が充
填され硬化するまで、導電性樹脂13に含有される導電
フィラーが、散乱または流出しないように凝集しておく
ことと半導体チップ10を回路基板12に仮固定する接
着剤の補助的な接着強度が得られればよい。
Now, the conductive resin 13 will be described. The main function required of the conductive resin 13 used in the present invention is to obtain an electrical connection between the protruding electrode 11 of the semiconductor chip 10 and the bonding pad 14 of the circuit board 12 with a low connection resistance value. As far as the adhesive force is concerned, the conductive filler contained in the conductive resin 13 from the transfer of the conductive resin 13 to the protruding electrodes 11 until the sealing resin is filled between the semiconductor chip 10 and the circuit board 12 and cured. However, it is only necessary to aggregate them so as not to scatter or flow out and to obtain the auxiliary adhesive strength of the adhesive for temporarily fixing the semiconductor chip 10 to the circuit board 12.

【0044】そこで本発明の実施例に用いた導電性樹脂
13は、接続抵抗を重視して、含有する導電フィラーの
重量比が95%となるように、加熱硬化性のエポキシ樹
脂と混練りした。導電性フィラーとして用いた金属粉
は、銀パラジウムを数μmの大きさの鱗片にしたもので
ある。前記導電性樹脂13の接着強度は約40kgf/cm2
で、導電性樹脂の接着性を重視した導電フィラーの重量
比が75%の導電性樹脂の接着強度約140kgf/cm2
対して、非常に弱くなっている。
Therefore, the conductive resin 13 used in the examples of the present invention was kneaded with a thermosetting epoxy resin so that the weight ratio of the conductive filler contained in the conductive resin 13 was 95% with an emphasis on connection resistance. . The metal powder used as the conductive filler is silver palladium in the form of scales having a size of several μm. The adhesive strength of the conductive resin 13 is about 40 kgf / cm 2
Thus, the adhesive strength of the conductive filler, which emphasizes the adhesiveness of the conductive resin, of 75% is very weak as compared with the adhesive strength of the conductive resin of about 140 kgf / cm 2 .

【0045】また接続抵抗に関しては、突起電極11先
端の接着部の直径がφ80μmの場合、導電フィラーの
重量比が75%の導電性樹脂では接続端子1カ所の接続
抵抗値は数百mΩ〜1Ωのオーダーとなってしまうが、
本発明の実施例で用いた導電性樹脂13の接続端子1カ
所の接続抵抗値は10〜50mΩである。
Regarding the connection resistance, when the diameter of the bonding portion at the tip of the bump electrode 11 is φ80 μm, the connection resistance value at one connection terminal is several hundreds mΩ to 1Ω in the case of the conductive resin in which the weight ratio of the conductive filler is 75%. It will be an order of
The connection resistance value at one place of the connection terminal of the conductive resin 13 used in the examples of the present invention is 10 to 50 mΩ.

【0046】次に図2と図3に示した接着剤15につい
て説明する。本発明の実施例で用いた接着剤15は、前
記導電性樹脂13中の導電フィラー成分を除く樹脂成分
と同一の樹脂から成り、導電性樹脂13のエポキシ樹脂
成分である。また、接着力を高めるために、当然のこと
ながら導電性フィラーは含まない。接着剤15は、半導
体チップ10の突起電極11の先端に転写した前記導電
性樹脂13を硬化させる際に、同時に硬化することで、
両者の加熱硬化工程を共通とすることができる。もちろ
ん、両者の硬化作業が別工程になることを前提に、さら
に接着力が強固で取り扱いが容易な別の成分の接着剤を
用いても構わない。
Next, the adhesive 15 shown in FIGS. 2 and 3 will be described. The adhesive 15 used in the examples of the present invention is made of the same resin component as the resin component except the conductive filler component in the conductive resin 13, and is an epoxy resin component of the conductive resin 13. Further, of course, in order to enhance the adhesive force, the conductive filler is not included. The adhesive 15 is simultaneously cured when the conductive resin 13 transferred to the tip of the protruding electrode 11 of the semiconductor chip 10 is cured,
Both heat curing processes can be made common. Of course, assuming that the curing work for both is a separate step, an adhesive having another component having a stronger adhesive force and being easy to handle may be used.

【0047】接着剤15の塗布位置は、回路基板12の
ボンディングパッド14を覆わぬように、しかも半導体
チップ10を回路基板12上に搭載したときに突起電極
11やボンディングパッド14に接着剤15が広がって
接触しないように、回路基板12のボンディングパッド
14どうしの距離が十分に広い箇所とする。また、接着
剤15の塗布位置に相対する半導体チップ10の素子形
成面には、図1に示すように突起電極11は設けられて
いない。
The application position of the adhesive 15 is such that the bonding pad 14 of the circuit board 12 is not covered, and when the semiconductor chip 10 is mounted on the circuit board 12, the adhesive 15 is applied to the protruding electrodes 11 and the bonding pads 14. The distance between the bonding pads 14 of the circuit board 12 is set sufficiently wide so as not to spread and make contact. In addition, as shown in FIG. 1, the protruding electrode 11 is not provided on the element formation surface of the semiconductor chip 10 facing the application position of the adhesive 15.

【0048】接着剤15の塗布量は、半導体チップ10
と回路基板12の固定に必要な接着強度が得られる量
で、しかも塗布した接着剤15の盛り上がり量が半導体
チップ10を回路基板12上に搭載したときの半導体チ
ップ10と回路基板12の間隙よりも大きい必要があ
る。
The amount of adhesive 15 applied is equal to that of the semiconductor chip 10.
And the amount of adhesive strength required for fixing the circuit board 12, and the amount of swelling of the applied adhesive 15 is larger than the gap between the semiconductor chip 10 and the circuit board 12 when the semiconductor chip 10 is mounted on the circuit board 12. Also needs to be big.

【0049】本発明の実施例の接着剤15の塗布量につ
いての説明を行う。まず、図4に示すように、突起電極
11の最大直径Dbはφ120μm、突起電極11の高
さhは40μm、ボンディングパッド14の大きさDP
は□130μm、そして半導体チップ10を回路基板1
2に搭載した後の半導体チップ10と回路基板12の間
隙Gは約45μmとしている。また、接着部の直径dは
φ80μmである。
The coating amount of the adhesive 15 according to the embodiment of the present invention will be described. First, as shown in FIG. 4, the maximum diameter D b of the bump electrode 11 is φ120 μm, the height h of the bump electrode 11 is 40 μm, and the size D P of the bonding pad 14 is D p.
Is 130 μm, and the semiconductor chip 10 is the circuit board 1
The gap G between the semiconductor chip 10 and the circuit board 12 after being mounted on No. 2 is about 45 μm. Further, the diameter d of the adhesive portion is φ80 μm.

【0050】我々の経験では、導電性フィラーの重量比
が75%の導電性樹脂を用いて、半導体チップを回路基
板に仮固定した場合、半導体チップと回路基板の間隙に
封止樹脂を充填して硬化し固定するまでの間の、半導体
チップの脱落や接続箇所の電気的接続のオープンは極め
て希である。148個の突起電極部で仮固定を行ったと
きの半導体チップの接着強度は、各突起電極当たりの接
着部の直径がφ80μmのとき約1036gfである。
In our experience, when a semiconductor chip is temporarily fixed to a circuit board using a conductive resin having a weight ratio of the conductive filler of 75%, the gap between the semiconductor chip and the circuit board is filled with the sealing resin. It is extremely rare for the semiconductor chip to drop off or the electrical connection to be opened at the connection point until it is cured and fixed. The adhesive strength of the semiconductor chip when temporarily fixed with 148 protruding electrode portions is about 1036 gf when the diameter of the adhesive portion per protruding electrode is φ80 μm.

【0051】一方、本発明の実施例に用いた導電性フィ
ラーの重量比が95%の接続抵抗を重視した導電性樹脂
を用いて、148個の突起電極部のみで仮固定を行う
と、その時の半導体チップの接着強度は、各突起電極当
たりの接着部の直径がφ80μmのとき約296gfで
ある。この場合は、半導体チップと回路基板の間隙に封
止樹脂を充填して硬化し固定するまでの間に、半導体チ
ップの脱落や接続箇所の電気的接続のオープンがたびた
び発生する。
On the other hand, when the conductive resin used in the examples of the present invention was used for the conductive resin in which the weight ratio of the conductive filler was 95% and the connection resistance was emphasized, temporary fixing was performed only with 148 protruding electrode portions. The adhesive strength of the semiconductor chip is about 296 gf when the diameter of the adhesive portion for each protruding electrode is φ80 μm. In this case, the semiconductor chip is often dropped or the electrical connection is opened at the connection point before the sealing resin is filled in the gap between the semiconductor chip and the circuit board, cured, and fixed.

【0052】そこで、本発明では導電性樹脂に含まれる
導電性フィラーの重量比の違いによる半導体チップ10
の仮固定の接着強度の差1036−296=740gf
を接着剤15の接着強度で補う。つまり、図2に示すよ
うに4カ所に接着剤15を塗布する場合、1カ所当たり
185gf以上の接着強度を要求される。本実施例で用
いた接着剤15の接着強度は約200kgf/cm2なので、
1カ所の接着部の直径がφ350μm以上あれば要求さ
れる接着強度が得られる。
In view of this, in the present invention, the semiconductor chip 10 having different weight ratios of the conductive filler contained in the conductive resin is used.
Difference in adhesive strength of temporary fixing of 1036-296 = 740 gf
Is supplemented with the adhesive strength of the adhesive 15. That is, when the adhesive 15 is applied to four places as shown in FIG. 2, an adhesive strength of 185 gf or more per one place is required. Since the adhesive strength of the adhesive 15 used in this example is about 200 kgf / cm 2 ,
The required adhesive strength can be obtained if the diameter of one bonded portion is 350 μm or more.

【0053】実際に、導電性樹脂13中の導電フィラー
成分を除く樹脂成分と同一の樹脂から成る接着剤15
を、回路基板12の表面を覆うレジスト層の上にマイク
ロディスペンサを用いて約3×10-3ml滴下すると、
粘性と濡れ性の関係から接着剤15は直径約600μ
m、盛り上がり高さが86μm程度になる。先に述べた
ように、半導体チップ10を回路基板12に搭載した後
の半導体チップ10と回路基板12の間隙hは約45μ
mであるから、接着剤15は図6に示すように半導体チ
ップ10に触れて、必要な接着強度が得られる接着部の
直径φ350μm以上が半導体チップ10と接着剤15
の接触部においても確保できる。
Actually, an adhesive 15 made of the same resin as the resin component except the conductive filler component in the conductive resin 13
Is dripped on the resist layer covering the surface of the circuit board 12 by using a microdispenser, and about 3 × 10 −3 ml is dropped,
Due to the relationship between viscosity and wettability, the adhesive 15 has a diameter of about 600μ.
m, and the rising height is about 86 μm. As described above, the gap h between the semiconductor chip 10 and the circuit board 12 after mounting the semiconductor chip 10 on the circuit board 12 is about 45 μm.
Therefore, the adhesive 15 touches the semiconductor chip 10 as shown in FIG. 6, and the diameter φ350 μm or more of the adhesive portion at which the necessary adhesive strength is obtained is the semiconductor chip 10 and the adhesive 15
It can also be secured at the contact part of.

【0054】また、図2の接着剤15の塗布位置におけ
る両側のボンディングパッド14の間隔は1470μm
あるので、接着剤15が半導体チップ10と回路基板1
2によって潰され広がっても、接着剤15両側のボンデ
ィングパッド14のほぼ中央に塗布されていれば、接着
剤15がボンディングパッド14や突起電極11に接触
して電気的導通を阻害することはない。
The spacing between the bonding pads 14 on both sides at the application position of the adhesive 15 in FIG. 2 is 1470 μm.
Since there is an adhesive 15, the semiconductor chip 10 and the circuit board 1
Even if it is crushed and spread by 2, the adhesive 15 does not contact the bonding pad 14 and the protruding electrode 11 and obstruct electric conduction as long as it is applied to substantially the center of the bonding pad 14 on both sides of the adhesive 15. .

【0055】このように半導体チップ10の突起電極1
1の配置と回路基板12のボンディングパッド14の配
置には、接着剤15を避けるために若干の制約が生じ
る。しかし、現実にはいくら半導体の多ピン化が求めら
れているとはいっても、半導体チップの素子形成面の全
面に微細なピッチ、例えばピッチ200μmで突起電極
を配置することはあり得ない。なぜならば、半導体チッ
プは形成された素子の個数に対して入出力端子の必要な
個数は非常に少なく、半導体チップの素子形成面の全面
に突起電極が必要になることはない。また、仮に半導体
チップの素子形成面の全面に微細なピッチで突起電極を
形成しても、回路基板側のパターニングの制約からボン
ディングパッドからの配線を引き出すことはできない。
Thus, the protruding electrode 1 of the semiconductor chip 10
The arrangement of 1 and the arrangement of the bonding pad 14 of the circuit board 12 have some restrictions in order to avoid the adhesive 15. However, in reality, no matter how many pins the semiconductor is required to have, it is impossible to arrange the protruding electrodes at a fine pitch, for example, a pitch of 200 μm, on the entire surface of the semiconductor chip on which the elements are formed. This is because the semiconductor chip requires a very small number of input / output terminals with respect to the number of formed elements, and the protruding electrodes are not required on the entire element forming surface of the semiconductor chip. Further, even if the protruding electrodes are formed on the entire surface of the element formation surface of the semiconductor chip with a fine pitch, the wiring from the bonding pad cannot be drawn out due to the restriction of patterning on the circuit board side.

【0056】そこで、本発明の実施例では、図1や図2
で示すような現実的な突起電極11とボンディングパッ
ド14の配置を示した。この配置でも半導体チップ10
の周辺部のみに突起電極やボンディングパッドを配置し
た場合に比べ、十分に接続端子数を増すことができ、先
に第2の従来例として示した半導体チップ中央部に封止
樹脂を盛り上げて塗布する場合より、極少量の接着剤1
5の塗布のために突起電極11やボンディングパッド1
4の配置の制約が少ないことから、現実的な要求範囲で
の半導体チップの多ピン化への対応が可能である。
Therefore, in the embodiment of the present invention, FIG.
The realistic arrangement of the protruding electrode 11 and the bonding pad 14 as shown in FIG. Even in this arrangement, the semiconductor chip 10
The number of connecting terminals can be sufficiently increased compared to the case where the protruding electrodes and the bonding pads are arranged only in the peripheral portion of the semiconductor chip. A small amount of adhesive 1
5 for applying the bump electrode 11 and the bonding pad 1
Since there are few restrictions on the arrangement of No. 4, it is possible to cope with the increase in the number of pins of the semiconductor chip within a realistic required range.

【0057】次に、突起電極11の先端に導電性樹脂1
3を転写して、回路基板12のボンディングパッド14
の間に接着剤15を塗布した図3の状態から、相対する
半導体チップ10の突起電極11と回路基板12のボン
ディングパッド14の位置をアライメント調整した後
に、図6のように半導体チップ10を回路基板12上に
搭載する。
Next, the conductive resin 1 is attached to the tip of the protruding electrode 11.
3 is transferred to the bonding pad 14 of the circuit board 12.
From the state of FIG. 3 in which the adhesive 15 is applied between the two, the positions of the protruding electrodes 11 of the semiconductor chip 10 and the bonding pads 14 of the circuit board 12 which face each other are aligned and then the semiconductor chip 10 is circuited as shown in FIG. It is mounted on the substrate 12.

【0058】さらに、半導体チップ10を回路基板12
上に搭載した図6の状態で、120℃30分の加熱を行
い、前記導電性樹脂13と前記接着剤15を同時に硬化
させる。この結果、半導体チップ10は回路基板12上
に仮固定されると同時に半導体チップ10の突起電極1
1と回路基板12のボンディングパッド14の間の電気
的接続が取れることになる。もちろん、これは導電性樹
脂13中の導電フィラー成分を除く樹脂成分と同一の樹
脂から成る接着剤15の場合であり、別の成分から成る
接着剤を用いた場合は、その接着剤の硬化条件に合わせ
て前記導電性樹脂13の硬化と別の硬化作業を行えばよ
い。
Further, the semiconductor chip 10 is connected to the circuit board 12
In the state of FIG. 6 mounted on the top, heating is performed at 120 ° C. for 30 minutes to simultaneously cure the conductive resin 13 and the adhesive 15. As a result, the semiconductor chip 10 is temporarily fixed on the circuit board 12 and at the same time the protruding electrodes 1 of the semiconductor chip 10 are
1 and the bonding pad 14 of the circuit board 12 can be electrically connected. Of course, this is the case of the adhesive 15 made of the same resin as the resin component excluding the conductive filler component in the conductive resin 13, and when an adhesive made of another component is used, the curing conditions of the adhesive are In accordance with the above, a hardening operation different from the hardening of the conductive resin 13 may be performed.

【0059】この時点で、回路基板12の側から半導体
チップ10の接続及び動作の電気的な検査を行い、もし
不良が発見された場合は半導体チップ10をリペアのた
めに取り外す。この時はまだ、半導体チップ10と回路
基板12の間隙には封止樹脂が充填されていないので、
半導体チップ10の取り外しにはさほど大きな力を必要
とせず、特に回路基板12やボンディングパッド14に
損傷を与えることはない。さらに、半導体チップ10の
取り外しの際に、前記導電性樹脂13と前記接着剤15
を加熱すると、取り外しの力は少なくて済む。
At this point, the connection and operation of the semiconductor chip 10 are electrically inspected from the side of the circuit board 12, and if a defect is found, the semiconductor chip 10 is removed for repair. At this time, since the gap between the semiconductor chip 10 and the circuit board 12 is not yet filled with the sealing resin,
The removal of the semiconductor chip 10 does not require so much force and does not particularly damage the circuit board 12 or the bonding pad 14. Further, when the semiconductor chip 10 is removed, the conductive resin 13 and the adhesive 15
When heated, the removal force is less.

【0060】回路基板12上に残された接着剤15は、
極少量である。鋭利な刃物などで削ぎ落とすことは容易
である。
The adhesive 15 left on the circuit board 12 is
Very small amount. It is easy to scrape off with a sharp blade.

【0061】前記の検査で良品と判断された場合は、図
7に示すように半導体チップ10と回路基板12の間隙
に封止樹脂16を充填し、封止樹脂16を硬化させて、
本実施例の半導体装置は完成する。封止樹脂16は、半
導体チップ10を回路基板12に完全に固定するほか
に、半導体チップ10の機械的な保護、半導体チップ1
0と回路基板12の熱膨張率の差から生じる応力の分
散、半導体装置全体の湿度からの保護、封止樹脂16の
硬化収縮による突起電極11とボンディングパッド14
の接続抵抗の降下等、半導体装置の信頼性を向上させる
様々な働きがある。
If the above inspection determines that the product is non-defective, the gap between the semiconductor chip 10 and the circuit board 12 is filled with the sealing resin 16 and the sealing resin 16 is cured, as shown in FIG.
The semiconductor device of this embodiment is completed. The sealing resin 16 not only completely fixes the semiconductor chip 10 to the circuit board 12, but also mechanically protects the semiconductor chip 10 and the semiconductor chip 1.
0, the stress caused by the difference in the coefficient of thermal expansion between the circuit board 12 and the circuit board 12 is protected, the entire semiconductor device is protected from humidity, and the protruding electrode 11 and the bonding pad 14 are caused by the curing and shrinkage of the sealing resin 16.
There are various functions to improve the reliability of the semiconductor device, such as a decrease in the connection resistance of the semiconductor device.

【0062】次に半導体チップ30にダミーの突起電極
37を設けた場合の第2の実施例の構造について、図8
から図11を用いて本発明の実施例における半導体装置
の構成を説明する。図8は半導体装置を構成する半導体
チップ30を素子形成面から見た図である。また、図9
は半導体装置を構成する回路基板32を、半導体チップ
30を搭載する面から見た図である。図10は、半導体
チップ30を回路基板32に搭載する直前の状態の半導
体チップ30と回路基板32の断面を示している。
Next, the structure of the second embodiment in which the dummy protruding electrode 37 is provided on the semiconductor chip 30 is shown in FIG.
The configuration of the semiconductor device according to the embodiment of the present invention will be described with reference to FIGS. FIG. 8 is a view of the semiconductor chip 30 forming the semiconductor device as seen from the element formation surface. In addition, FIG.
FIG. 3 is a view of a circuit board 32 constituting a semiconductor device as seen from a surface on which a semiconductor chip 30 is mounted. FIG. 10 shows a cross section of the semiconductor chip 30 and the circuit board 32 immediately before the semiconductor chip 30 is mounted on the circuit board 32.

【0063】半導体チップ30の素子形成面には突起電
極31とダミーの突起電極37が複数形成されている。
半導体チップ30は1辺が5.4mmの正方形で厚みが
0.625mmの大きさで、間隔が200μmの突起電
極31を図8のように148個配置した。ダミーの突起
電極37は、前記突起電極31と等間隔になるように9
個配置した。
A plurality of protruding electrodes 31 and a plurality of dummy protruding electrodes 37 are formed on the element forming surface of the semiconductor chip 30.
The semiconductor chip 30 has a square shape with a side of 5.4 mm, a thickness of 0.625 mm, and 148 projecting electrodes 31 with an interval of 200 μm arranged as shown in FIG. The dummy protruding electrodes 37 are arranged at equal intervals with the protruding electrodes 31.
I arranged them individually.

【0064】突起電極31は半導体チップ30の入出力
端子上に形成されているが、ダミーの突起電極37は半
導体チップ30のダミーの入出力端子上または半導体チ
ップ30の保護膜上のいずれの上に形成されていても構
わない。突起電極31およびダミーの突起電極37の詳
細の構造は、先の図4と同じである。本実施例では、突
起電極31を最大直径120μm、高さ40μmに形成
して、ダミーの突起電極37を最大直径300μm、高
さ40μmに形成した。
Although the protruding electrode 31 is formed on the input / output terminal of the semiconductor chip 30, the dummy protruding electrode 37 is formed on the dummy input / output terminal of the semiconductor chip 30 or on the protective film of the semiconductor chip 30. It may be formed on. The detailed structures of the bump electrode 31 and the dummy bump electrode 37 are the same as those shown in FIG. In this embodiment, the bump electrode 31 is formed with a maximum diameter of 120 μm and a height of 40 μm, and the dummy bump electrode 37 is formed with a maximum diameter of 300 μm and a height of 40 μm.

【0065】半導体チップ30の突起電極31の先端に
は、突起電極31とボンディングパッド34の接続部材
である導電性樹脂33が、隣接する突起電極31同士を
短絡することのないように必要最少量転写されている。
At the tip of the protruding electrode 31 of the semiconductor chip 30, a minimum amount of conductive resin 33, which is a connecting member between the protruding electrode 31 and the bonding pad 34, is formed so as not to short-circuit adjacent protruding electrodes 31. It has been transcribed.

【0066】図12を用いて導電性樹脂33の転写につ
いて説明する。導電性樹脂33は、薄い皿状の容器38
に満たされ、満たされた導電性樹脂33の表面をスキー
ジーで平滑化した後に、前記容器に半導体チップ30を
下降して、突起電極31の先端のみ満たされた導電性樹
脂33に接触することで転写される。導電性樹脂33の
転写量は、前記容器への半導体チップ30の降下量で制
御することが可能である。本実施例では、高さ40μm
の突起電極31の先端10μmを導電性樹脂33に浸し
て転写した。
Transfer of the conductive resin 33 will be described with reference to FIG. The conductive resin 33 is a thin dish-shaped container 38.
After smoothing the surface of the filled conductive resin 33 with a squeegee, the semiconductor chip 30 is lowered into the container to contact the filled conductive resin 33 only at the tip of the protruding electrode 31. Transcribed. The transfer amount of the conductive resin 33 can be controlled by the amount of the semiconductor chip 30 dropped into the container. In this embodiment, the height is 40 μm
The tip 10 μm of the protruding electrode 31 was dipped in the conductive resin 33 and transferred.

【0067】ただし、ダミーの突起電極37の先端には
前記導電性樹脂33を転写しない。図12のように前記
容器38のダミーの突起電極37に相対する位置に凹部
を設けることでダミーの突起電極37の先端に導電性樹
脂33が転写されることを避けた。
However, the conductive resin 33 is not transferred to the tip of the dummy protruding electrode 37. As shown in FIG. 12, the concave portion is provided at a position facing the dummy protruding electrode 37 of the container 38 to prevent the conductive resin 33 from being transferred to the tip of the dummy protruding electrode 37.

【0068】導電性樹脂33については、低い接続抵抗
を得られるように銀パラジウムの鱗片から成る導電フィ
ラーの重量比95%のものを用いている。その根拠につ
いては、第1の実施例に述べたとおりである。
As the conductive resin 33, a conductive filler made of silver palladium scale having a weight ratio of 95% is used so as to obtain a low connection resistance. The grounds for this are as described in the first embodiment.

【0069】一方、前記半導体チップ30のダミーの突
起電極37に相対する回路基板32の位置には、接着剤
35が回路基板32のボンディングパッド34覆わぬよ
うに、しかも半導体チップ30を回路基板32上に搭載
したときに突起電極31やボンディングパッド34に接
着剤35が広がって接触しないように、極少量塗布す
る。
On the other hand, at the position of the circuit board 32 facing the dummy protruding electrode 37 of the semiconductor chip 30, the adhesive 35 does not cover the bonding pad 34 of the circuit board 32, and the semiconductor chip 30 is mounted on the circuit board 32. The adhesive 35 is applied in an extremely small amount so that the adhesive 35 does not spread and contact the protruding electrode 31 and the bonding pad 34 when mounted on the top.

【0070】本実施例では、第1の実施例と同じ前記導
電性樹脂33中の導電フィラー成分を除く樹脂成分と同
一の樹脂から成る接着剤35を用いたが、さらに接着力
が強固で取り扱いが容易な別の成分の接着剤を用いても
構わないことも、第1の実施例と同様である。
In this embodiment, the adhesive 35 made of the same resin as the resin component excluding the conductive filler component in the conductive resin 33, which is the same as in the first embodiment, is used. It is also the same as in the first embodiment that an adhesive having another component that is easy to use may be used.

【0071】さて、接着剤35に求められる接着強度
は、第1の実施例と同様に約740gf以上必要であ
り、ダミーの突起電極37の1個当たりの接着強度にす
ると約82gf以上が必要となる。本実施例で用いた接
着剤35の接着強度は約200kgf/cm2なので、1カ所
の接着部の直径がφ230μm以上あれば要求される接
着強度が得られる。先に述べたようにダミーの突起電極
37の最大直径は300μmであるから、ダミーの突起
電極37と回路基板32の間の接着面積は十分に確保で
きる。
The adhesive strength required for the adhesive 35 is about 740 gf or more as in the first embodiment, and about 82 gf or more is required for the adhesive strength of each dummy protruding electrode 37. Become. Since the adhesive strength of the adhesive 35 used in the present embodiment is about 200 kgf / cm 2 , the required adhesive strength can be obtained if the diameter of one adhesive part is 230 μm or more. As described above, since the maximum diameter of the dummy bump electrode 37 is 300 μm, the bonding area between the dummy bump electrode 37 and the circuit board 32 can be sufficiently secured.

【0072】このときに、半導体チップ30を回路基板
32に搭載した後の半導体チップ30と回路基板32の
間隙を約45μmであり、ダミーの突起電極37の高さ
が40μmであることから、ダミーの突起電極37の先
端から回路基板32の面までの距離は約5μmである。
つまり、回路基板32のダミーの突起電極37に相対す
る位置に塗布された接着剤35は、第1の実施例に対し
てさらに少量でよいことは明白である。
At this time, since the gap between the semiconductor chip 30 and the circuit board 32 after mounting the semiconductor chip 30 on the circuit board 32 is about 45 μm, and the height of the dummy protruding electrode 37 is 40 μm, the dummy The distance from the tip of the protruding electrode 37 to the surface of the circuit board 32 is about 5 μm.
That is, it is clear that the adhesive 35 applied to the position of the circuit board 32 facing the dummy protruding electrode 37 may be smaller than that of the first embodiment.

【0073】このように接着剤35が極少量であること
とダミーの突起電極37の先端から回路基板32の面ま
での距離が短いことから、図11のように半導体チップ
30を回路基板32に搭載した後の前記接着剤35の広
がりを少なく抑えることができ、周囲の突起電極31や
ボンディングパッド34との距離を短く設計することが
できる。このことは、半導体チップ30の突起電極31
の配置位置の制約を緩和することができることを示して
いる。
Since the adhesive 35 is extremely small and the distance from the tip of the dummy protruding electrode 37 to the surface of the circuit board 32 is short, the semiconductor chip 30 is mounted on the circuit board 32 as shown in FIG. The spread of the adhesive 35 after mounting can be suppressed to be small, and the distance to the surrounding protruding electrodes 31 and the bonding pads 34 can be designed to be short. This means that the protruding electrode 31 of the semiconductor chip 30 is
It is shown that the restriction on the arrangement position of can be relaxed.

【0074】ここで接着剤35を硬化させた後、回路基
板32の側から半導体チップ30の接続及び動作の電気
的な検査を行い、もし不良が発見された場合は半導体チ
ップ30をリペアのために取り外す。この時はまだ、半
導体チップ30と回路基板32の間隙には封止樹脂が充
填されていないので、半導体チップ30の取り外しには
さほど大きな力を必要とせず、特に回路基板32やボン
ディングパッド34に損傷を与えることはない。さら
に、半導体チップ30の取り外しの際に、前記導電性樹
脂33と前記接着剤35を加熱すると、取り外しの力は
少なくて済む。
Here, after the adhesive 35 is cured, an electrical inspection of the connection and operation of the semiconductor chip 30 is performed from the side of the circuit board 32. If a defect is found, the semiconductor chip 30 is repaired. To remove. At this time, since the gap between the semiconductor chip 30 and the circuit board 32 is not filled with the sealing resin, a great force is not required to remove the semiconductor chip 30, and especially the circuit board 32 and the bonding pad 34 are not removed. No damage will occur. Further, when the conductive resin 33 and the adhesive 35 are heated at the time of removing the semiconductor chip 30, the removing force is small.

【0075】前記の検査で良品と判断された場合は、図
13に示すように半導体チップ30と回路基板32の間
隙に封止樹脂36を充填し、封止樹脂36を硬化させ
て、本実施例の半導体装置は完成する。封止樹脂36
は、半導体チップ30を回路基板32に完全に固定する
ほかに、半導体チップ30の機械的な保護、半導体チッ
プ30と回路基板32の熱膨張率の差から生じる応力の
分散、半導体装置全体の湿度からの保護、封止樹脂36
の硬化収縮による突起電極31とボンディングパッド3
4の接続抵抗の降下等、半導体装置の信頼性を向上させ
る様々な働きがある。
When it is judged as a non-defective product in the above-mentioned inspection, as shown in FIG. 13, the sealing resin 36 is filled in the gap between the semiconductor chip 30 and the circuit board 32, and the sealing resin 36 is hardened. The example semiconductor device is completed. Sealing resin 36
In addition to completely fixing the semiconductor chip 30 to the circuit board 32, the mechanical protection of the semiconductor chip 30, the dispersion of stress caused by the difference in the coefficient of thermal expansion between the semiconductor chip 30 and the circuit board 32, and the humidity of the entire semiconductor device Protection from resin, sealing resin 36
Electrode 31 and bonding pad 3 due to hardening and shrinkage of
4 has various functions such as a decrease in connection resistance, which improves the reliability of the semiconductor device.

【0076】[0076]

【発明の効果】以上の説明で明らかなように、本発明に
おいては、半導体チップに形成された突起電極と回路基
板のボンディングパッドの間の接続部材として、導電フ
ィラーの金属粉を重量比で90〜95%含有する導電性
樹脂を用いているために、低い接続抵抗値で半導体チッ
プの突起電極と回路基板のボンディングパッドの間の電
気的接続が取れる。
As is apparent from the above description, in the present invention, as a connecting member between the protruding electrode formed on the semiconductor chip and the bonding pad of the circuit board, the metal powder of the conductive filler is used in a weight ratio of 90. Since the conductive resin containing ˜95% is used, the electrical connection between the protruding electrode of the semiconductor chip and the bonding pad of the circuit board can be achieved with a low connection resistance value.

【0077】さらに、半導体チップと回路基板の電気的
接続に寄与する突起電極以外の半導体チップと回路基板
が対向する領域の一部で、前記半導体チップと前記回路
基板が、前記導電性樹脂中の導電フィラー成分を除く樹
脂成分と同一の樹脂であり、前記接着剤には前記導電性
フィラーを含まない接着剤によって固定されているの
で、封止樹脂充填前の半導体チップの仮固定の接着強度
は十分に得られ、工程中の半導体チップの脱落や何れか
の接続箇所のオープンが発生する確率が低く、歩留まり
を確保できるとともに作業性に優れるとともに、半導体
チップの突起電極を除く領域の一部で固定すればよいの
で、半導体チップの突起電極配置を著しく制約すること
はない。
Further, in a part of the region where the semiconductor chip and the circuit board are opposed to each other, except for the protruding electrodes that contribute to the electrical connection between the semiconductor chip and the circuit board, the semiconductor chip and the circuit board are formed in the conductive resin. It is the same resin as the resin component excluding the conductive filler component, and since the adhesive is fixed by the adhesive that does not contain the conductive filler, the adhesive strength of the temporary fixing of the semiconductor chip before sealing resin filling is Sufficiently obtained, the probability that the semiconductor chip will drop out during the process or open at any connection point will be low, the yield can be secured and the workability is excellent, and it will be possible in a part of the area excluding the protruding electrodes of the semiconductor chip. Since it may be fixed, the arrangement of the protruding electrodes on the semiconductor chip is not significantly restricted.

【0078】半導体チップの突起電極と回路基板のボン
ディングパッドの間は、すでに導電性樹脂によって接続
されているので、封止樹脂充填前に回路基板の側から半
導体チップの接続及び動作の電気的な検査が可能とな
る。ここで、もし不良が発見され半導体チップをリペア
のために取り外すことになっても、封止樹脂による半導
体チップと回路基板の間隙全域の接着固定ではなく、半
導体チップと回路基板が対向する領域の一部での接着剤
による固定のため、容易に半導体チップを取り外すこと
ができる。また、回路基板上に残される接着剤は極わず
かであり、これらを取り除くことも容易である。
Since the protruding electrode of the semiconductor chip and the bonding pad of the circuit board are already connected by the conductive resin, the semiconductor chip is electrically connected and operated electrically from the circuit board side before filling the sealing resin. Inspection is possible. Here, even if a defect is found and the semiconductor chip is to be removed for repair, it is not adhesively fixed in the entire gap between the semiconductor chip and the circuit board by the sealing resin, but in the area where the semiconductor chip and the circuit board face each other. Since the adhesive is partially fixed, the semiconductor chip can be easily removed. Further, the adhesives left on the circuit board are very small, and it is easy to remove them.

【0079】次に、前記接着剤を前記導電性樹脂中の導
電フィラー成分を除く樹脂成分と同一の樹脂とすれば、
接着剤と導電性樹脂の硬化条件が同一になることから、
同時に両者を硬化することで、工程を少なくすることが
できる。
Next, if the adhesive is the same resin component as the resin component excluding the conductive filler component in the conductive resin,
Since the curing conditions for the adhesive and the conductive resin are the same,
By curing both at the same time, the number of steps can be reduced.

【0080】また、本発明の半導体装置は、半導体チッ
プに半導体チップと回路基板の電気的接続に寄与する突
起電極と電気的接続に寄与しないダミーの突起電極とを
設け、前記ダミーの突起電極と回路基板の間を接着剤で
固定することにより、接着剤の塗布量を極少量にするこ
とができ、接着剤が広がることを避けることができるた
め、半導体チップに形成する突起電極配置の制約をさら
に少なくすることができる。
Further, in the semiconductor device of the present invention, the semiconductor chip is provided with the protruding electrode that contributes to the electrical connection between the semiconductor chip and the circuit board and the dummy protruding electrode that does not contribute to the electrical connection. By fixing the circuit boards with an adhesive, the amount of adhesive applied can be minimized and the spread of the adhesive can be avoided. It can be further reduced.

【0081】このようにして、封止樹脂充填前の半導体
チップの仮固定強度を維持しつつ、接続抵抗を低くする
とともに、突起電極配置の制約を少なくして、リペアも
容易な半導体装置の構成を得られ、半導体装置の高速化
や多ピン化に対応しつつ、導電性樹脂を接続部材として
用いたフリップチップ実装の適応範囲をセラミック回路
基板やガラスエポキシ回路基板まで広げることができ
る。
In this way, while maintaining the temporary fixing strength of the semiconductor chip before filling the encapsulating resin, the connection resistance is lowered, the restrictions on the arrangement of the protruding electrodes are reduced, and the semiconductor device is easy to repair. Thus, it is possible to extend the applicable range of flip-chip mounting using a conductive resin as a connecting member to a ceramic circuit board or a glass epoxy circuit board while responding to high speed and high pin count of a semiconductor device.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例における半導体装置を構
成する半導体チップ10を素子形成面から見た平面図で
ある。
FIG. 1 is a plan view of a semiconductor chip 10 constituting a semiconductor device according to a first exemplary embodiment of the present invention, as viewed from an element formation surface.

【図2】本発明の第1の実施例における半導体装置を構
成する回路基板12を、半導体チップ10を搭載する面
から見た平面図である。
FIG. 2 is a plan view of the circuit board 12 constituting the semiconductor device according to the first embodiment of the present invention, as viewed from the surface on which the semiconductor chip 10 is mounted.

【図3】本発明の第1の実施例における半導体装置を構
成する半導体チップ10を回路基板12に搭載する直前
の状態の半導体チップ10と回路基板12の断面図であ
る。
FIG. 3 is a cross-sectional view of the semiconductor chip 10 and the circuit board 12 in a state immediately before mounting the semiconductor chip 10 constituting the semiconductor device according to the first embodiment of the present invention on the circuit board 12.

【図4】本発明の第1の実施例における半導体装置を構
成する半導体チップ10の突起電極11の構造を示す断
面図である。
FIG. 4 is a cross-sectional view showing a structure of a bump electrode 11 of a semiconductor chip 10 which constitutes a semiconductor device according to a first embodiment of the present invention.

【図5】本発明の第1の実施例における半導体装置を構
成する半導体チップ10の突起電極11に導電性樹脂1
3を転写する方法を示す断面図である。
FIG. 5 is a plan view of the semiconductor device according to the first embodiment of the present invention.
3 is a cross-sectional view showing a method for transferring No.

【図6】本発明の第1の実施例における半導体装置を構
成する半導体チップ10を回路基板12に搭載した直後
の状態の半導体チップ10と回路基板12の断面図であ
る。
FIG. 6 is a cross-sectional view of the semiconductor chip 10 and the circuit board 12 immediately after the semiconductor chip 10 constituting the semiconductor device according to the first embodiment of the present invention is mounted on the circuit board 12.

【図7】本発明の第1の実施例における半導体装置に封
止樹脂16を充填した後の完成状態を示す断面図であ
る。
FIG. 7 is a cross-sectional view showing a completed state after the semiconductor device according to the first embodiment of the present invention is filled with the sealing resin 16.

【図8】本発明の第2の実施例における半導体装置を構
成する半導体チップ30を素子形成面から見た平面図で
ある。
FIG. 8 is a plan view of a semiconductor chip 30 forming a semiconductor device according to a second embodiment of the present invention, as viewed from an element formation surface.

【図9】本発明の第2の実施例における半導体装置を構
成する回路基板32を、半導体チップ30を搭載する面
から見た平面図である。
FIG. 9 is a plan view of a circuit board 32 constituting a semiconductor device according to a second embodiment of the present invention, as viewed from a surface on which a semiconductor chip 30 is mounted.

【図10】本発明の第2の実施例における半導体装置を
構成する半導体チップ30を回路基板32に搭載する直
前の状態の半導体チップ30と回路基板32の断面図で
ある。
FIG. 10 is a sectional view of the semiconductor chip 30 and the circuit board 32 in a state immediately before mounting the semiconductor chip 30 constituting the semiconductor device according to the second embodiment of the present invention on the circuit board 32.

【図11】本発明の第2の実施例における半導体装置を
構成する半導体チップ30を回路基板32に搭載した直
後の状態の半導体チップ30と回路基板32の断面図で
ある。
FIG. 11 is a cross-sectional view of the semiconductor chip 30 and the circuit board 32 immediately after the semiconductor chip 30 constituting the semiconductor device according to the second embodiment of the present invention is mounted on the circuit board 32.

【図12】本発明の第2の実施例における半導体装置を
構成する半導体チップ30の突起電極31に導電性樹脂
33を転写する方法を示す断面図である。
FIG. 12 is a cross-sectional view showing a method of transferring a conductive resin 33 to the protruding electrodes 31 of the semiconductor chip 30 which constitutes the semiconductor device according to the second embodiment of the present invention.

【図13】本発明の第2の実施例における半導体装置に
封止樹脂36を充填した後の完成状態を示す断面図であ
る。
FIG. 13 is a cross-sectional view showing a completed state of the semiconductor device according to the second embodiment of the present invention after being filled with a sealing resin 36.

【図14】第1の従来例における半導体装置を構成する
半導体チップ40を素子形成面から見た平面図である。
FIG. 14 is a plan view of a semiconductor chip 40 forming a semiconductor device according to a first conventional example as viewed from an element formation surface.

【図15】第1の従来例における半導体装置を構成する
回路基板42を、半導体チップ40を搭載する面から見
た平面図である。
FIG. 15 is a plan view of a circuit board 42 constituting a semiconductor device according to a first conventional example, as viewed from a surface on which a semiconductor chip 40 is mounted.

【図16】第1の従来例における半導体装置を構成する
半導体チップ40を回路基板42に搭載する直前の状態
の半導体チップ40と回路基板42の断面図である。
FIG. 16 is a cross-sectional view of the semiconductor chip 40 and the circuit board 42 in a state immediately before mounting the semiconductor chip 40 constituting the semiconductor device in the first conventional example on the circuit board 42.

【図17】第1の従来例における半導体装置を構成する
半導体チップ40を回路基板42に搭載した直後の状態
の半導体チップ40と回路基板42の断面図である。
FIG. 17 is a cross-sectional view of the semiconductor chip 40 and the circuit board 42 immediately after the semiconductor chip 40 constituting the semiconductor device according to the first conventional example is mounted on the circuit board 42.

【図18】第1の従来例におけるおける半導体装置に封
止樹脂45を充填した後の完成状態を示す断面図であ
る。
FIG. 18 is a cross-sectional view showing a completed state after the semiconductor device in the first conventional example is filled with the sealing resin 45.

【図19】第2の従来例における半導体装置を構成する
半導体チップ50を素子形成面から見た平面図である。
FIG. 19 is a plan view of a semiconductor chip 50 forming a semiconductor device according to a second conventional example, as viewed from an element formation surface.

【図20】第2の従来例における半導体装置を構成する
回路基板52を、半導体チップ50を搭載する面から見
た平面図である。
FIG. 20 is a plan view of a circuit board 52 constituting a semiconductor device according to a second conventional example, as viewed from the surface on which a semiconductor chip 50 is mounted.

【図21】第2の従来例における半導体装置を構成する
半導体チップ50を回路基板52に搭載する直前の状態
の半導体チップ50と回路基板52の断面図である。
FIG. 21 is a cross-sectional view of the semiconductor chip 50 and the circuit board 52 immediately before mounting the semiconductor chip 50 constituting the semiconductor device in the second conventional example on the circuit board 52.

【図22】第2の従来例におけるおける半導体装置の完
成状態を示す断面図である。
FIG. 22 is a cross-sectional view showing a completed state of a semiconductor device in a second conventional example.

【符号の説明】[Explanation of symbols]

10 半導体チップ 11 突起電極 12 回路基板 13 導電性樹脂 14 ボンディングパッド 15 接着剤 16 封止樹脂 30 半導体チップ 31 突起電極 32 回路基板 33 導電性樹脂 34 ボンディングパッド 35 接着剤 36 封止樹脂 37 ダミーの突起電極 10 Semiconductor Chip 11 Projection Electrode 12 Circuit Board 13 Conductive Resin 14 Bonding Pad 15 Adhesive 16 Sealing Resin 30 Semiconductor Chip 31 Projection Electrode 32 Circuit Board 33 Conductive Resin 34 Bonding Pad 35 Adhesive 36 Sealing Resin 37 Dummy Projection electrode

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体チップに形成された突起電極と回
路基板のボンディングパッドの間の接続部材として、導
電フィラーの金属粉を重量比で90〜95%含有する導
電性樹脂を用い、前記半導体チップを前記回路基板にフ
リップチップ実装した半導体装置であつて、半導体チッ
プと回路基板の電気的接続に寄与する突起電極以外の半
導体チップと回路基板が対向する領域の一部で、前記半
導体チップと前記回路基板が接着剤によって固定すると
ともに、前記半導体チップと前記回路基板の間隙を封止
樹脂で充填されていることを特徴とする半導体装置。
1. A conductive resin containing 90 to 95% by weight of a metal powder of a conductive filler is used as a connecting member between a protruding electrode formed on a semiconductor chip and a bonding pad of a circuit board. A semiconductor device flip-chip mounted on the circuit board, wherein the semiconductor chip and the semiconductor chip are part of a region where the semiconductor chip and the circuit board are opposed to each other except for the protruding electrodes that contribute to electrical connection between the semiconductor chip and the circuit board. A semiconductor device, wherein the circuit board is fixed by an adhesive, and a gap between the semiconductor chip and the circuit board is filled with a sealing resin.
【請求項2】 接着剤が前記導電性樹脂中の導電フィラ
ー成分を除く樹脂成分と同一の樹脂であり、前記接着剤
には前記導電性フィラーを含まないことを特徴とする請
求項1記載の半導体装置。
2. The adhesive is the same resin component as the resin component excluding the conductive filler component in the conductive resin, and the adhesive does not contain the conductive filler. Semiconductor device.
【請求項3】 半導体チップに半導体チップと回路基板
の電気的接続に寄与する突起電極と電気的接続に寄与し
ないダミーの突起電極とを設け、前記ダミーの突起電極
と回路基板の間を接着剤で固定したことを特徴とする請
求項1又は2記載の半導体装置。
3. A semiconductor chip is provided with a protruding electrode that contributes to electrical connection between the semiconductor chip and the circuit board and a dummy protruding electrode that does not contribute to electrical connection, and an adhesive is provided between the dummy protruding electrode and the circuit board. 3. The semiconductor device according to claim 1 or 2, wherein the semiconductor device is fixed by.
JP5530595A 1995-03-15 1995-03-15 Semiconductor device Pending JPH08250543A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5530595A JPH08250543A (en) 1995-03-15 1995-03-15 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5530595A JPH08250543A (en) 1995-03-15 1995-03-15 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH08250543A true JPH08250543A (en) 1996-09-27

Family

ID=12994865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5530595A Pending JPH08250543A (en) 1995-03-15 1995-03-15 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH08250543A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001298052A (en) * 2000-02-09 2001-10-26 Interuniv Micro Electronica Centrum Vzw Method for flip-chip assembly of semiconductor device using adhesive
JP2008141169A (en) * 2007-10-02 2008-06-19 Hitachi Chem Co Ltd Film adhesive for circuit connection

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001298052A (en) * 2000-02-09 2001-10-26 Interuniv Micro Electronica Centrum Vzw Method for flip-chip assembly of semiconductor device using adhesive
EP1126517A3 (en) * 2000-02-09 2002-06-05 Interuniversitair Micro-Elektronica Centrum Method for flip-chip assembly of semiconductor devices using adhesives
JP2008141169A (en) * 2007-10-02 2008-06-19 Hitachi Chem Co Ltd Film adhesive for circuit connection
JP4725568B2 (en) * 2007-10-02 2011-07-13 日立化成工業株式会社 Film adhesive for circuit connection

Similar Documents

Publication Publication Date Title
US6118179A (en) Semiconductor component with external contact polymer support member and method of fabrication
JP3554695B2 (en) Method of manufacturing solder interconnect in a semiconductor integrated circuit and method of manufacturing a semiconductor integrated circuit
JP4534062B2 (en) Semiconductor device
KR100290993B1 (en) Semiconductor device, wiring board for mounting semiconductor and method of production of semiconductor device
US5739053A (en) Process for bonding a semiconductor to a circuit substrate including a solder bump transferring step
KR100385766B1 (en) Semiconductor device having resin members provided separately corresponding to externally connecting electrodes
KR100430203B1 (en) Semiconductor device and manufacturing method of the same
JP2003152002A (en) Electronic device, method for sealing the same and method for connecting the same
US20050148165A1 (en) Conductive pattern producing method and its applications
JPH08236654A (en) Chip carrier and manufacture thereof
WO1999036957A1 (en) Semiconductor package
KR100393363B1 (en) Semiconductor device and manufacturing method of the same
JPS60262430A (en) Manufacture of semiconductor device
JP3451987B2 (en) Functional element, substrate for mounting functional element, and method of connecting them
JP3501360B2 (en) Polymer reinforced column grid array
KR20010051328A (en) Semiconductor device
JPH05218137A (en) Manufacture of semiconductor device
JP3116926B2 (en) Package structure and semiconductor device, package manufacturing method, and semiconductor device manufacturing method
JP2755696B2 (en) Semiconductor device and manufacturing method thereof
KR20140115111A (en) Method Of Forming Bump And Semiconductor device including The Same
JPH0521519A (en) Semiconductor device
JPH08250543A (en) Semiconductor device
JP6123836B2 (en) Manufacturing method of semiconductor device
JPH07183646A (en) Wiring board and mounting method using it
KR100343454B1 (en) Wafer level package