JPH08236506A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE: To eliminate the need for the application of advanced lithography for a fine processing not always and form with simple configuration in the case where a fine processing of a semiconductor device is required or more particularly when the minimum dimension of a semiconductor integrated circuit pattern intended for work is shorter than the wavelength of light employed for photolithography. CONSTITUTION: In a manufacturing method of a semiconductor device having a process which forms a patterned resist 3 on a substrate 2 to be processed (such as an insulation film) and works the substrate with the resist 3 as a mask, a gas system is employed for the deposition wherein a deposit is attached on the resist while no deposit is attached on the substrate.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device. The present invention can be applied in the fields of various semiconductor devices.

[0002]

2. Description of the Related Art In the field of semiconductor devices,
The miniaturization and integration are progressing more and more. By the way, it is said that the photolithography technology, which has supported such high integration of semiconductor devices, is about to turn. This is because the minimum size of the semiconductor integrated circuit pattern to be processed has become approximately the same as the wavelength of light used in the photolithography technology that has been widely used in the industry.

On the other hand, the minimum size of a semiconductor integrated circuit pattern is miniaturized to 1.3 μm for 1 MDRAM and 0.8 μm for 4 MDRAM, as typified by DRAM, which is a measure of high integration. 0.5 μm, which is about the same as the wavelength of further,
64M DRAM requires a size of 0.4 μm or less,
It is expected to be similar to the wavelength of i-line.

As described above, the trend toward miniaturization is urgent, and technical innovation is also required in the lithography technology for realizing this. However, in the conventional optical lithography technique, it is the actual situation that processing of a dimension shorter than the above-mentioned exposure wavelength has not been industrially experienced. Therefore, as long as the wavelength of the exposure light for transfer is the g-line or i-line, which is the bright line of the conventional mercury lamp, some new image forming technique must be used in order to achieve further miniaturization. On the other hand, if a transfer wavelength shorter than the pattern size is used as in the conventional case,
We must consider using shorter wavelengths such as excimer lasers. Further, as compared with the shortening of the wavelength, the trend toward miniaturization of the minimum size of the semiconductor integrated circuit pattern is steeper, and thus there is a high possibility that the shortening of the wavelength for each generation will be required.

The problem of the prior art will be described in more detail with reference to FIGS. 4 and 5 as follows.

Referring to FIG. In the conventional example, on the silicon wafer or the like which is the semiconductor substrate 1, as the insulating film layer 2 which is the base to be processed, for example, silicon dioxide (SiO ₂ )
To form. In order to form a contact hole for electrically connecting to the wiring, a resist 3 is formed in a pattern on the upper portion of the contact hole by a lithography method, and the opening 4 is formed using the resist 3.
Is performed. This gives the structure of FIG.

After that, anisotropic etching is performed using, for example, an RIE apparatus to form the contact holes 5 (FIG. 5).

In this case, the diameter of the contact hole 5 is
It depends on the diameter of the resist opening 4. Therefore, in order to form the finer contact hole 5, it is necessary to use a more advanced lithography technique to reduce the diameter of the opening 4.

[0009]

As described above, in order to realize finer processing, more advanced lithography technology may be used, but it is not easy to improve such lithography technology. .

The present invention has been made in view of such circumstances, and when fine processing of a semiconductor device is required,
For example, even when the minimum dimension of the semiconductor integrated circuit pattern to be processed is shorter than the wavelength of light used in the conventional optical lithography technology, such fine processing does not necessarily require more advanced lithography technology. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can be formed with a simple structure without using the above.

[0011]

In the method for manufacturing a semiconductor device of the present invention, in order to achieve the above-mentioned object, a resist is formed in a pattern on a substrate to be processed, and the resist in the pattern is used as a mask to form the substrate. In the method of manufacturing a semiconductor device having a step of processing, a deposit is attached to the resist, and a deposition is performed using a gas system in which the deposit is not attached to the base.

[0012]

According to the present invention, since the deposit is adhered only to the patterned resist used as the mask, the deposit is formed on the side wall of the resist, and as a result, the opening of the resist (the opening between the resists) becomes narrow. Therefore, by using a resist having a narrow opening as described above as a mask, finer processing than before can be performed without using a particularly advanced lithography technique.

[0013]

EXAMPLES Examples of the present invention will be specifically described below. However, needless to say, the present invention is not limited by the following examples.

Embodiment 1 This embodiment embodies the present invention in a miniaturized and integrated silicon semiconductor device applicable to a MOS semiconductor device.

In the present invention, fine contact holes are formed without necessarily using the lithography technique which is higher than the conventional technique.

That is, in the present embodiment, a finer processing than the conventional one is carried out by forming a deposited film on the side wall of the patterned resist opening portion by the same lithography technique as the conventional one. FIG. 1 showing the process of this embodiment.
3 to FIG.

In this embodiment, as shown in FIG. 1, a resist 3 in a pattern is formed on a base 2 to be processed (here, an insulating film layer).
Is formed, and when the base is processed by using the patterned resist 3 as a mask, the deposit 6 adheres to the resist 3,
The base 2 (insulating film layer) is deposited by using a gas system in which the deposit 6 does not adhere (FIG. 2).

In the present embodiment, the base to be processed can be an oxide or a nitride of silicon. Here, SiO _{2 is used.}
And

In this embodiment, the gas system is a gas species (specifically, CH 2) containing at least carbon and fluorine as constituent elements.
The one containing F ₃ ) was used.

In this embodiment, the deposition is selectively performed by controlling the atmospheric pressure during deposition.

In the present embodiment, a resist 3 is formed in a pattern on a silicon oxide (or may be a silicon nitride), and the underlying silicon oxide 2 (or silicon nitride) is formed by using the resist in the pattern as a mask. In a method for manufacturing a semiconductor device having a step of processing, a deposit is attached to a resist 3 and a deposit is not attached to the underlying silicon oxide 3 (or silicon nitride) under a pressure at least carbon and fluorine. Deposition was carried out using a gas species containing as a constituent element.

The present embodiment will be described in more detail as follows. First, a description will be given with reference to FIG.

On the silicon substrate, which is the semiconductor substrate 1 in this case, as the insulating film layer 2, for example, silicon dioxide (Si) is used.
O ₂ ) is formed. In order to form a contact hole for electrically connecting to the wiring on the upper portion thereof, a patterned resist 3 having an opening 4 is formed by a lithography method. From the above, the structure of FIG. 1 is obtained.

After that, the deposit 6 is formed only on the resist sidewall and the resist under the following conditions using an RIE device or the like. Gas: CHF ₃ / Ar = 20/200 sccm Pressure: 30 Pa (225 mTorr) RF output: 200 W

By using the above-mentioned gas species, it was possible to realize the deposition in which the deposit does not adhere to the insulating film layer which is the base 2 and the deposit 6 adheres only to the resist 3 to form a deposited film. The deposit is presumed to have a carbon-based polymer (the carbon is considered to be derived from gas species and / or resist) as a main component.

Here, the pressure was set to a considerably low pressure of 30 Pa, but it is suitable for a finer processing because the deposition adheres to the resist side wall even in the narrower opening 4 when the pressure is set to a low pressure.

Here, CHF ₃ , which is a gas species having at least carbon and fluorine as constituent elements, is used to obtain a good result, but C ₂ H ₂ F ₄ or the like can also be used.

Ar in the gas is a diluent gas, and the amount of Ar may be used to the extent that excitation is performed so that deposition can proceed.

In this embodiment, during this deposition film (deposit 6) formation reaction, no deposition is formed on the insulating film layer 2 in the resist opening 4 and no deposition film is formed there. It is considered that this is because the insulating film layer 2 is slightly etched by the decomposition product of CHF ₃ , and the oxygen generated at that time reacts with the deposit.

As described above, the deposit 6 is formed only on the resist sidewall and the resist except the insulating film layer of the resist opening 4.
Is deposited to obtain the structure of FIG.

Since the deposit 6 is formed on the side wall of the resist 3, the diameter of the resist opening 4 is reduced.
Thereafter, by using, for example, an RIE apparatus, anisotropic etching is performed under the following conditions to form a connection hole (contact) hole 7 that is finer than the initial diameter of the opening 4 that is resist-patterned. Is possible (see FIG. 3).

Gas: CHF ₃ / CF ₄ / Ar = 50
/ 20 / 400sccm Pressure: 30Pa (225mTorr) RF output: 1000W

Example 2 In this example, the deposit was made to adhere only to the side wall of the resist. In particular, here, the deposit was adhered only to the side wall of the resist by controlling the output during deposition.

That is, the present embodiment is one in which the present invention is embodied as a method of manufacturing a semiconductor device including a photolithography step of depositing a deposit only on the sidewall of a resist by controlling the output during deposition. is there.

Here, the RF output is 500 W (Example 1).
Then, it is set to 200 W), so that the deposit is adhered only to the side wall of the resist.

Alternatively, even if the RF output is set to a high output of about 1000 W, it is possible to realize the same film formation of the deposit only on the side wall of the resist.

Embodiments 3 and 4 In Embodiments 1 and 2, silicon nitride (Si ₃ N ₄ ) was formed as the insulating film layer 2 instead of silicon dioxide (SiO ₂ ), and other operations were performed in the same manner. This allows
The same results as in Examples 1 and 2 could be obtained.

According to the present invention, when fine processing of a semiconductor device is required, for example, the minimum size of a semiconductor integrated circuit pattern to be processed is the minimum size of the light used in the conventional photolithography technique. Even when the wavelength is shorter than the wavelength, it is possible to realize such fine processing with a simple configuration without necessarily using a higher-level lithography technique.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing the steps of Example 1 in order (1).

FIG. 2 is a sectional view showing the steps of Example 1 in order (2).

3A to 3C are sectional views showing steps of Example 1 in order (3).

FIG. 4 is a sectional view showing the steps of the conventional example in order (1).

FIG. 5 is a sectional view showing the steps of the conventional example in order (2).

[Explanation of symbols]

 1 Semiconductor Substrate (Silicon Wafer) 2 Work Base (Insulating Film) 3 Resist 4 Resist Opening 5 Connection Hole (Contact Hole) 6 Deposit 7 Connection Hole (Contact Hole)

Claims (9)

[Claims] 1. A method of manufacturing a semiconductor device, comprising the steps of forming a resist in a pattern on a substrate to be processed and processing the substrate using the resist in the pattern as a mask. A method of manufacturing a semiconductor device, comprising the step of performing deposition using a gas system in which deposits do not adhere to the base. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the base to be processed is an insulating film. 3. The method of manufacturing a semiconductor device according to claim 2, wherein the base to be processed is an oxide or a nitride of silicon. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the gas system contains a gas species containing at least carbon and fluorine as constituent elements. 5. The method for manufacturing a semiconductor device according to claim 4, wherein the deposition is selectively performed by controlling the atmospheric pressure during the deposition. 6. The method of manufacturing a semiconductor device according to claim 1, wherein the deposit is attached only to the side wall of the resist by controlling the output during the deposition. 7. A method of manufacturing a semiconductor device, comprising the steps of forming a resist in a pattern on silicon oxide or silicon nitride and processing a base silicon oxide or silicon nitride using the resist in the pattern as a mask. In the step of depositing a deposit on the resist and not depositing on the underlying silicon oxide or silicon nitride, using a gas species containing at least carbon and fluorine as constituent elements under a pressure. A method of manufacturing a semiconductor device, comprising: 8. The method of manufacturing a semiconductor device according to claim 7, wherein the deposition is selectively performed by controlling the atmospheric pressure during the deposition. 9. The method of manufacturing a semiconductor device according to claim 7, wherein the deposit is attached only to the side wall of the resist by controlling the output during the deposition.