JP3685832B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a method for manufacturing a semiconductor device. The present invention can be applied in the field of various semiconductor devices.
[0002]
[Prior art and its problems]
In the field of semiconductor devices, the miniaturization and integration are progressing more and more. By the way, it is said that the photolithography technology that has supported such high integration of semiconductor devices is now approaching a corner. This is because the minimum dimension of the semiconductor integrated circuit pattern to be processed has become approximately the same as the wavelength of light used in the photolithography technique that has been widely used in the industry.
[0003]
On the other hand, as the minimum dimension of the semiconductor integrated circuit pattern, as represented by DRAM which is also a scale of high integration, the size of 1.3 μm for 1M DRAM is reduced to 0.8 μm for 4M DRAM, and the wavelength of g-line is already increased for 16M DRAM. The same 0.5 μm is performed. Furthermore, a size of 0.4 μm or less is required for 64MDRAM, and is expected to be the same as the wavelength of i-line.
[0004]
Thus, the trend toward miniaturization is rapid, and technological innovation is also required for lithography technology that realizes this trend. However, in the conventional photolithography technology, the actual situation is that the processing of dimensions shorter than the exposure wavelength described above has not been experienced industrially. Therefore, as long as the wavelength of the exposure light for transfer is the g-line or i-line, which is the bright line of a conventional mercury lamp, some new image forming technique must be used for further miniaturization. On the other hand, if a transfer wavelength shorter than the pattern dimension is used as in the conventional case, use of an even shorter wavelength such as an excimer laser must be considered. In addition, since the trend toward miniaturization of the minimum dimension of a semiconductor integrated circuit pattern is more rapid than the shortening of the wavelength, there is a high possibility that a shorter wavelength is required for each generation.
[0005]
The problem of the prior art will be described in more detail with reference to FIGS. 4 and 5 as follows.
[0006]
Please refer to FIG. In the conventional example, silicon dioxide (SiO ₂ ), for example, is formed on the silicon wafer or the like as the semiconductor substrate 1 as the insulating film layer 2 that is a substrate to be processed. In order to form a contact hole for electrical connection with the wiring, a resist 3 is formed in a pattern on the upper portion by a lithography method, and the opening 4 is patterned using this. Thereby, the structure of FIG. 4 is obtained.
[0007]
Thereafter, anisotropic etching is performed using, for example, an RIE apparatus to form contact holes 5 (FIG. 5).
[0008]
In this case, the diameter dimension of the contact hole 5 depends on the diameter dimension of the resist opening 4. Therefore, in order to form the contact hole 5 with a smaller size, it is necessary to reduce the diameter of the opening 4 by using a more advanced lithography technique.
[0009]
[Problems to be solved by the invention]
As described above, in order to realize finer processing, it is only necessary to use a more advanced lithography technique. However, it is not easy to improve the lithography technique.
[0010]
The present invention has been made in view of such circumstances, and when fine processing of a semiconductor device is required, for example, the minimum dimension of a semiconductor integrated circuit pattern to be processed can be reduced by conventional photolithography technology. Even when the wavelength of light that has been used is shorter, it is necessary to provide a method for manufacturing a semiconductor device in which such fine processing is not necessarily performed using a more advanced lithography technique and can be formed with a simple configuration. Is.
[0011]
[Means for Solving the Problems]
In the method of manufacturing a semiconductor device of the present invention, in order to achieve the above object,
In a method for manufacturing a semiconductor device, the method includes forming a resist in a pattern on a substrate to be processed that is an oxide or nitride of silicon, and processing the substrate using the patterned resist as a mask.
Using a gas system consisting of CHF ₃ or C ₂ H ₂ F ₄ and a diluent gas ,
By controlling the RF output to a high output of 500 W to 1000 W, deposits adhere to the resist, and deposits do not adhere to the base, and the resist opening except for the base to be processed is removed. Get a structure with deposits deposited only on the sidewalls
It was set as the structure which processes a to-be-processed base | substrate by etching in this state.
[0012]
[Action]
According to the present invention, since the deposit is attached only to the patterned resist used as a mask, the deposit is formed on the resist side wall, and as a result, the opening of the resist (opening between the resists) becomes narrow. Therefore, by using the resist having a narrow opening as a mask, finer processing than before can be performed without using a particularly high lithography technique.
[0013]
【Example】
Examples of the present invention will be specifically described below. However, as a matter of course, the present invention is not limited by the following examples.
[0014]
Example 1
In this embodiment, the present invention is embodied in a miniaturized and integrated silicon semiconductor device applicable to a MOS semiconductor device.
[0015]
In the present invention, a fine contact hole is formed without necessarily using a higher lithography technique than the conventional technique.
[0016]
That is, in this embodiment, by forming a deposited film on the side wall of the patterned resist opening, finer processing than the conventional one is performed by the same lithography technique. Reference is made to FIGS. 1 to 3 showing the steps of the present embodiment.
[0017]
In this embodiment, as shown in FIG. 1, a resist 3 is formed in a pattern on a substrate 2 to be processed (here, an insulating film layer), and when the substrate is processed using the patterned resist 3 as a mask, 3 is deposited using a gas system in which the deposit 6 adheres to the substrate 2 and the deposit 6 does not adhere to the underlying layer 2 (insulating film layer) (FIG. 2).
[0018]
In this embodiment, the substrate to be processed can be made of silicon oxide or nitride, which is SiO ₂ here.
[0019]
In this embodiment, a gas system containing a gas species (specifically, CHF ₃ ) containing at least carbon and fluorine as constituent elements was used.
[0020]
In this embodiment, the adhesion is selectively performed by controlling the atmospheric pressure during deposition.
[0021]
In this embodiment, a resist 3 is formed in a pattern on silicon oxide (or silicon nitride), and the underlying silicon oxide 2 (or silicon nitride) is processed using the patterned resist as a mask. In the method of manufacturing a semiconductor device having a process, deposits adhere to the resist 3, and at least carbon and fluorine are constituent elements under a pressure at which the deposit does not adhere to the underlying silicon oxide 3 (or silicon nitride). Deposition was performed using the following gas species.
[0022]
This embodiment will be described in further detail as follows. First, a description will be given with reference to FIG.
[0023]
Here, for example, silicon dioxide (SiO ₂ ) is formed as the insulating film layer 2 on the silicon wafer which is the semiconductor substrate 1. In order to form a contact hole for electrical connection with the wiring in the upper part, a patterned resist 3 having an opening 4 is formed by lithography. Thus, the structure of FIG. 1 is obtained.
[0024]
Thereafter, using the RIE apparatus or the like, the deposit 6 is formed only on the resist side wall and the resist under the following conditions, for example.
Gas: CHF ₃ / Ar = 20/200 sccm
Pressure: 30 Pa (225 mTorr)
RF output: 200W
[0025]
By using the above gas species, deposits did not adhere to the insulating film layer, which is the base layer 2, and deposition that the deposits 6 adhered only to the resist 3 could be realized. The deposit is presumed to be mainly composed of a carbon-based polymer (the carbon is considered to be derived from a gas species and / or a resist).
[0026]
Here, although the pressure is set to a considerably low pressure of 30 Pa, the deposit adheres to the resist side wall even in the narrower opening 4 because it is more suitable for finer processing.
[0027]
Here, good results are obtained using CHF ₃ which is a gas species having at least carbon and fluorine as constituent elements, but other C ₂ H ₂ F ₄ or the like can also be used.
[0028]
Ar in the gas is a diluent gas, and the amount of Ar may be used to such an extent that excitation is performed so that deposition can proceed.
[0029]
In this embodiment, during the deposition film (deposit 6) formation reaction, no deposition is performed on the insulating film layer 2 in the resist opening 4, and no deposition film is formed here. This is presumably because the insulating film layer 2 is slightly etched by the decomposition product of CHF ₃ , and oxygen and deposits generated at that time react.
[0030]
In this way, the deposit 6 is formed only on the resist side wall and on the resist except for the insulating film layer of the resist opening 4 to obtain the structure of FIG.
[0031]
Since the deposit 6 is formed on the side wall of the resist 3, the diameter of the resist opening 4 is reduced. Thereafter, by performing anisotropic etching under the following conditions using, for example, an RIE apparatus, a connection hole (contact) hole 7 that is finer than the diameter of the initial opening 4 subjected to resist patterning is formed. (See FIG. 3).
[0032]
Gas: CHF ₃ / CF ₄ / Ar = 50/20/400 sccm
Pressure: 30 Pa (225 mTorr)
RF output: 1000W
[0033]
Example 2
In this embodiment, the deposit is attached only to the side wall of the resist. In particular, here, deposits were attached only to the side walls of the resist by controlling the output during deposition.
[0034]
That is, this embodiment embodies the present invention as a method for manufacturing a semiconductor device including a photolithography process in which deposits are attached only to the sidewalls of a resist by controlling the output during deposition.
[0035]
Here, the RF output is set to 500 W (200 W in Example 1) so that the deposit is attached only to the side wall of the resist.
[0036]
Alternatively, even when the RF output is set to a high output of about 1000 W, it is possible to form the deposit on the resist side wall similarly.
[0037]
Examples 3 and 4
In Examples 1 and 2, silicon nitride (Si ₃ N ₄ ) was formed as the insulating film layer 2 instead of silicon dioxide (SiO ₂ ), and the others were performed in the same manner. As a result, the same results as in Examples 1 and 2 could be obtained.
【The invention's effect】
According to the present invention, when fine processing of a semiconductor device is required, for example, the minimum dimension of a semiconductor integrated circuit pattern to be processed is shorter than the wavelength of light used in the conventional photolithography technology. Even in this case, such fine processing is not necessarily required to use a more advanced lithography technique, and can be realized with a simple configuration.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing steps of Example 1 in order (1).
FIG. 2 is a cross-sectional view showing the steps of Example 1 in order (2).
FIG. 3 is a cross-sectional view showing the steps of Example 1 in order (3).
FIG. 4 is a cross-sectional view showing steps of a conventional example in order (1).
FIG. 5 is a sectional view showing steps of a conventional example in order (2).
[Explanation of symbols]
1 Semiconductor substrate (silicon wafer)
2 Work base (insulating film)
3 resist 4 resist opening 5 connection hole (contact hole)
6 Deposit 7 Connection hole (contact hole)

Claims (1)

In a method for manufacturing a semiconductor device, the method includes forming a resist in a pattern on a substrate to be processed that is an oxide or nitride of silicon, and processing the substrate using the patterned resist as a mask.
Using a gas system consisting of CHF ₃ or C ₂ H ₂ F ₄ and a diluent gas ,
By controlling the RF output to a high output of 500 W to 1000 W, the resist adheres to the resist and deposits that do not adhere to the base, and removes the resist opening except on the processing base. Get a structure with deposits deposited only on the sidewalls
A method for manufacturing a semiconductor device, characterized in that a substrate to be processed is processed by etching in this state.

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