JPH08235352A - Picture variable magnification device - Google Patents

Abstract

PURPOSE: To speedily execute variable magnification in a main scanning direction and a sub-scanning direction with simple constitution at the time of enlarging or reducing a digital multilevel picture and to prevent the deterioration of a picture due to return distortion at the time of reducing the picture. CONSTITUTION: This device is provided with line memories 22, 23 for storing picture element data of at least two lines in the main scanning direction obtained before variable magnification, a reading position control memory 43 for controlling the reading addresses of the line memories 22, 23 in the main scanning direction, a main scanning coefficient memory 45 for storing a main scanning direction interpolation coefficient to be used for interpolating operation between plural picture element data read out from the memories 22, 23, a sub- scanning coefficient register 46 for storing a sub-scanning direction interpolation coefficient, and an interpolating operation part 6 for receiving plural data and executing interpolating operation. Thus, plural picture data is read out from the memories 22, 23 and the prescribed interpolating operation between the main scanning coefficient and the sub-scanning coefficient is executed to obtain picture element data after variable magnification.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image scaling device for enlarging or reducing a digital gradation image, and is suitable for use in a digital copying machine, a facsimile device, an image scanner, an image printer, an image editing device and the like. The present invention relates to an image scaling device.

[0002]

2. Description of the Related Art As a method for scaling a digital image, a method of thinning or inserting image data and a method of interpolation calculation are known. The former has a problem that image deterioration due to aliasing distortion occurs such as image roughness and generation of moire fringes. On the other hand, the latter has a problem that it takes a long time to process although the image deterioration is small.

One method has been proposed as a method for shortening the processing time of interpolation calculation (Japanese Patent Laid-Open No. 63-82168).
issue). According to this method, a line memory having a capacity of one scanning line and a scaling control memory are provided, and when the image is enlarged, the read address of the line memory is controlled based on the information of the scaling control memory, and when the image is reduced,
By controlling the write address of the line memory based on the information of the scaling control memory, high-speed scaling processing is possible with simple hardware.

Another method for shortening the processing time of interpolation calculation has been proposed (Japanese Patent Laid-Open No. 63-296562).
issue). According to this method, the time required for the address calculation can be shortened by having the address table in both the main scanning direction and the sub scanning direction.

[0005]

According to the above-mentioned first method, there is a problem that only the scaling in the main scanning direction is performed, and the scaling in the sub-scanning direction cannot be performed.
According to the second method, when the processing is performed by software, there is a problem that the interpolation calculation still takes time even with this method. Further, in the case of using hardware, there is a problem that the scale of the hardware becomes large because it is necessary to have an address table for both main scanning and sub scanning. Further, in both the first method and the second method, when the image is reduced, a part of the original image is thinned out at a constant rate, so that image quality deterioration due to aliasing distortion such as image roughness and moire fringes occurs. There is also a problem that occurs.

The present invention has been made in view of the above problems, and can change the magnification in the main scanning direction and the sub-scanning direction at high speed with a simple structure, and image deterioration due to aliasing distortion at the time of image reduction. The present invention is characterized in that it provides an image scaling device which does not cause

[0007]

A first invention for solving the above-mentioned problems is to provide an image scaling apparatus for enlarging and / or reducing a gradation image in at least two lines in the main scanning direction before scaling. A line memory for storing pixel data, a read position control memory for controlling a read address in the main scanning direction of the line memory, and a main scanning direction for performing an interpolation operation between a plurality of pixel data read from the line memory. A main scanning coefficient memory that holds the interpolation coefficient,
A sub-scanning coefficient register that holds an interpolation coefficient in the sub-scanning direction, and an interpolation calculation unit that receives a plurality of data and performs an interpolation calculation, and a plurality of pixels from the line memory based on the information of the read position control memory. Data is read, and a predetermined interpolation calculation is performed by the interpolation calculation unit between the read pixel data, the main scanning coefficient read from the main scanning coefficient memory, and the sub-scanning coefficient read from the sub-scanning coefficient register. The feature is that pixel data after scaling is obtained.

A second invention for solving the above-mentioned problems is to perform a predetermined filtering process between a plurality of pixel data of an image before scaling in an image scaling device for enlarging and / or reducing a gradation image. A filter unit, a line memory that stores pixel data in the main scanning direction of at least two lines of the pixel data processed by the filter unit before scaling, and a read that controls a read address of the line memory in the main scanning direction. A position control memory, a main scanning coefficient memory for holding an interpolation coefficient in the main scanning direction for performing an interpolation operation between a plurality of pixel data read from the line memory, and a sub scanning coefficient for holding an interpolation coefficient in the sub scanning direction. A register and an interpolation calculation unit that receives a plurality of data and performs an interpolation calculation are provided, and the filter unit filters the pixel data before scaling. The filtered pixel data is stored in the line memory, a plurality of pixel data is read from the line memory based on the information of the read position control memory, and the read pixel data and the main scanning coefficient memory are read. It is characterized in that the interpolation calculation section performs a predetermined interpolation calculation between the main scanning coefficient and the sub-scanning coefficient read from the sub-scanning register to obtain pixel data after scaling.

In this case, when the image is enlarged, the image scaling process is performed by bypassing the filter unit, and when the image is reduced, the image scaling process is performed after the filter process is performed by the filter unit. It is preferable for providing an image scaling device that does not sometimes cause image deterioration due to aliasing.

[0010]

[Action]

(First invention) A plurality of pixel data is read from the line memory based on the information of the read position control memory, the plurality of read pixel data, the main scanning coefficient read from the main scanning coefficient memory, and the sub-scan. A predetermined interpolation calculation is performed by the interpolation calculation unit with the sub-scanning coefficient read from the coefficient register. This allows
With a simple hardware configuration, the scaling in the main scanning direction and the sub-scanning direction can be performed at high speed.

(Second Invention) After the input image data is filtered by the filter unit, the pixel data is stored in the line memory. Then, a plurality of pixel data are read from the line memory based on the information of the read position control memory, the plurality of read pixel data, the main scanning coefficient read from the main scanning coefficient memory, and the sub scanning coefficient register are read. A predetermined interpolation calculation is performed by the interpolation calculation unit with the sub-scanning coefficient. As a result, it is possible to perform zooming in the main scanning direction and the sub scanning direction at high speed with a simple hardware configuration. Further, according to the present invention, the pixel data before scaling is subjected to the filtering process by the filter section before the scaling process, so that the image deterioration due to the aliasing distortion does not occur at the time of image reduction.

Further, when the image is enlarged, the image scaling processing is performed by bypassing the filter unit, and when the image is reduced, the image scaling processing is performed by performing the filter processing after the filter processing by the filter unit. It is possible to deal with both of the image reduction processing, and it is possible to prevent image deterioration due to aliasing distortion during image reduction.

[0013]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, reference numeral 1 is an image input device for inputting image data, and for example, an image scanner and an A / D converter are used. A filter unit 2 receives the output of the image input apparatus 1 and performs a predetermined filtering process. The filter unit 2 includes line memories 22 and 23 that store pixel data of two lines in the main scanning direction, and a filter calculation unit 24 that receives the outputs of the image input device 1 and the line filters 22 and 23 and performs a filter calculation process. It consists of

Reference numeral 3 denotes a control section for giving addresses to the line memories 22 and 23, giving instructions to the filter calculating section 24, and for performing various controls. Reference numeral 5 is a CPU that controls the entire operation. 41 and 42 are line memories of two lines for storing pixel data in the main scanning direction, and SW is a switch for selecting whether the input to the line memory 41 is taken from the image input device 1 or the output of the filter calculation unit 24. is there. The output of the image input device 1 is connected to the a contact of the switch SW, and the output of the filter calculation unit 24 is the b of the switch SW.
It is connected to the contact.

Reference numeral 43 is a read position control memory for controlling addresses of the line memories 41 and 42 in the main scanning direction, and 45 is a main portion for performing an interpolation operation between a plurality of pixel data read from the line memories 41 and 42. A main scanning coefficient memory that holds the interpolation coefficient in the scanning direction, 44 is an adder that adds the output of the read position control memory 43, and 46
Is a sub-scanning coefficient register that holds the interpolation coefficient in the sub-scanning direction. An interpolation calculation unit 6 receives the outputs of the line memories 41 and 42, the output of the main scanning coefficient memory 45, the output of the sub-scanning coefficient register 46, and the control signal of the control unit 3, and performs interpolation calculation. An image output device 7 receives the output of the interpolation calculation unit 6 and outputs the scaled image data. As the image processing device 7, for example, an image printer or the like is used. The operation of the apparatus configured as described above will be described below.

(1) Operation when Enlarging Image First, the principle of interpolation of the interpolation calculation unit 6 will be described. Figure 2
FIG. 4 is an explanatory diagram of a bilinear interpolation method. In this method, the pixel data at the position to be obtained is interpolated from the known data of four points around it by a linear expression. Now consider the point D (x, y) on the plane defined by the x, y coordinate axes. Four points D (x0, y0), D (x0, y0) surrounding the point D
+1), D (x0 + 1, y0 + 1), D (x0 + 1, y
0) has been decided. A straight line is drawn horizontally and vertically from the point D (x, y), and the areas of the quadrangle formed by the four points are S1, S2 and S2, respectively, as shown in the figure.
If S3 and S4 are set, the value of the point D (x, y) can be obtained by the following equation.

D (x, y) = D (x0 + u, y0 + v) = D (x0, y0) .S2 + D (x0, y0 + 1) S4 + D (x0 + 1, y0 + 1) .S3 + D (x0 + 1, y0) .S1 (1) (1 Formula 1) is a method often used in interpolation calculation. Four
This is a method of adding each point and a point D (x, y) multiplied by the area of a quadrangle facing each other. Here, x0 in the x direction is an integer, x0 + 1 is an integer larger than x0 by 1 and x0 + u in the middle is a value larger than x0 by a fractional u. Also, y0 in the y direction is an integer, y
0 + 1 is an integer larger than y0 by 1, y0 + v is y0
It is a value larger than the decimal point by a decimal number v.

With this definition, the areas S1 to S4 in the figure can be expressed by the following equations. S1 = u · (1-v) S2 = (1-u) · (1-v) S3 = u · v S4 = (1-u) · v Substituting these values into the equation (1) yields (1 ) Is also
It can also be expressed as

D (x, y) = (1-u) · (1-v) · D (x0, y0) + u · (1-v) · D (x0 + 1, y0) + (1-u) · v · D (x0, y0 + 1) + u · v · D (x0 + 1, y0 + 1) (2) Here, u and v will be described later.

3 and 4 are flow charts showing the operation of the present invention at the time of image enlargement. Hereinafter, description will be given along this flowchart. Here, a case where m × n pixels are enlarged to m ′ × n ′ will be described. The coordinate system before expansion is (x, y), and the coordinate system after expansion is (x ', y').
First, the conversion process in the main scanning direction will be described. CPU
Reference numeral 5 first supplies a switching signal to the switch SW to connect the switch SW to the a-contact side. As a result, the filter unit 2 is bypassed (S1). This is because no filter processing is necessary when enlarging the image.

Next, the CPU 5 initializes x'of the internal memory to 0 (S2). Next, the CPU 5 performs the following calculation (S3). x (x ′) = x ′ × {(m−1) / (m′−1)} (3) where x ′ = 0, 1, 2, ... (m′−1) X0 (x ') for the integer part and u (x') for the decimal part
Then, x0 (x ') and u (x') are as follows.

X0 (x ′) = x (x ′) integer part (4) u (x ′) = x (x ′) decimal part (5) Next, the CPU 5 obtains x0 obtained by the expression (4). (X ') is stored in the read position control memory 43 at the x'th position (S
4) and u (x ') are stored in the x'th position of the main scanning coefficient memory 45 (S5). Then, x'of the internal memory is updated by 1 (S6). The above calculation is continued until x ′ becomes m ′ (m ′ times).

When x '= m' (S7), conversion processing in the y'direction (sub-scanning direction) is started. In the conversion processing in the y direction, the CPU 5 initializes the values of y'and y1 in the internal memory as follows (S8).

Y '= 0, y1 = -2 Next, the CPU 5 performs the following calculation (S9). y (y ′) = y ′ × {(n−1) / (n′−1)} (6) where y ′ = 0, 1, 2, ... (n′−1) (6) Y0 (y ') for the integer part and v (y') for the decimal part
Then, y0 (y ') and v (y') are as follows.

Y0 (y ′) = y (y ′) integer part (7) v (y ′) = y (y ′) decimal part (8) Next, the CPU 5 determines whether to read the original image data. It is judged by a predetermined conditional expression. The conditional expression is y1 ≠ y0
(Y '), and whether y1 and y0 (y') are not equal (S10). If the conditional expression is satisfied,
That is, when y1 ≠ y0 (y '), the data of one line (m pieces) of the original image data is input from the image input device 1 to the line memory 41 (S11), and the value of y1 is updated by 1 ( S12). Then, it returns to step S10. At this time, the pixel data originally stored in the line memory 41 is moved to the line memory 42.

In step S10, y1 and y0
When (y ′) becomes equal to each other, the conditional expression is not satisfied and the pixel data enlarging processing operation starts. First, v (y ') obtained in step S9 is set in the sub-scanning coefficient register 46 (S13). Next, the information x0 stored in the read position control memory 43 is controlled by the control unit 3.
Based on (x ′), a plurality of data D (x0, y0), D (x0 + 1, y0), D from the line memories 41, 42
(X0, y0 + 1) and D (x0 + 1, y0 + 1) are read out and input to the interpolation calculation unit 6. On the other hand, the control unit 3 causes the main scanning coefficient memory 45 to interpolate the main scanning direction interpolation coefficient u.
(X ′) is read, the sub-scanning direction interpolation coefficient v (y ′) is read from the sub-scanning direction coefficient register 46, and is input to the interpolation calculation unit 6.

The interpolation calculation unit 6 executes the following calculation based on these input data (S14). D '= (1-u) * (1-v) * D (x0, y0) + u * (1-v) * D (x0 + 1, y0) + (1-u) * v * D (x0, y0 + 1) + U · v · D (x0 + 1, y0 + 1) (9) This is the above equation (2) itself. That is, twin 1
It is the result of the second interpolation.

Under the control of the control unit 3, the interpolation calculation unit 6 updates the y'value of the internal memory by 1 after performing the number of pixels in the main scanning direction after scaling, that is, m'times (S15). , Y ′ again for the next line until the CPU 5
Thus, the operation of obtaining the interpolation coefficient v in the sub-scanning direction and performing the interpolation calculation is repeated from step S9 by the number n'of pixels in the sub-scanning direction after scaling. When y '= n' (S1
6), end the process. As described above, according to the present invention, image data in both the main scanning direction and the sub-scanning direction can be simultaneously enlarged at high speed with simple hardware.

(2) Image Reduction Operation FIGS. 5 and 6 are flowcharts showing the image reduction operation of the present invention. Hereinafter, description will be given along this flowchart. Here, a case where m × n pixels are reduced to m ′ × n ′ will be described. The coordinate system before reduction is (x, y), and the coordinate system after reduction is (x ', y'). Prior to the interpolation calculation, the filter coefficient of the filter unit 2 is set to the CPU 5 based on a predetermined calculation formula according to the reduction ratio (m ′ / m) in the main scanning direction.
And set in the filter calculation unit 24 (S
1). Next, the CPU 5 first gives a switching signal to the switch SW to connect the switch SW to the b-contact side. As a result, the image data passed through the filter unit 2 is stored in the line memories 41 and 42 (S2).

Next, a conversion process in the main scanning direction is started. CP
U5 first initializes x'of the internal memory to 0 (S
3). Next, the CPU 5 performs the calculation of the equation (3) (S4). Then, the integer part of the expression (3) is x0 (x '),
Let u (x ′) be the fractional part (equations (4) and (5) above).
Next, the CPU 5 stores x0 (x ′) obtained by the equation (4) in the x′-th position of the read position control memory 43 (S
5) and u (x ') are stored in the x'th position of the main scanning coefficient memory 45 (S6). Then, x'of the internal memory is updated by 1 (S7). The above calculation is continued until x ′ becomes m ′ (m ′ times).

When x '= m' (S8), conversion processing in the y'direction (sub-scanning direction) is started. In the conversion processing in the y direction, the CPU 5 initializes the values of y'and y1 in the internal memory as follows (S9).

Y '= 0, y1 = -4 Next, the CPU 5 performs the operation of the equation (6) (S1).
0). The integer part of the equation (6) is y0 (y '), and the decimal part is v
(Y ′) (the above formulas (7) and (8)). Next, CP
U5 determines whether to read the original image data according to a predetermined conditional expression. The conditional expression is y ≠ y0 (y ′) (S
11). When y1 ≠ y0 (y ′), the data of one line (m pieces) from the image input device 1 is filtered by the filter unit 2.
Input the result to and filter the result for 1 line (m pieces)
Input to the line memory 41 (S12). The filtering process by the filter unit 2 is performed before the interpolation calculation in order to prevent the image quality from being deteriorated due to the aliasing distortion such as the roughness of the image or the generation of moire fringes which occurs when the image is reduced. Then, the value of y1 is updated by 1 (S13). afterwards,
It returns to step S11. At this time, the pixel data originally stored in the line memory 41 is stored in the line memory 42.
Go to

In step S11, y1 and y0
When (y ') becomes equal, the pixel data reduction processing operation starts. First, v (y ') obtained in step S10
Is set in the sub-scanning coefficient register 46 (S14). Next, the read position control memory 4 is controlled by the control unit 3.
3 based on the information x0 (x ′) stored in 3, the plurality of data D (x0, y0) from the line memories 41 and 42,
D (x0 + 1, y0), D (x0, y0 + 1), D (x
0 + 1, y0 + 1) is read and input to the interpolation calculation unit 6. On the other hand, the main scanning direction interpolation coefficient u (x ′) is read from the main scanning coefficient memory 45 by the control unit 3, and the sub scanning direction interpolation coefficient v is read from the sub scanning direction coefficient register 46.
(Y ′) is read and input to the interpolation calculation unit 6.

The interpolation calculation unit 6 executes the calculation of the equation (9) based on these input data (S15). Under the control of the control unit 3, the interpolation calculation unit 6 performs the number of pixels in the main scanning direction after scaling, that is, m ′ times, and then y ′ of the internal memory.
The value is updated by 1 (S16), the interpolation coefficient v in the sub-scanning direction is obtained again by the CPU 5 for the next line until y'is equal to n ', and the interpolation calculation is performed from step S10. The process is repeated by n'for the number of pixels in the scanning direction. When y '= n' (S17), the process ends. As described above, according to the present invention, the reduction in both the main scanning direction and the sub scanning direction can be executed simultaneously and at high speed with simple hardware. Further, by the filter processing of the filter unit 2 performed before the interpolation calculation, it is possible to prevent the image quality from being deteriorated by the aliasing distortion such as the image roughness and the generation of moire fringes.

(Operation During Image Enlargement) Next, a more specific operation during image enlargement will be described. 10x1 as an example
Consider a case where a 5-pixel image is enlarged 1.6 times to obtain a 16 × 24-pixel image. In this case, applying the above equation, m × n = 10 × 15, m ′ × n ′ = 16 ×
24, and m = 10, n = 15, m ′ = 16, n ′ =
24. The pixel data of the original image at this time is D (x,
y) (x = 0,1,2 ... m-1, y = 0,1,2 ... n-
1), the pixel data after scaling is D '(x', y ') (x'
= 0,1,2 ... m'-1, y '= 0,1,2 ... n'-
1).

After setting the filter section 2 on the bypass side according to the procedure of FIGS. 3 and 4, the main scanning direction read address of the line memories 41 and 42 for the number m ′ (= 16) of pixels in the main operation direction after scaling. The information x0 (x ') and the interpolation coefficient u (x') in the main scanning direction are calculated by the CPU 5 and stored in the read position control memory 43 and the main scanning coefficient memory 45, respectively. Here, the calculation formula is, as described above, x (x ′) = x ′ × {(m−1) / (m′−1)} (3) where x ′ = 0, 1, 2, ... (M′−1) x0 (x ′) = integer part of x (x ′) (4) u (x ′) = fractional part of x (x ′) (5) FIG. 7 is a diagram showing an example of calculation of the main scanning direction read address information x0 and the main scanning direction interpolation coefficient u at the time of image enlargement calculated as described above. X coordinate after expansion x '
It can be seen that x0 (x ') and u (x') are sequentially assigned to (0 to 15). The main scanning direction read address x0 is irregularly assigned to x '. The 16 main scanning direction read addresses x0 and the main scanning direction interpolation coefficients u are stored in the read position control memory 43 and the main scanning coefficient memory 45, respectively.

Next, the CPU 5 obtains the interpolation coefficient v (y ') in the sub-scanning direction, and whether or not to read the original image data is judged by the above-mentioned predetermined conditional expression, and if the condition is satisfied (y1 ≠ y0). ) Reads the pixel data of the original image for one line (m pixels) in the main scanning direction into the line memory 41. Here, the calculation formula is y (y ′) = y ′ × {(n−1) / (n′−1)} (6) where y ′ = 0, 1, 2, ... (n ′ −1) y0 (y ′) = integer part of y (y ′) (7) v (y ′) = decimal part of y (y ′) (8) Therefore, when y ′ = 0, y0 (0) = 0, v
Since (0) = 0 and y1 = -2 at the beginning, the conditional expression is satisfied. Therefore, the pixel data D (0,0), D (1,0) of the first line from the image input device 1
... D (9,0) is passed through the filter unit 2 and read into the line memory 41. Next, the processing of y1 ← y1 + 1 is performed,
Although y1 = −1, the conditional expression still holds, so
The pixel data D (0,
1), D (1,1) ... D (9,1) are passed through the filter unit 2 and read into the line memory 41. At this time, the pixel data D of the first line read in the previous line memory 41
(0,0), D (1,0) ... D (9,0) are moved to the line memory 42.

Next, by the processing of y1 ← y1 + 1, y1
Since = y0 (y ') = 0, the conditional expression is not satisfied. Therefore, the sub-scanning direction interpolation coefficient v (0) = 0 is set in the inter-sub-scanning coefficient register 46, and the CPU 5 sends a command to start interpolation calculation to the control unit 3. By this command, the pixel data D '(0,0), D' (1,0), ...
D ′ (15,0) is calculated and output to the image output device 7. After that, by repeating the same processing n ′ = 24 times, enlarged pixel data of 16 × 24 pixels can be obtained.

FIG. 8 is a block diagram showing a concrete configuration example of the interpolation calculation section 6. The same parts as those in FIG. 1 are designated by the same reference numerals. In the figure, 47 is a flip-flop (FF) that latches the output of the line memory 41, and 48 is a flip-flop (F) that latches the output of the line memory 42.
F). The latch signals of the flip-flops 47 and 48 are output from the control unit 3. Reference numeral 49 is an arithmetic unit which receives the output u of the main scanning coefficient memory 45 and calculates (1-u), and 50 is an arithmetic unit which receives the output v of the sub-scanning coefficient register 46 and calculates (1-v).

Reference numeral 65 is a multiplier for receiving the output of the line memory 41, the output u of the main scanning coefficient memory 45, and the output v of the sub scanning coefficient register 46 to multiply these data, and 66 is an output of the flip-flop 47, an arithmetic unit. 49 output (1-
u), a multiplier for receiving the output v of the sub-scanning coefficient register 46 and multiplying these data, 67 is a line memory 42
Of the main scanning coefficient memory 45, the output u of the main scanning coefficient memory 45, and the output (1-v) of the arithmetic unit 50 to multiply these data, 68 is the output of the flip-flop 48, and the arithmetic unit 49.
(1-u) and the output (1-v) of the arithmetic unit 50 to multiply these data. The multiplication timings of these multipliers 65 to 68 are given from the control unit 3. An adder 69 receives the outputs of the multipliers 65 to 68 and performs addition. The addition timing of the adder 69 is given from the control unit 3. The operation of the interpolation calculation unit 6 configured as described above will be described below.

The data entering the multiplier 68 is such that the output of the flip-flop 48 is D (x0, y0), the output of the calculator 49 is (1-u), and the output of the calculator 50 is (1-v).
Therefore, its output is (1-u). (1-v) .D (x
0, y0). The data input to the multiplier 67 is such that the output of the line memory 42 is D (x0 + 1, y0), the output of the main scanning coefficient memory 45 is u, and the output of the calculator 50 is (1-v).
Is. Therefore, its output is u. (1-v) .D (x0
+1, y0). As for the data that enters the multiplier 66, the output of the flip-flop 47 is D (x0, y0 + 1), the output of the computing unit 49 is (1-u), and the output of the sub-scanning coefficient register 46 is v. Therefore, its output is (1-u) .v.
It becomes D (x0, y0 + 1). As for the data that enters the multiplier 65, the output of the line memory 41 is D (x0 + 1, y0 +
1), the output of the main scanning coefficient memory 45 is u, and the output of the sub scanning coefficient register 46 is v. Therefore, the output is u
v · D (x0 + 1, y0 + 1). These multipliers 6
The output of the adder 69 for adding the outputs of 5 to 68 is given by the equation (9). That is, D '= (1-u) * (1-v) * D (x0, y0) + u * (1-v) * D (x0 + 1, y0) + (1-u) * v * D (x0, y0 + 1) + u.v.D (x0 + 1, y0 + 1) (9). The output of the adder 69 becomes the scaled data obtained by enlarging the image data.

9 and 10 are time charts showing the operation of the interpolation calculation section 6. The numbers of the signals shown in FIG.
It corresponds to the signal number shown in. The data stored in the line memory 41 and the line memory 42 are sequentially read by the output of the read position memory control memory 43 and the adder 44, while the output u of the main scanning coefficient memory 45 and the output v of the sub scanning coefficient register 46 are Sequentially sent to the subsequent circuit,
It can be seen that a predetermined arithmetic processing is performed and the adder 69 outputs the interpolated scaled data.

Next, an embodiment of the interpolation calculation method performed by the interpolation calculation section 6 will be described. In the control unit 3, the CPU 5
When the command to start the interpolation calculation is received by, the first data of the read position control memory 43, that is, x0 (0) = 0
Is read out and input to the addition unit 44. In the adder 44, the input x0 is synchronized with the clock signal 31.
After (0) = 0 is output for 1 clock period, a value x0 (0) + 1 = 1 obtained by adding 1 to this is output for 1 clock period.
The output signal 441 of the adder 44 is used as the line memories 41 and 4
2, the original image data stored in the line memory is read out.

Since the line memory 42 stores data D (0,0), D (1,0) ... D (9,0) for the first line, D (0,0) is synchronized with the signal 441. 0,0),
D (1,0) is read out as the signal 421, and the multiplier 6
7 and 68 are inputted as signals 671 and 681. On the other hand, the line memory 41 stores the data D of the second line.
Since (0, 1), D (1, 1) ... D (9, 1) are stored, D (0, 1), D are synchronized with the signal 441.
(1,1) is read as the signal 411, and the multiplier 6
5 and 66 are input as signals 651 and 661.

On the other hand, in parallel with these processes, the first data u (0) = 0.0 of the main scanning coefficient memory 45 is also read and input to the multipliers 65 and 67. In addition, 1-u (0) = 1.0 is passed to the multipliers 66, 68 via the arithmetic unit 49.
Is input to Further, v (0) = 0.0 stored in the sub-scanning coefficient register 46 is input to the multipliers 65 and 66 via the calculator 50, and 1-v (0) = 1.0 is input to the multipliers 67 and 68. To be done.

In the multiplier 65, the input signal 651,
Multiply all the values of 652 and 653 to obtain u (0) × v (0) ×
D (1,1) is output as a signal 654 to the adder 69. Similarly, the multiplier 66 calculates (1-u (0)) × v
(0) × D (0,1) is used as the signal 664, and the multiplier 67
Is u (0) × (1-v (0)) × D (1,0) as a signal 674, and the multiplier 68 is (1-u (0)) × (1
-V (0)) * D (0,0) is output to the adder 69 as a signal 684.

The adder 69 adds these four multiplication results, and D '(0,0) = u (0) * v (0) * D (1,1) + (1-u (0)) Xv (0) * D (0,1) + u (0) * (1-v (0)) * D (1,0) + (1-u (0)) * (1-v (0)) The data is output as x / (0,0) to the image output device 7 as the scaled data 691. This equation is the same as the equation (9). This means that the first enlarged image data has been output.

Thereafter, similarly, data D '(0,0), D' (1,
0) ... D ′ (15,0) are interpolated under the control of the control unit 3 and output to the image output device 7. By repeating such processing along the flow of FIGS. 3 and 4,
The m ′ × n ′ (= 16 × 24) pieces of enlarged image data are output to the image output device 7.

(Operation at the time of image reduction) Next, a more specific operation at the time of image reduction will be described. 30x4 as an example
Consider a case where an image of 0 pixels is reduced by 0.4 times to obtain an image of 12 × 16 pixels. In this case, applying the above equation, m × n = 30 × 40, m ′ × n ′ = 12 ×
16 and m = 30, n = 40, m ′ = 12, n ′ =
It becomes 16. The pixel data of the original image at this time is D (x,
y) (x = 0, 1, 2 ... m-1 (= 29), y = 0,
1,2 ... n-1 (= 39)), and the reduced pixel data is D '(x', y ') (x' = 0,1,2 ... m'-1 (=
11), y '= 0, 1, 2 ... n'-1 (= 15)).

First, the CPU 5 causes the spatial filter coefficient C
00 to C22 are calculated and set in the filter calculation unit 24. In this embodiment, as the filter calculation unit 24, 3 ×
3 Convolution calculator is used.
FIG. 11 is a block diagram showing a configuration example of the filter calculation unit 24. In the figure, FF indicates a flip-flop, and C00 to C00
C22 is a register for setting the filter coefficient. In the convolution calculator,

[0051]

[Equation 1]

Calculate Here, D (x, y) (x =
0, 1 ... 29, y = 0, 1 ... 39) is the original pixel data,
D ″ (x, y) (x = 0, 1 ... 29, y = 0, 1 ... 3
9) is the pixel data after the filter calculation. Cij is a constant and is calculated by the following equation.

Cij = Ai · Bj (11) A0 = A2 = (1-m '/ m) / 2 (12) A1 = m' / m (13) B0 = B2 = (1-n '/ n) / 2 (14) B1 = n ′ / n (15) As is clear from the figure, all the multipliers multiply the input data by the filter coefficient and enter the adder 240. Can be realized.

In the 3 × 3 convolution calculator, 1
It is possible to correspond to a reduction ratio of / 3 times to 1 time. Generally, k ×
The k-convolution calculator can handle reduction ratios of 1 / k to 1 times.

In this embodiment, m '/ m = n' / n = 0.
4, C00 = C20 = C02 = C22 = 0.
09, C10 = C01 = C21 = C12 = 0.12, C
11 = 0.16. These coefficients are set in the corresponding registers shown in FIG. That is, the calculation of these filter coefficients is performed by the CPU 5, and the filter coefficients C00 to C
The value of 22 is set to the coefficient registers 2412 and 242, respectively.
2, 2432, 2442, 2452, 2462, 247
2, 2482 and 2492, respectively.

Next, the number of pixels in the main scanning direction after reduction (m '=
12), the main scanning direction read address information x0 (x ′) of the line memories 41 and 42 and the interpolation coefficient u (x ′) in the main scanning direction are calculated by the CPU 5, and the read position control memory 43 and the main scanning coefficient memory are respectively calculated. It stores in 45. Here, x0 (x ′) and u (x ′) are the same as in the enlargement processing: x (x ′) = x ′ × (m−1) / (m′−1) = x ′ × 29 / 11 (x ′ = 0, 1 ... 11) x0 (x ′) = integer part of x (x ′) u (x ′) = decimal part of x (x ′). FIG. 12 is a diagram showing an example of calculation of main scanning direction read address information and main scanning direction interpolation coefficient at the time of image reduction. These twelve x0 (x ') and u (x') are x '
On the other hand, they are stored in the read position control memory 43 and the main scanning coefficient memory 45, respectively.

Next, the CPU 5 determines the interpolation coefficient v in the sub-scanning direction and determines whether or not to read the original image data according to the same conditional expression as in the enlarging process. If the condition is satisfied (y1 ≠ y0 (y ′)) reads the pixel data of the original image into the filter unit 2 for one line + two pixels (m + 2 pixels) in the main scanning direction. Here, 1 line + 2 pixels is set because data for each pixel is required before and after the data of m pixels due to the spatial filter processing. m
If there is peripheral data before and after the original image data of the pixel, it is input, and if not, the start pixel data and the end pixel data are input twice in succession to obtain m + 2 pixels.

Similarly, in the sub-scanning direction, a total of n +
It is necessary to input 2 lines of data. Also in this case,
If the peripheral data exists, it is input, and if it does not exist, the first 1 line and the last 1 line are input twice to make n + 2 lines. Here, it is assumed that peripheral pixel data exists. That is, (m + 2) × (n
+2) original pixel data D (x, y) (where x = −)
1,0,1 ... my = -1,0,1 ... n) is input.
Here, y (y ') = y' * (n-1) / (n'-1) = y '* 39/15 (y' = 0,1 ... 15) y0 (y ') = y (y ') Integer part v (y') = y (y ') fractional part Therefore, when y' = 0, y0 (0) = 0, v (0) = 0
Since y1 = -4 at the beginning, y1 ≠ y0 (y ')
And the conditional expression holds, the image input devices 1 to 1
Pixel data D (-1, -1), D (0,-) of the line
1) ... D (30, -1) is input to the spatial filter unit 2. The data input at this time is stored in the line memory 22 in the spatial filter unit.

Next, the processing of y1 ← y1 + 1 is performed, and y1
However, since y1 and y0 (y ′) are not equal to each other, the condition is satisfied, and the pixel data D (−1,0) and D (0,0) of the second line from the image input device 1 are satisfied. … D (30,
0) is input to the spatial filter unit 2. The input data is stored in the line memory 22 in the spatial filter unit. At this time, the pixel data D (-1, -1), D (0, -1) ... of the first line stored in the line memory 22.
D (30, -1) moves to the line memory 23. Next, the process of y1 ← y1 + 1 is performed, and y1 = -2. However, since y1 and y0 (y ′) are not equal yet, the condition is satisfied, and the pixel data D on the third line from the image input device 1 is satisfied.
(−1,1), D (0,1) ... D (30,1) are input to the spatial filter unit 2. The input data is input to the filter calculation unit 24 and also stored in the line memory 22 in the spatial filter unit. Data D (-1,0), D of the second line stored in the line memory 22
(0,0) ... D (30,0) is input to the filter calculation unit 24 and moved to the line memory 23. As a result, the pixel data D (-1, -1), D (0, -1) ... D (3 of the first line stored in the line memory 23
0, −1) is input to the filter calculation unit 24.

In this way, the original pixel data for three lines from the first line to the third line are simultaneously input to the filter calculation section 24. The filter calculation unit 24 performs the filter processing in synchronization with the input of the original pixel data, and the calculation result D ″ (0, 0,
0), D ″ (1,0) ... D ″ (29,0) are stored in the line memory 41. FIG. 13 shows a signal time chart of the filter calculation unit at this time. It can be seen that each multiplier multiplies the data input to itself by the filter coefficient, puts the result in the adder 240 and adds it, and the output 241 is generated.

Next, the processing of y1 ← y1 + 1 is performed, and y1
However, since y1 and y0 (y ') are not equal to each other, the condition is satisfied, and the pixel data D (-1,2), D (0,2) of the fourth line from the image input device 1 is satisfied. … D (30,
2) is input to the spatial filter unit 2. The input data is input to the filter calculation unit 24 and stored in the line memory 22. The pixel data D (-1, 1), D (0,
1) ... D (30, 1) are input to the filter calculation unit 24 and moved to the line memory 23. As a result, the pixel data D (-1,0), D (0,0) ... D (30,0) of the second line stored in the line memory 23 are
It is input to the filter calculation unit 24.

In this way, the original pixel data for the third line from the second line to the fourth line is simultaneously input to the filter calculation section 24. The filter calculation unit 24 performs the filter processing in synchronization with the input of the original pixel data, and the calculation result D ″ (0,
1), D ″ (1,1) ... D ″ (29,1) are stored in the line memory 41. The spatial filter processing result D ″ (0, 0, stored in the line memory 41)
0), D ″ (1,0) ... D ″ (29,0) are moved to the line memory 42.

Next, the processing of y1 ← y1 + 1 is performed, and y1
= 0, and the condition is no longer satisfied. Therefore, the CPU 5 sets the sub-scanning direction interpolation coefficient v (0) = 0 in the sub-scanning coefficient register 46, and sends a command to start interpolation calculation to the control unit 3. In response to this command, the interpolation calculation unit 6 performs 1 after reduction by the same procedure as in the case of enlargement processing.
Pixel data D '(0,0) for line (m' = 12),
D ′ (1,0) ... D ′ (11,0) are calculated and output to the image output device 7.

By repeating such processing in accordance with the flow of FIGS. 5 and 6, m ′ × n ′ (= 12 × 16) pieces of reduced pixel data are output to the image output device 7. .

In the above embodiment, the bi-linear interpolation method (Bi-linear Interpo method) is used as the interpolation calculation method.
It was taken as an example. However, the present invention is not limited to this, and other types of interpolation methods can be used. For example, the bicubic interpolation method (B
i-cubic Interpolation) can also be used. In this case, since interpolation is performed from 4 × 4 = 16 points in the surroundings, four line memories of the interpolation calculation input section are required.

In the above embodiment, the 3 × 3 convolution method is used as the spatial filter calculation method.
The present invention is not limited to this. For example, the 5 × 5 convolution method can be used. In this case,
It is possible to handle reduction processing from 0.2 times to 1 time. In this case, four line memories for the spatial filter section are required.

As described above, according to the present invention, it is possible to perform zooming in the main scanning direction and the sub-scanning direction at high speed with a simple structure, and an image scaling device that does not cause image deterioration due to aliasing distortion during image reduction. Can be provided.

[0068]

As described above in detail, according to the first invention, a plurality of pixel data read out from the line memory based on the information of the read position control memory, and a plurality of read pixel data, By performing a predetermined interpolation calculation by the interpolation calculation unit between the main scanning coefficient read from the main scanning coefficient memory and the sub-scanning coefficient read from the sub-scanning coefficient register, a simple hardware configuration is realized. It is possible to change the magnification in the main scanning direction and the sub scanning direction at high speed.

According to the second invention, after the input image data is filtered by the filter unit, the pixel data is stored in the line memory, and the pixel data is stored based on the information of the read position control memory. Read a plurality of pixel data from the line memory, and perform the interpolation calculation between the read plurality of pixel data and the main scanning coefficient read from the main scanning coefficient memory and the sub-scanning coefficient read from the sub-scanning coefficient register. By performing a predetermined interpolation calculation by the unit, it is possible to perform zooming in the main scanning direction and the sub scanning direction at high speed with a simple hardware configuration. Further, according to the present invention, the pixel data before scaling is subjected to the filtering process by the filter section before the scaling process, so that the image deterioration due to the aliasing distortion does not occur at the time of image reduction.

Further, when the image is enlarged, the image scaling processing is performed by bypassing the filter section, and when the image is reduced, the image scaling processing is performed by performing the image scaling processing after the filter processing is performed by the filter section. It is possible to deal with both of the image reduction processing, and it is possible to prevent image deterioration due to aliasing distortion during image reduction.

[Brief description of drawings]

FIG. 1 is a configuration block diagram showing an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a bilinear interpolation method.

FIG. 3 is a flowchart showing the operation of the present invention when enlarging an image.

FIG. 4 is a flowchart showing an operation when enlarging an image of the present invention.

FIG. 5 is a flowchart showing an operation at the time of image reduction according to the present invention.

FIG. 6 is a flowchart showing an operation at the time of image reduction according to the present invention.

FIG. 7 is a diagram illustrating a calculation example of main scanning direction read address information and a main scanning direction interpolation coefficient when an image is enlarged.

FIG. 8 is a block diagram showing a specific configuration example of an interpolation calculation unit.

FIG. 9 is a time chart showing the operation of the interpolation calculation unit.

FIG. 10 is a time chart showing the operation of the interpolation calculation unit.

FIG. 11 is a block diagram illustrating a configuration example of a filter calculation unit.

FIG. 12 is a diagram showing a calculation example of main scanning direction read address information and a main scanning direction interpolation coefficient at the time of image reduction.

FIG. 13 is a time chart showing the operation of the spatial filter calculation unit.

[Explanation of symbols]

 1 Image Input Device 3 Control Unit 5 CPU 6 Interpolation Calculation Unit 7 Image Output Device 22,23 Line Memory 24 Filter Calculation Unit 41, 42 Line Memory 43 Read Position Control Memory 44 Adder 45 Main Scan Coefficient Memory 46 Sub Scan Coefficient Register SW switch

Claims (3)

[Claims] 1. An image scaling device for enlarging and / or reducing a gradation image, comprising: a line memory for storing pixel data of at least two lines in the main scanning direction before scaling, and a main scanning direction of the line memory. A read position control memory for controlling the read address of the main scanning coefficient, a main scanning coefficient memory for holding an interpolation coefficient in the main scanning direction for performing an interpolation calculation between a plurality of pixel data read from the line memory, and an interpolation in the sub scanning direction. A sub-scanning coefficient register that holds a coefficient and an interpolation calculation unit that receives a plurality of data and performs an interpolation calculation, read a plurality of pixel data from the line memory based on the information in the read position control memory, and read the pixel data. A plurality of pixel data, a main scanning coefficient read from the main scanning coefficient memory, and a sub-scanning coefficient read from the sub-scanning coefficient register. An image scaling device characterized in that the interpolation computing section performs a predetermined interpolation computation with a scanning coefficient to obtain pixel data after scaling. 2. An image scaling apparatus for enlarging and / or reducing a gradation image, comprising: a filter section for performing a predetermined filtering process between a plurality of pixel data of an image before scaling, and the filtering section. A line memory for storing at least two lines of pixel data in the main scanning direction before scaling, a read position control memory for controlling a read address in the main scanning direction of the line memory, and read from the line memory A main scanning coefficient memory that holds an interpolation coefficient in the main scanning direction for performing an interpolation operation between a plurality of pixel data, a sub scanning coefficient register that holds an interpolation coefficient in the sub scanning direction, and an interpolation by receiving a plurality of data An interpolating operation unit for performing an operation, the pixel data before scaling is filtered by the filter unit, and the filtered pixel data is processed. A plurality of pixel data stored in the line memory, read a plurality of pixel data from the line memory based on the information of the read position control memory, and read a plurality of pixel data and the main scanning coefficient read from the main scanning coefficient memory; An image scaling device, characterized in that pixel data after scaling is obtained by performing a predetermined interpolation computation with the sub-scanning coefficient read from a register by the interpolation computing section. 3. The image scaling process is performed by bypassing the filter unit when the image is enlarged, and the image scaling process is performed after the filter process is performed by the filter unit when the image is reduced. 2. The image scaling device described in 2.