JPH08223912A - Method and apparatus for digital phase control - Google Patents

Abstract

PURPOSE: To perform a high resolution and high precision accuracy control operation in a simple constitution which can be executed only by a one-chip microcomputer by a method wherein, by making use of a sampling signal as a reference, an output signal is generated at a timing which comprises a constant time difference decided according to a sampled output adjusting voltage. CONSTITUTION: On the basis of a sampled output adjusting voltage VC, time data TOUT which is to be set in a T timer is found (ST203), The found time data TOUT is set, and the timer is started (ST206, ST207). Then, an output signal is generated by waiting until the TOUT timer is timed up (ST208, ST209). On the basis of the output signal an ignition signal is generated, and a switching element such as a prescribed triac, a prescribed thyristor or the like is ignited. When a TS timer is timed up after that time data TS which is to be set in the TS timer is corrected on the basis of difference data ΔV which has been found in a previous step (ST210, ST211).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital phase control method and device in an AC power adjusting device using a thyristor or the like.

[0002]

2. Description of the Related Art As is well known, the following AC power adjusting devices have been widely used. For example, a load such as a motor or a heater is connected to a single-phase or three-phase commercial AC power supply via a thyristor, and the thyristor is turned on / off in accordance with the cycle of the AC power supply, and the thyristor triggers the AC power supply waveform. By variably controlling the phase, the power supplied to the load is variably controlled.

In many cases, the adjustment input indicating the amount of output power is given as an analog voltage which is changed by a regulator such as a potentiometer. This voltage is called an output adjustment voltage. The phase control unit constantly compares the analog output adjustment voltage with the AC power supply voltage and generates a thyristor trigger signal based on the change point of the comparison output. This allows the thyristor to be controlled with a trigger phase that is synchronized with the AC power supply waveform and that changes according to the output adjustment voltage.

[0004]

The analog circuit for performing the phase control as described above has become widespread and many phase control circuits are integrated into an IC. However, since it is an analog circuit, there is a fundamental problem in that the accuracy decreases due to the temperature characteristics of the element and aging. Therefore, it is desired to perform the above phase control with a stable digital circuit. In particular, it is desirable to collectively perform not only the phase control but also various control / data processing as an AC power control device by using a recent one-chip microcomputer (microcomputer) which is inexpensive, ultra-compact and highly functional.

However, it is not appropriate to replace the conventional analog circuit system in which the AC power supply voltage and the output adjustment voltage are constantly compared in magnitude to determine the trigger timing with the digital processing of the one-chip microcomputer. In other words, it is possible to input the AC power supply voltage and the output adjustment voltage to the one-chip microcomputer with the A / D conversion input port and compare the magnitude, but in order to perform highly accurate phase control, 50
It is necessary to sample the power supply voltage changing at Hz or 60 Hz at a sufficiently high frequency so that the voltage resolution and time resolution are sufficiently high. Therefore, inexpensive one-chip
It is difficult for a microcomputer to perform A / D conversion at a high sampling frequency, and if A / D conversion is repeated at high speed, other processing cannot be performed and the trigger signal generation processing is also hindered.

Then, for example, Japanese Patent Laid-Open No. 59-106879.
As disclosed in Japanese Patent Publication, instead of reading the AC power supply voltage into the microcomputer, a zero-cross detection circuit is provided in the preceding stage of the digital processing circuit, whereby the zero-cross point of the AC power supply voltage is detected and the timing is used as a reference. , A digital circuit for generating an output signal (trigger signal of thyristor) at a timing having a time difference corresponding to the output adjustment voltage has been developed. However, this conventional circuit requires a zero-crossing detection circuit as a preprocessing circuit in addition to the one-chip microcomputer, which causes a problem that the circuit configuration is complicated and the cost becomes high. The zero-cross point of the AC power supply voltage can be detected by software with a microcomputer.
In this case, similar to the problem of the method of repeating the A / D conversion at high speed, the zero-cross detection processing must be repeated at high speed in order to improve the resolution / accuracy of zero-cross detection.

The present invention has been made in view of the above background, and an object of the present invention is to solve the above problems and to realize an AC power supply voltage A with a simple configuration which can be implemented only by a one-chip microcomputer. There is no need to repeat the / D conversion processing and zero-cross detection processing at high speed, and control with high resolution and accuracy can be performed. Furthermore, it is possible to shift to a stable synchronous state in a short time and then to an asynchronous state. It is an object of the present invention to provide a digital type phase control method and device capable of suppressing the phase.

[0008]

In the control method and apparatus of the first invention, a sampling signal is repeatedly generated in a digital signal processing system at an appropriately variable period Ts, and an AC power supply is synchronized with the sampling signal. The voltage and the output adjustment voltage are sampled by the A / D conversion means, the AC power supply voltage sample value Vs is compared with a constant value Vr, and the value of the cycle Ts is changed based on the comparison result, so that Vs becomes almost Vr. An equalized synchronization state is created, and in the state where the synchronization state is established, the output signal is generated at a timing having a certain time difference determined according to the output adjustment voltage sample value Vc with reference to the sampling signal.

In the control method and apparatus according to the second aspect of the invention, the period T which is appropriately varied in the digital signal processing system.
The output signal is repeatedly generated at s, the AC power supply voltage and the output adjustment voltage are sampled by the A / D conversion means at a timing having a constant time difference Tz from the output signal, and the AC power supply voltage sample value Vs and the output adjustment are obtained. The reference voltage V0 determined based on the voltage sample value Vc is compared, and the value of the period Ts is changed based on the comparison result to create a synchronized state in which Vs and V0 are substantially equal to each other.

In either case, the amount of increase / decrease with respect to the cycle Ts when creating the synchronized state may be constant or variable. That is, in a constant case, each state repelling process may be performed by obtaining a magnitude relation and increasing / decreasing by a variation width obtained in advance based on the result. The fluctuation range may be the same in the increasing direction and the decreasing direction,
Alternatively, it may be different.

Further, as in claims 5 and 6, Vs and V
It is more preferable to obtain the difference of 0 and adjust the increase / decrease amount (variation width) according to the difference because synchronization can be achieved in a short time.

In the present invention, the constant value Vr is the power supply voltage when sampling is performed at the cycle Ts (predetermined phase angle) when in the synchronized state. Therefore, if Vs = Vr, it can be regarded as in the synchronized state.

Further, the reference voltage V0 is a power supply voltage when a certain time difference Tz is delayed from the firing angle in the synchronized state. Therefore, if Vs = V0, it can be regarded as in the synchronized state.

The output adjustment voltage Vc is a voltage that is determined and input based on the ignition timing, and increases or decreases according to the ignition angle. Then, in the case of the first invention, for example, what is called a firing angle command value or the like, the zero cross time is set to 0 degree,
It is a value that represents the phase angle to be fired. That is, in this case, the conventional method can be applied as it is. In the case of the second invention, it may be the same as the first invention, but in that case, it is necessary to calculate the reference voltage voltage V0 based on the command value Vc and the time difference Tz (firing angle command). For the input device itself, the conventional one can be applied). In the second invention, since it is not necessary to obtain the ignition timing according to the command angle as in the first invention, the voltage corresponding to the reference voltage V0 is directly input as the output adjustment voltage. Good. Then, it becomes unnecessary to calculate the reference voltage V0.
As described above, the specific content of the output adjustment voltage Vc is appropriately changed depending on the control / comparison target.

[0015]

In the first aspect of the invention, the cycle Ts of the sampling signal matches the cycle of the AC power supply, and the sampling signal is fixed at a specific phase point of the AC power supply (fixedly determined by a constant value Vr). If they match, the above V
A synchronized state is obtained in which s and Vr substantially match. In this synchronization state, the output adjustment voltage V with respect to the sampling signal
An output signal is generated with a delay of a fixed time corresponding to c.
If it is not in the synchronized state, the period Ts is varied by a predetermined amount according to the magnitude relationship or the difference between Vs and Vr, and the synchronized state is searched for. Then, the phase difference between the AC power supply voltage and the output signal is determined according to the output adjustment voltage Vc.

In the second invention, the cycle T of the output signal
If s matches the cycle of the AC power supply and the AC power supply voltage sample value Vs sampled at a timing delayed by a fixed time fixed to the output signal and the reference voltage V0 are substantially equal, the synchronous state Becomes Otherwise, the cycle Ts is changed according to the difference between Vs and V0,
Find out the sync state.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of a digital phase control method and apparatus according to the present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 shows a schematic configuration of an AC power adjusting apparatus including a digital phase control apparatus according to an embodiment of the present invention. As shown in the figure, AC power is supplied from a single-phase or three-phase commercial AC power source 1 to a load 3 via a thyristor 2. The thyristor 2 receives the gate trigger signal from the driver 4 and is turned on / off in synchronization with the AC power supply 1.

The one-chip microcomputer 5 is the main body for executing the phase control method of the present invention and generates an output signal for instructing the trigger timing of the thyristor 2 toward the driver 4. The adjustment input for instructing the output power amount is given to the one-chip microcomputer 5 as an analog output adjustment voltage which is changed by the adjuster 6 such as a volume.

The microcomputer 5 variably controls the trigger phase of the thyristor 2 with respect to the voltage waveform of the AC power source 1 according to the output adjustment voltage as described below, thereby appropriately variably controlling the power supplied to the load 3. . The one-chip microcomputer 5 has a general configuration having a CPU, RAM, ROM, timer, counter, input / output port, and A / D conversion input port. The above hardware configuration is common to the first invention and the second invention. The processing functions performed in the CPU are different, for example, as shown in FIG. 2 in the first invention and as shown in FIG. 5 in the second invention. [First Invention] The control method of the first invention will be described with reference to FIGS. Here, a Ts timer for generating a sampling signal and a Tout timer for generating an output signal are used. In the initial routine (ST201), time data Ts corresponding to the nominal cycle of the AC power supply 1 is set in the Ts timer. At the same time as starting this Ts timer, a sampling command is generated, and the voltage of the AC power supply 1 and the output adjustment voltage from the regulator 6 are sampled from the A / D conversion input port (the sample value of the AC power supply voltage is Vs, the output adjustment The sample value of voltage is Vc),
The difference ΔV between the sample value Vs and the constant value (fixed value) Vr is calculated (ST202 to ST204). Here, the constant value Vr
Is equal to the sampled value Vs of the AC power supply voltage when sampling in the synchronized state, that is, the voltage value at the desired phase angle.

In the next step 205, it is judged whether or not the obtained difference data ΔV is substantially zero (whether the absolute value of the difference data ΔV is smaller or larger than the minute set value Δv).
A state in which the difference data ΔV is substantially zero (that is, a state in which the power supply voltage sample value Vs is substantially equal to the fixed value Vr) is the above-mentioned synchronization state.

Here, the description will proceed assuming that the synchronization state has already been reached. In this case, step 20
In step 6 and subsequent steps, time data Tout to be set in the Tout timer is obtained based on the output adjustment voltage Vc sampled in the previous step 203. This time data Tout
Can be obtained by, for example, a linear function of Vc.
That is, in the conventional case, the elapsed time until the firing angle based on the output adjustment voltage Vc is obtained after the zero cross has passed is calculated, but the reference for the calculation is not the zero cross (the phase angle is 0) but the sampling time (the phase angle is 0). Is already known), it can basically be easily calculated using conventional calculation processing. That is, in the example of FIG. 3, when the elapsed time from the sampling time to the next zero cross is T0, Tout = a × Vc + T0. However, a is a proportional constant, and a * Vc is the elapsed time until the firing angle after zero crossing.

Then, the obtained time data Tout is set and the timer is started (S206, ST207). Then, an output signal is generated after the Tout timer has timed out (ST208, ST209). This relationship is shown in the timing chart of FIG. A firing signal is generated based on this output signal, and a predetermined switching element such as a triac or thyristor is fired.

After that, in step 210, the Ts timer waits for the time to elapse, and if the time elapses, the process proceeds to step 211, where the time data Ts set in the Ts timer is set based on the difference data ΔV obtained in the previous step 204.
To correct. That is, a value obtained by adding k × ΔV to the current data Ts (k is an appropriate proportional constant) is used as the new time data Ts.
Is set in the timer, and the process returns to step 202 to repeat the above process.

On the other hand, if it is determined in step 205 that the state is asynchronous, the process jumps to step 210 without performing the output signal generation processing from step 206 to step 209. As a result, the AC power supply voltage sample value Vs and the constant value V
The above process is repeated while the time data Ts is updated according to the difference data ΔV from r, and a synchronized state in which Vs is substantially equal to Vr is created.

That is, for example, when the detected AC power supply voltage sample is larger than Vr like Vs (1), the sampling timing is advanced, so that Ts is extended to delay the next sampling time. By performing the control of increasing the amount by a certain amount, the difference between Vs and Vr is reduced and the control is performed in a direction in which synchronization can be achieved. Then, the increment is determined by k × ΔV. If Vr is larger, Δ
V becomes negative and Ts is shortened (decreased by a predetermined amount) contrary to the above. The proportional constant k based on the magnitude relationship between Vr and Vs has a positive predetermined value in the section where the power supply voltage waveform is decreasing as shown in FIG. 3, but the power supply voltage waveform is increasing as shown in FIG. In a certain section, it becomes a predetermined negative value.

In this synchronized state, the output signal is generated with a delay of the fixed time Tout corresponding to the output adjustment voltage Vc with respect to the sampling signal. If not in sync, V
The cycle Ts is varied according to the difference ΔV between s and Vr, and the synchronization state is searched for. Then, the phase difference between the AC power supply voltage and the output signal is determined according to the output adjustment voltage Vc.

In this example, the above steps 202 and 2
10 constitutes the sampling instruction means, and ST203 to ST2
05 and 211 constitute the synchronization adjusting means, and ST206 to ST206-2.
09 constitutes the output signal generating means.

When it is mounted on a power regulator for three phases, one apparatus having the above-mentioned configuration is used and an ignition signal for each phase is generated based on an output signal output from the apparatus. Of course, in that case, the counter in the one-tap microcomputer may measure for a certain period of time, and the firing signals may be output in a predetermined order.

The time data Tout may have a firing command angle on the front side (zero cross) side of the sampling signal, for example. In particular, if the sampling signal is generated in the positive portion in the increasing region as shown in FIG. 4, the possibility of such a phenomenon occurring increases. In this case, as shown by Tout (1) in the figure, it may be used as a reference for the output signal generation after the next zero cross. Since the angle to be sampled is known, it is possible to know whether the given ignition angle occurs before / after the sampling, so it may be switched appropriately or Tout
As in (2), each sampling timing may always be the reference of the next firing signal. [Second Invention] A phase control method according to the second invention will be described with reference to FIGS. Here, the Ts timer and the Tz timer are used, but the time data Tz of the Tz timer is fixed to 1/4 of the nominal cycle of the AC power supply 1. In the initial routine (ST501), the AC power supply 1 is set in the Ts timer.
The time data Ts corresponding to the nominal period of is set. Then, the Ts timer and the Tz timer are started (ST50
2), a synchronization flag (“1” in the synchronization state as described later,
In the asynchronous state, "0" is checked, and if "1", an output signal is generated (ST503, ST504).
The synchronization flag is initially set to "0".

Next, at step 505, the Tz timer waits for the time to elapse, and if the time elapses, the AC power supply voltage Vs and the output adjustment voltage Vc are sampled (ST5
06), the reference voltage V0 determined based on Vc, and V
The difference data ΔV of s is calculated (ST507). In this embodiment, the ideal voltage (reference voltage V0) at the phase angle when the delay time Tz has elapsed from the ignition timing is directly input as the output adjustment voltage Vc. That is, Vs = V0, and in this step, therefore, a process of comparing the sampled Vs and Vc at a predetermined timing and obtaining the difference therebetween is performed. In the next step 507, it is judged whether the obtained difference data ΔV is substantially zero (synchronous state) or not (asynchronous state), and if it is the synchronous state, the synchronous flag is set to “1” (ST509) and the asynchronous state is set. If so, the synchronization flag is set to "0" (ST510).

After that, in step 511, the Ts timer waits until the time is up, and if the time is up, the process proceeds to step 512, and the time data Ts set in the Ts timer is set based on the difference data ΔV obtained in the previous step 507.
To correct. That is, a value obtained by adding k × ΔV to the current data Ts (k is an appropriate proportional constant) is used as the new time data Ts.
Is set in the timer and the process returns to step 502 to repeat the above process. This relationship is shown in the timing chart of FIG. And in this example, steps 505-5
10, 512 constitute a synchronization adjusting means, and step 51
1, 502 to 504 form the output signal generating means.

As a result, the cycle Ts of the output signal coincides with the cycle of the AC power supply 1, and the AC power supply voltage sampled value is sampled at a timing delayed by the fixed time Tz set for the output signal. If Vs and the output adjustment voltage Vc are substantially equal to each other, the synchronous state is established. Otherwise, the cycle Ts is varied according to the difference ΔV between Vs and Vc, and the synchronization state is searched for. That is, the phase difference between the AC power supply voltage and the output signal is determined according to the output adjustment voltage Vc.

The reason why the delay time Tz is π / 2 in this embodiment is as follows. That is, as shown in FIG. 7, the power supply voltage waveform has a monotonically decreasing interval at π / 2 to 3π / 2 [rad]. Therefore, the timing at which the reference voltage V0 coincides with this section is set to one. On the other hand, since the firing angle (timing) is in the section of 0 to π [rad], if the delay time is set to π / 2 as described above, the sampling timing is always controlled by the monotonically decreasing section.
Therefore, if the firing angle has a certain limit (non-use section), the delay time may be changed accordingly.

In each of the above-mentioned embodiments, the amount of increase / decrease with respect to the cycle Ts is variable, but the present invention is not limited to this and may take a constant value. In that case, step 211 in the flow chart of FIG. 2 and step 512 in the flow chart of FIG. 5 determine whether the ΔV is positive or negative as preprocessing, and use one of the following equations depending on the determination result and the sampling interval. Get to run.

Ts = Ts + α1 Ts = Ts−α2 α1 and α2 may have the same value or different values.

Further, in each of the above-described embodiments, correction processing is always performed. However, for example, when Vs and Vr, V0 are equal, synchronization is established,
The sampling cycle Ts may be reset to the initial state (one cycle of the power supply frequency) (between the steps 205 and 206, the processing steps related to the steps 508 and 509 are inserted). Then, after synchronization is achieved, the risk of becoming an asynchronous state due to overshoot is reduced as much as possible, and a stable state is achieved in a short time, which is effective. In addition, step 2
11. Since the amount of increase or the amount of decrease in each time is integrated in step 512 in step 512, Ts immediately before the convergence to the synchronous state (small ΔV) is often a value relatively distant from the initial state. Therefore, it is possible to set a certain limit to the contents beyond the certain range from the initial state, and not to correct Ts when the amount exceeds the certain limit. Furthermore,
The correction processing in step 211 or step 512 may be Ts = Ts0 + correction value Ts0: Ts correction value in the initial state: increase / decrease amount such as k × ΔV, α1, −α2.

In this way, the possibility of overshoot is suppressed as much as possible, and when ΔV is used as the correction value as in each embodiment, when Vs is largely deviated from the predetermined value, The correction amount becomes large and the synchronization state can be reached in a short time. When the synchronization state is approached, the correction value also becomes smaller, so the transition smoothly goes to the synchronization state, and then it shifts in the opposite direction to become the asynchronous state. Will disappear.

[0038]

According to the present invention, the power supply voltage and the output adjustment voltage are sampled only once in one cycle of the AC power supply, and the output signal can be accurately generated at the phase point designated by the output adjustment voltage. That is, unlike the conventional case, it is not necessary to repeat the A / D conversion processing of the AC power supply voltage and the zero-cross detection processing at high speed, and control with high resolution and accuracy can be realized by a very simple and inexpensive circuit only with a one-chip microcomputer.

[Brief description of drawings]

FIG. 1 is a block diagram showing a hardware configuration common to a first invention and a second invention.

FIG. 2 is a flowchart showing a control procedure of the embodiment of the first invention.

FIG. 3 is a timing chart showing the operation of the embodiment of the first invention.

FIG. 4 is a timing chart showing another operation of the embodiment of the first invention.

FIG. 5 is a flowchart showing a control procedure of an embodiment of the second invention.

FIG. 6 is a timing chart showing the operation of the embodiment of the second invention.

FIG. 7 is a diagram illustrating a delay time Tz.

[Explanation of symbols]

 1 AC power supply 2 Thyristor 3 Load 4 Driver 5 One-chip microcomputer 6 Regulator

Claims (7)

[Claims] 1. A digital signal processing system, wherein a sampling signal is repeatedly generated at an appropriately variable period Ts, and an AC power supply voltage and an output adjustment voltage are sampled by an A / D conversion means in synchronization with the sampling signal, By comparing the AC power supply voltage sample value Vs with a constant value Vr and increasing or decreasing the value of the period Ts based on the comparison result, a synchronized state in which Vs is substantially equal to Vr is created, and the synchronized state is established. In the digital phase control method, the output signal is generated at a timing having a constant time difference Tout determined according to the output adjustment voltage sample value Vc with reference to the sampling signal. 2. A sampling instruction means for repeatedly generating a sampling signal at an appropriately variable cycle Ts, an A / D conversion means for sampling an AC power supply voltage and an output adjustment voltage in synchronization with the sampling signal, and the AC. Synchronization adjustment means for creating a synchronization state in which Vs is substantially equal to Vr by changing the value of the period Ts according to the difference between the power source voltage sample value Vs and the constant value Vr, and the sampling in the state where the synchronization state is established. A digital phase control device comprising a digital signal processing system having an output signal generating means for generating an output signal at a timing having a constant time difference Tout determined according to the output adjustment voltage sample value Vc on the basis of the signal. 3. In a digital signal processing system, an output signal is repeatedly generated at a timing that is repeatedly changed at a cycle Ts that is appropriately changed, and when in a synchronized state, a timing that is constant with the timing generated at the cycle Ts. Time difference Tz
The AC power supply voltage and the output adjustment voltage are sampled by the A / D conversion means at a timing having
And a reference voltage V0 based on the comparison result, and the value of the period Ts is increased or decreased based on the comparison result to create a synchronized state in which Vs and V0 are substantially equal to each other. 4. An output signal generating means for repeatedly generating an output signal at an appropriately variable cycle Ts, and A for sampling the AC power supply voltage and the output adjustment voltage at a timing having a constant time difference Tz from the output signal.
A / D conversion means compares the AC power supply voltage sample value Vs with a reference voltage V0 based on the output adjustment voltage sample value Vc, and increases / decreases the value of the cycle Ts based on the comparison result.
A digital phase control device comprising a digital signal processing system having a synchronization adjusting means for producing a synchronization state in which s and V0 are substantially equal. 5. The digital method according to claim 1, wherein the synchronization adjustment process determines a difference between Vs and Vr or Vs and V0, and adjusts an increase / decrease amount with respect to the cycle Ts according to the difference. Phase control method. 6. The synchronization adjustment means sets a difference Δ between Vs and Vc.
5. The method according to claim 2, further comprising means for obtaining V and means for calculating an increase / decrease amount with respect to the cycle Ts based on the difference and setting a cycle Ts of the next cycle based on the calculated increase / decrease amount. The described digital phase control device. 7. The digital phase control device according to claim 2, wherein the digital signal processing system is a one-chip microcomputer.