JPS62107315A - Phase control device - Google Patents
Phase control deviceInfo
- Publication number
- JPS62107315A JPS62107315A JP24823085A JP24823085A JPS62107315A JP S62107315 A JPS62107315 A JP S62107315A JP 24823085 A JP24823085 A JP 24823085A JP 24823085 A JP24823085 A JP 24823085A JP S62107315 A JPS62107315 A JP S62107315A
- Authority
- JP
- Japan
- Prior art keywords
- load
- delay time
- power source
- voltage
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は負荷に交流電源を印加する位相を制御すること
により負荷に印加する電圧を制御する位相制御装置に関
するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a phase control device that controls the voltage applied to a load by controlling the phase of applying AC power to the load.
従来の技術
従来、負荷に′印加する交流電源電圧を制御する手段と
して、位相制御が用いられているが、その構成は、ゼロ
クロスを起点とし、抵抗とコンザンサにより充電波形を
作り、その波形をある基準電圧トコンパレータ等によシ
比較して遅れ時間を作ると共に、その出力を制御信号と
するものであった・
発明の解決しようとする問題点
しかし、従来の構成では、基準電圧を決定すると遅れ時
間が決まってしまい、電源周波数が変わると負荷に電源
を印加する位相角が変わシ、従って、負荷に印加する電
圧も変わるという問題点があった。Conventional technology Conventionally, phase control has been used as a means to control the AC power supply voltage applied to a load, but its configuration uses the zero cross as the starting point, creates a charging waveform with a resistor and capacitor, and then adjusts the waveform to a certain level. A delay time is created by comparing the reference voltage with a comparator, etc., and the output is used as a control signal.Problems to be Solved by the InventionHowever, in the conventional configuration, once the reference voltage is determined, a delay time is generated. There is a problem in that when the time is fixed and the power supply frequency changes, the phase angle at which the power is applied to the load changes, and therefore the voltage applied to the load also changes.
問題点を解決するための手段
上記問題点を解決するために本発明の位相制御装置は、
交流電源のゼロクロス部に同期した同記信号を発生する
同期信号発生手段と、前記同期信号を入力し、交流電源
の周波数を判定する周波数判定手段と1.負荷に印加す
る電圧を設定する電圧設定手段と、周波数判定手段によ
シ判定された周波数と電圧設定手段によシ設定された電
圧よシ。Means for Solving the Problems In order to solve the above problems, the phase control device of the present invention includes:
1. a synchronizing signal generating means for generating the signal synchronized with the zero-crossing portion of the AC power source; a frequency determining means for inputting the synchronizing signal and determining the frequency of the AC power source; A voltage setting means for setting the voltage applied to the load, a frequency determined by the frequency determining means, and a voltage set by the voltage setting means.
ゼロクロス部から負荷に交流電源を印加するまでの遅れ
時間を計算する遅れ時間計算手段と、この計算による遅
れ時間と同期信号を入力とし、同期信号から遅れ時間ま
では負荷に交流電源を印加しない制御信号を出力し、遅
れ時間以後は負荷に交流電源を印加する制御信号を出力
する制御信号出力手段と、この制御信号出力手段からの
制御信号によ)負荷に交流電源が印加するのを制御する
電源印加手段とを備えたものである。A delay time calculation means that calculates the delay time from the zero cross point to the application of AC power to the load, and control that uses the calculated delay time and synchronization signal as input, and does not apply AC power to the load from the synchronization signal until the delay time. a control signal output means for outputting a control signal for applying an AC power to the load after the delay time; and a control signal from the control signal output means) for controlling application of the AC power to the load. It is equipped with a power supply means.
作 用
本発明は上記した構成によシ、同期信号発生手段によっ
て交流電源のゼロクロス部に同期した同期信号を発生し
、この同期信号から交流電源の周波数を周波数判定手段
で判定し、この判定結果と電圧設定手段によって設定さ
れた電圧から、判定した周波数において、負荷に設定電
圧を印加するのに必要な遅れ時間(ゼロクロス部から負
荷に電源を印加する点までの時間)を遅れ時間計算手段
において計算し、この計算結果と前記同期信号よυ、同
期信号から遅れ時間までは負荷に交流電源を印加しない
で、遅れ時間以後は負荷に交流電源を印加する制御信号
を制御信号出力手段によって出力し、この制御信号によ
り電源印加手段が負荷に交流電源が印加するのを制御し
、交流電源の周波数と設定電圧に応じて、自動的に遅れ
時間が計算され、負荷に設定電圧が印加される。According to the above-described configuration, the present invention generates a synchronization signal synchronized with the zero cross section of the AC power supply by the synchronization signal generation means, determines the frequency of the AC power supply from the synchronization signal by the frequency determination means, and determines the determination result. From the voltage set by the voltage setting means, the delay time calculation means calculates the delay time (time from the zero cross point to the point at which power is applied to the load) necessary to apply the set voltage to the load at the determined frequency. Based on this calculation result and the synchronization signal υ, the control signal output means outputs a control signal that does not apply AC power to the load from the synchronization signal until the delay time, and applies AC power to the load after the delay time. Based on this control signal, the power supply means controls the application of AC power to the load, a delay time is automatically calculated according to the frequency of the AC power and the set voltage, and the set voltage is applied to the load.
実施例
本発明の実施例を図面に基づき説明する。第1図は本発
明の一実施例であるシステム構成図で。Embodiment An embodiment of the present invention will be described based on the drawings. FIG. 1 is a system configuration diagram that is an embodiment of the present invention.
第2図は動作波形図である。FIG. 2 is an operating waveform diagram.
まず、第1図において、1は交流電源、2は交流電源1
によシ駆動する負荷、3は交流電源1が負荷2に電源を
印加するのを制御する電源印加手段、4は交流電源1の
半波波形の電圧が0の部分(以下ゼロクロス部という)
に同期した同期信号5を゛発生する同期信号発生手段、
6は同期信号5を入力とし交流電源1の周波数を判定す
る周波数判定手段、7は負荷2に印加する電圧を設定す
る電圧設定手段、8は周波数判定手段6が出力する周波
数信号9と電圧設定手段7が出力する設定電圧信号10
を入力としゼロクロス部から負荷2に交流電源1を印加
するまでの時間t(以下これを遅れ時間という)を計算
し遅れ時間信号11を出力する遅れ時間計算手段、12
は遅れ時間信号11と同期信号5を入力としゼロクロス
部から遅れ時間までは負荷2に交流電源1を印加しない
制御信号13を電源印加手段3に出力し、遅れ時間以後
は負荷2に交流電源1を印加する制御信号13を電源印
加手段3に出力する制御信号出力手段である・
つぎに、第2図において、14は交流電源1の電圧波形
である交流電源電圧波形、15は負荷2に印加される電
圧波形である負荷臼7+11電圧波形である・
交流電源電圧の実効値をvO1交流電源の半波周期をT
とすると、遅れ時間先の時に負荷2に印加する電圧の実
効値Vは次式で与えられる。First, in Fig. 1, 1 is an AC power supply, 2 is an AC power supply 1
3 is a power supply means for controlling the application of power from the AC power source 1 to the load 2; 4 is a portion where the voltage of the half-wave waveform of the AC power source 1 is 0 (hereinafter referred to as the zero cross portion);
synchronous signal generating means for generating a synchronous signal 5 synchronized with
Reference numeral 6 denotes a frequency determination means for inputting the synchronization signal 5 and determining the frequency of the AC power supply 1, 7 a voltage setting means for setting the voltage applied to the load 2, and 8 a frequency signal 9 outputted by the frequency determination means 6 and voltage setting. Setting voltage signal 10 outputted by means 7
delay time calculation means 12 which receives as input, calculates the time t (hereinafter referred to as delay time) until application of the AC power source 1 from the zero cross section to the load 2, and outputs a delay time signal 11;
inputs the delay time signal 11 and the synchronization signal 5, outputs a control signal 13 that does not apply the AC power supply 1 to the load 2 from the zero cross point to the delay time, and outputs the control signal 13 that does not apply the AC power supply 1 to the load 2 after the delay time. is a control signal output means that outputs a control signal 13 that applies a voltage to the power supply means 3.Next, in FIG. The voltage waveform of the load mill 7 + 11 is the voltage waveform. The effective value of the AC power supply voltage is vO1 The half-wave period of the AC power supply is T
Then, the effective value V of the voltage applied to the load 2 after the delay time is given by the following equation.
上式からもわかるように交流電源の周波数が変化して半
波周期Tが変わると、負荷に印加する電圧の実効値Vが
変化してしまう。だから50Hz地域と60Hz地域で
は同じ設定値になっていても実際に負荷に印加する電圧
は変わってしまうという問題点がある。As can be seen from the above equation, when the frequency of the AC power source changes and the half-wave period T changes, the effective value V of the voltage applied to the load changes. Therefore, there is a problem in that even if the set value is the same in the 50 Hz region and the 60 Hz region, the voltage actually applied to the load differs.
そこで、上記に説明した第1図に示す構成を用いると、
交流電源の周波数が変化して半波周期Tが変わると、周
波数判定手段6によってそれを検出し、下が同じになる
遅れ時間tを遅れ時間計算手段8によって計算するので
、負荷2に印加する電圧の実効+KVは変化しない。Therefore, if the configuration shown in FIG. 1 explained above is used,
When the frequency of the AC power source changes and the half-wave period T changes, this is detected by the frequency determining means 6, and the delay time t at which the lower half waves become the same is calculated by the delay time calculating means 8, so that the half-wave period T is applied to the load 2. The effective voltage +KV does not change.
発明の効果
以上の発明によれば、交流電源の周波数が変化しても周
波数判定手段によってそれを検出し、負荷に電源を印加
する位相角が変わらないように遅れ時間を遅れ時間計算
手段で計算し、その計算結果に基いて交流電源が負荷に
印加するのを制御するように構成したものであるから、
交流電源の周波数が変化しても、負荷に印加する電圧の
実効値は変化しないという効果を有する。Effects of the Invention According to the invention described above, even if the frequency of the AC power source changes, it is detected by the frequency determination means, and the delay time is calculated by the delay time calculation means so that the phase angle at which the power is applied to the load does not change. However, it is configured to control the application of AC power to the load based on the calculation results.
This has the effect that even if the frequency of the AC power source changes, the effective value of the voltage applied to the load does not change.
第1図は本発明の位相制御装置の一実施例を示すシステ
ム構成図、第2図は動作波形図である。
1・・・・・・交流電源、2・・・・・・負荷、3・・
・・・・電源印加手段、4・・・・・・同期信号発生手
段、6・・・・・・周波数判定手段、7・・・・・・電
圧設定手段、8・・・・・・遅れ時間計算手段、11・
・・・・・遅れ時間、12・・・・・・制御信号出力手
段。FIG. 1 is a system configuration diagram showing an embodiment of the phase control device of the present invention, and FIG. 2 is an operating waveform diagram. 1...AC power supply, 2...Load, 3...
... Power supply means, 4 ... Synchronization signal generation means, 6 ... Frequency judgment means, 7 ... Voltage setting means, 8 ... Delay Time calculation means, 11.
... Delay time, 12 ... Control signal output means.
Claims (1)
交流電源が前記負荷に印加するのを制御する電源印加手
段と、前記交流電源のゼロクロス部に同期した同期信号
を発生させる同期信号発生手段と、前記同期信号発生手
段が発生する同期信号を入力とし前記交流電源の周波数
を判定する周波数判定手段と、前記負荷に印加する電圧
を設定する電圧設定手段と、前記周波数判定手段が発生
する周波数信号と電圧設定手段が発生する設定電圧信号
を入力とし交流電源のゼロクロス部から前記負荷に前記
交流電源を印加するまでの時間を計算する遅れ時間計算
手段と、前記遅れ時間計算手段が計算した遅れ時間信号
と前記同期信号を入力とし、交流電源のゼロクロス部か
ら遅れ時間までは前記負荷に交流電源を印加しない制御
信号を前記電源印加手段に出力し、遅れ時間以後は前記
負荷に交流電源を印加する制御信号を前記電源印加手段
に出力する制御信号出力手段を有することを特徴とする
位相制御装置。an alternating current power source, a load driven by the alternating current power source, a power applying means for controlling application of the alternating current power source to the load, and a synchronizing signal generating means for generating a synchronizing signal synchronized with a zero cross section of the alternating current power source. , a frequency determining means for inputting a synchronizing signal generated by the synchronizing signal generating means and determining the frequency of the AC power source; a voltage setting means for setting a voltage to be applied to the load; and a frequency signal generated by the frequency determining means. and a delay time calculation means for calculating the time from the zero cross point of the AC power supply to the application of the AC power to the load by inputting the set voltage signal generated by the voltage setting means; and the delay time calculated by the delay time calculation means. The signal and the synchronization signal are input, and a control signal is output to the power supply means that does not apply AC power to the load from the zero cross point of the AC power supply until a delay time, and after the delay time, AC power is applied to the load. A phase control device comprising control signal output means for outputting a control signal to the power supply means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24823085A JPS62107315A (en) | 1985-11-06 | 1985-11-06 | Phase control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24823085A JPS62107315A (en) | 1985-11-06 | 1985-11-06 | Phase control device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62107315A true JPS62107315A (en) | 1987-05-18 |
Family
ID=17175103
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24823085A Pending JPS62107315A (en) | 1985-11-06 | 1985-11-06 | Phase control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62107315A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6430457A (en) * | 1987-07-22 | 1989-02-01 | Mitsubishi Electric Corp | Phase controller |
JPS6430458A (en) * | 1987-07-22 | 1989-02-01 | Mitsubishi Electric Corp | Three-phase ac phase controller |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5828591B2 (en) * | 1976-11-24 | 1983-06-16 | シャープ株式会社 | Drive circuit for thin film EL element |
-
1985
- 1985-11-06 JP JP24823085A patent/JPS62107315A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5828591B2 (en) * | 1976-11-24 | 1983-06-16 | シャープ株式会社 | Drive circuit for thin film EL element |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6430457A (en) * | 1987-07-22 | 1989-02-01 | Mitsubishi Electric Corp | Phase controller |
JPS6430458A (en) * | 1987-07-22 | 1989-02-01 | Mitsubishi Electric Corp | Three-phase ac phase controller |
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