JP3391180B2 - Inverter device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter device, and more particularly to improvement of detection of output current in a high frequency range.

[0002]

2. Description of the Related Art FIG. 13 is a block diagram of an inverter device according to a conventional triangular wave PWM control system. In the figure, 1 is a main circuit of an inverter device, 2 is an induction motor controlled by the inverter device, 3 is current detection means for detecting an output current of the inverter, 7 is triangular wave generation means, 8 is dead time generation means, and 9 is PWM creating means, 10 is a voltage command creating means, and 11 is a frequency setting means.

The operation of the conventional inverter device based on the triangular wave PWM control method will be described. First, based on the frequency command (indicated as f command in the figure) set by the frequency setting unit 11, the voltage command creating unit 10 creates three-phase voltage commands eu * to ew *. The PWM creating means 9 compares the three-phase voltage commands eu * to ew * with the triangular wave carrier ec created by the triangular wave generating means 7,
Create a three-phase PWM signal. Dead time creation means 8
Then, dead time for preventing arm short circuit is inserted from the PWM signal, and the six switching elements forming the main circuit 1 of the inverter device are driven by the signal.

FIG. 14 is a diagram showing a switching signal and a current fetch timing of a conventional inverter device. In the figure, 24 is a triangular wave carrier ec, 40 is a three-phase voltage command created by the voltage command creating means 10, and here the U-phase voltage command eu * is shown as a representative. 41
Is U-phase upper arm switching signal Tu +, and 42 is U
The lower arm switching signal Tu-, 43 is the output current of the inverter device, and 44 is the detection current obtained by detecting only the fundamental wave component of the output current of the inverter.

By comparing the U-phase voltage command eu * 40 with the triangular wave carrier ec24 created by the triangular wave generating means 7, the U-phase upper and lower arm switching signals Tu are compared.
Create +41 and Tu-42. That is, the voltage command e
When u * 40 is larger than the triangular wave carrier ec24, the U-phase upper arm switching element Tu + 41 is
When it is small, the switching element Tu- of the lower arm of the U phase
42 is controlled to be turned on. Of course, when one arm is on, the other arm is off. However, the dead time (arm short-circuit prevention time) for preventing the upper and lower arms from being short-circuited is omitted in the figure.

When such control is performed, the output current of the inverter is pulsed up and down in accordance with ON / OFF of the switching element of the inverter, and has a waveform 43 including the frequency component of the triangular wave carrier.

Therefore, in the detection of the output current of the conventional inverter device, the current detecting means 3 is the triangular wave generating means 7.
Input a triangular wave peak / valley signal that is synchronized with the peaks and valleys of the triangular wave carrier, and use this triangular wave peak / valley signal as a trigger to sample the output current of the inverter device and determine the frequency of the triangular wave carrier. Only the fundamental wave component from which the component has been removed is detected by the inverter
Is detected as.

FIG. 15 is a diagram showing a detected current waveform in a high frequency range of a conventional inverter device. In the figure, 30 is the output current of the inverter device, and 31 is the detected current of the inverter device.

[0009]

In the current detection of the conventional inverter device as described above, when the output frequency becomes high when the triangular wave carrier frequency is constant, the number of triangular waves for one cycle of the output voltage of the inverter device becomes large. Decreased,
The number of switchings in one cycle also decreases. As a result, the output current 30 of the inverter device is distorted as shown in the figure, and the detected current 31 of the inverter device detected by the current detection means 3 of the conventional inverter device is an effective value different from the actual output current 30 including distortion. However, there was a problem in that

The present invention has been made in order to solve the above problems. A first object of the present invention is not to be influenced by current distortion in a high frequency range and to accurately output current of only fundamental wave component. To obtain an inverter device capable of detecting

A second object is to obtain an inverter device capable of accurately detecting the output current of only the fundamental wave component by utilizing the conventional structure as much as possible.

[0012]

In the inverter device according to the present invention, six switching elements form one upper and lower pair.
A main circuit forming a number of arms, and the frequency setting means for setting a frequency of operation, is set in the frequency setting means
Voltage to create a three-phase voltage command based on the specified frequency command
And command generating means, and a clock generator, a clock divider means for dividing a clock output from the clock generating means, the divided clock with the clock divider means
Triangular wave generating means for creating a triangular wave carrier using
Comparing the three-phase voltage command and the triangular wave carrier,
PWM creating means for creating a three-phase PWM signal, and this 3
Dead-time to prevent arm short circuit in phase PWM signal
3 phase PWM signal with dead time and dead time
No. 6 switchings that make up the main circuit
A dead time generating means for driving the element, and
Variable speed AC motor with variable voltage for induction motor
An inverter apparatus for controlling, based on the frequency command output from the frequency setting means, and a clock correcting means for correcting the clock output from the clock divider means, triggered by the clock output from the clock correction means, And a current detecting means for detecting a current.

Further, the clock correction means is provided with a shift amount.
And a first frequency and a second frequency for switching the shift amount
Together to be able to set the number, based on the frequency command output from the frequency setting means, the first frequency
Up to a number of clocks output from the clock divider
To the second frequency from the first frequency.
During the period up to the wave number, it is output from the clock frequency dividing means.
Change the clock linearly between 0 and the set shift amount.
Output by shifting by the shift amount found by
When the frequency exceeds 2, the clock output from the clock frequency dividing means is shifted by the set shift amount and output.

Furthermore, the clock correction means, based on the frequency command output from the circumferential <br/> wavenumber setting means, before select the clock output from the <br/> clock dividing unit
By outputting to the current detection means, in the case of high frequency
Is to increase the number of triggers for current detection
In addition, the current detection means is configured to equalize the current detection value with the detection value.
This is to calculate the uniformity and output the averaged detection current.

Further, the inverter device according to the present invention is
3 arms with 6 switching elements to make one upper and lower pair
A main circuit which constitutes a frequency setting means for setting a frequency of operation, the frequency fingers set by the frequency setting means
A voltage command creator who creates a three-phase voltage command based on the decree
The stage, the clock generating means, and the clock generating means
A clock divider that divides the output clock
Using the clock divided by the clock dividing means
A triangular wave generating means for creating an angular wave carrier and the three-phase
Comparing the voltage command and the triangular wave carrier, PW of three phases
PWM creating means for creating an M signal and this three-phase PWM
Insert dead time in the signal to prevent arm short circuit
However, depending on the three-phase PWM signal with dead time inserted,
Drive the six switching elements that make up the main circuit.
A dead time creating means for moving a variable frequency,
Variable speed control of an induction motor with variable voltage AC power
In the inverter device, for the current detection means for detecting the current and the first coefficient for multiplying the detected current and the coefficient switching
Allows you to set the third and fourth frequencies of
Together with the frequency finger output from the frequency setting means.
Command is output from the current detecting means up to the third frequency.
The detected current applied is output as it is, and the third frequency is output.
To the fourth frequency, the current detection means
The detected current output from the
Multiply the coefficient obtained by linearly changing between
Output in case of exceeding the fourth frequency,
The detection current output from the current detection means is set to the above
And a current correction means for multiplying and outputting the detected current as a first coefficient .

[0016]

Furthermore, the current correction means is an inverter.
A second coefficient for multiplying the detected current by the capacity of the data device.
Set the first and second capacity for switching the number and coefficient.
The inverter device
A coefficient by which the amount is multiplied by the detected current up to the first capacitance.
Using the set first coefficient as
Between the capacity and the second capacity, the set first
A linear change is made between the coefficient of 1 and the set second coefficient.
When the coefficient obtained by using the above is used and the second capacity is exceeded
Is set to use the second coefficient set above.
It is a thing.

[0018]

DETAILED DESCRIPTION OF THE INVENTION

First Embodiment of the Invention FIG. 1 is a configuration diagram of an inverter device according to an embodiment of the present invention.
Nos. 3 and 7 to 11 are the same as the conventional device, and the description thereof is omitted. 4 is clock correction means, 5 is clock generation means,
Reference numeral 6 is a clock frequency dividing means, and 12 is a current detection signal generating means including a clock correcting means 4, a clock generating means 5, and a clock frequency dividing means 6. Also, CK0, CK1, CK2
And CK4 are clocks.

The clock dividing means 6 divides the clock output from the clock generating means 5, and outputs the clock CK1 to the clock correcting means 4 and the clock CK2 to the triangular wave generating means 7. The clock correction means 4 fetches the f command (frequency command) output from the frequency setting means 11,
Based on the frequency, the clock CK1 output from the clock frequency dividing means 6 is corrected and the optimum clock is output as a trigger of the current detecting means 3.

FIG. 2 is a block diagram of the clock correction means 4 of the inverter device according to the embodiment of the present invention.
FIG. 6 is a diagram showing a time chart of the clock correction adjusting means 4 of the inverter device according to the embodiment of the present invention. In the figure, 20 is a clock CK0 having a frequency twice that of a clock CK1 described later, 21 is a clock CK1 input to the clock correction adjusting means 4, and 22 is a half of the clock CK1.
The double frequency clocks CK2 and 23 are the clock CK3 which is obtained by shifting the clock CK1 by a certain time.

In the clock correction means 4, the f command output from the frequency setting means 11 is fetched, and if the output frequency is a low frequency based on the frequency, the clock CK1 output from the clock frequency dividing means 6 is used as it is. CK4, and when the output frequency becomes high frequency, the clock C output from the clock frequency dividing means 6
The clock CK3 obtained by shifting K1 by the shift circuit is output as the clock CK4. It should be noted that the shift time of the clock CK3 is selected as an optimum time according to the output frequency.

FIG. 4 is a diagram showing the relationship of selecting the shift time of the clock CK3 of the inverter device according to the embodiment of the present invention. As shown in the figure, when the output frequency is less than 100 Hz, it is 0, when it is 100 Hz to 200 Hz, it is changed linearly, and when it is 200 Hz or more, the value is A.
Here, the value of A as the optimum time is, for example, a value of 1/4 cycle of the triangular wave carrier. In the figure, the first frequency
100 Hz, 200 Hz as the second frequency,
An example in which the shift amount is A is shown.

When the output frequency is a low frequency, the clock C
K1 is used, the output current is sampled by the clock rising trigger (corresponding to the peaks and valleys of the triangular wave), and
When the output frequency is a high frequency, the timing of sampling the output current can be changed by using the clock CK3 obtained by shifting the clock CK1 by a certain time.

FIG. 5 is a diagram showing an output current detection waveform in a high frequency range of the inverter device according to the embodiment of the present invention. In the figure, 30 is an actual output current of the inverter device, and 32 is a current detection waveform obtained by sampling the output current using the clock CK3 obtained by shifting the clock CK1 by a certain time. In the current detection waveform 32, the position of the trigger for sampling the output current is shifted according to the output frequency, so that it is possible to prevent detection of the o-shaped protrusion in the actual output current 30. Since the fundamental wave component can be detected with high accuracy,
The actual value of the output current does not cause a large error as compared with the true value, and the current can be detected with high accuracy.

Second Embodiment of the Invention FIG. 6 shows the clock correction means 4 of the inverter device according to the embodiment of the present invention.
It is a block diagram of.

The clock correction means 4 outputs the clock CK1 as it is as the clock CK4 when the output frequency is a low frequency, and when the output frequency is a high frequency, the clock CK0 having a frequency twice that of the clock CK1 is used as the clock CK4. Output as.

When the output frequency is a low frequency, the clock C
The output current is sampled by the rising trigger of K1 (corresponding to the peaks and valleys of the triangular wave), and when the output frequency is high frequency, the clock C having twice the frequency of the clock CK1 is used.
By sampling the output current at K0, the number of triggers for detecting the output current when the output frequency is high can be doubled.

FIG. 7 is a diagram showing an output current detection waveform in the high frequency range of the inverter according to the embodiment of the present invention. In the figure, 30 is the actual output current of the inverter device, 33 is the detection current at the detection points marked with Δ, and 34 is
Is the detected current that has been averaged.

If the number of detection points is doubled, the detected current waveform will be more closely related to the actual output current waveform. However, the detected current waveform at this time contains harmonic components (pulsation), and the effective current value It is not so preferable from the viewpoint of detection. Therefore, as shown in the figure, the detection current is averaged with the previous detection value, and a process for reducing this pulsation is added. Although this averaging process causes a slight detection delay, it is possible to detect the current closer to the true value as compared with the conventional detection method.

In the above-described embodiment, an example in which the clock CK0 having a frequency twice that of the clock CK1 is used has been shown, but the frequency is not necessarily limited to twice.

In the above-described embodiment, it is not necessary to provide a shift circuit for changing the shift time according to the output frequency, as compared with the first embodiment, and the current of the fundamental wave component with a higher accuracy can be obtained with a simpler circuit configuration. It can be detected.

Third Embodiment of the Invention FIG. 8 is a configuration diagram of an inverter device according to an embodiment of the present invention. In the figure, 1 to 3 and 7 to 11 are the same as the conventional device,
The description is omitted. Reference numeral 13 is a current correction means.

FIG. 9 is a configuration diagram of the current correction means 13 of the inverter device according to the embodiment of the present invention. In the figure, reference numeral 50 is a coefficient calculating means for calculating a coefficient K by which the detected current is multiplied. The coefficient K varies linearly with the output frequency and is selected according to the output frequency.

FIG. 10 is a diagram showing the relationship between the output frequency and the coefficient K of the inverter device according to the embodiment of the present invention. In the figure, as an example of the relationship between the output frequency and the coefficient K, when the output frequency is less than 100 Hz, K =
An example is shown in which the coefficient K is linearly changed at 1.0 and 100 Hz to 200 Hz, and K = 0.8 at 200 Hz or higher. In the figure, 100H is set as the first frequency.
z, 200 Hz as the second frequency, multiplied by the detected current
An example in which the first coefficient is K = 0.8 is shown.

In the above-described embodiment, it is possible to detect the current of the fundamental wave component with higher accuracy with a simpler circuit configuration than in the first and second embodiments.

Fourth Embodiment of the Invention FIG. 11 is a configuration diagram of the current correction means 13 of the inverter according to the embodiment of the present invention. In this embodiment, the ROM has a coefficient table, and the coefficient by which the detected current is multiplied is changed according to the output frequency and the capacity of the inverter device.

FIG. 12 is a diagram showing the relationship between the final value of the coefficient K of the inverter and the capacity of the inverter device according to the embodiment of the present invention.

In FIG. 12, the coefficient K shown in FIG.
Final value K = 0.8, and when the capacity of the inverter device is less than 7.5 KW, K = 0.8, 7.5 KW to 75 K
When W, the coefficient K is changed linearly.
This is an example in which = 0.7. In the figure,
In the capacity of the data device, the first capacity is 7.5K
W, 75 kW as the second capacity, the first multiplied by the detection current
Example where K = 0.8 and the second coefficient is K = 0.7
showed that.

Since the coefficient by which the detected current is multiplied takes into consideration not only the current frequency but also the capacity of the inverter device, it is possible to detect the current of the fundamental wave component with higher accuracy than in the third embodiment of the invention. Is.

In the above-described embodiment, the hardware configuration is shown, but the same effect can be obtained by using a microprocessor with software.

By combining the above-described embodiments, it is possible to detect the current of the fundamental wave component with higher accuracy.

[0042]

Since the present invention is constructed as described above, it has the following effects.

Since the timing of sampling the output current is changed in accordance with the output frequency, the detected current can be substantially brought close to the fundamental wave component, and the current of the fundamental wave component can be detected with high accuracy. is there.

Further, since the position of the trigger for sampling the output current is shifted according to the output frequency, it is possible to shift the distortion of the current waveform in the high frequency range from the detection point.

Further, since the number of triggers for sampling the output current is changed according to the output frequency and the detected currents are averaged, it is possible to reduce the influence of the distortion of the current waveform.

Further, since the detected current is multiplied by the coefficient which varies depending on the output frequency based on the output frequency, the effective value of the output current can be brought close to the true value with a simple structure.

[0047]

Furthermore, since the detected current is multiplied by a coefficient that changes depending on the output frequency and the capacity of the inverter device based on the output frequency and the capacity of the inverter device, the influence of the capacity of the inverter device can be avoided. It is possible.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an inverter that is an embodiment of the present invention.

FIG. 2 is a configuration diagram of a clock compensating means 4 of an inverter which is an embodiment of the present invention.

FIG. 3 is a diagram showing a time chart of the clock correction means 4 of the inverter according to the embodiment of the present invention.

FIG. 4 is a diagram showing a relationship of selecting a shift time of a clock CK3 of the inverter device according to the embodiment of the present invention.

FIG. 5 is a diagram showing an output current detection waveform in a high frequency range of the inverter according to the embodiment of the present invention.

FIG. 6 is a configuration diagram of the clock correction means 4 of the inverter according to the embodiment of the present invention.

FIG. 7 is a diagram showing an output current detection waveform in a high frequency range of the inverter according to the embodiment of the present invention.

FIG. 8 is a configuration diagram of an inverter according to an embodiment of the present invention.

FIG. 9 is a configuration diagram of a current correction unit 13 of the inverter according to the embodiment of the present invention.

FIG. 10 is a diagram showing a relationship between an output frequency and a coefficient K of the inverter device according to the embodiment of the present invention.

FIG. 11 is a configuration diagram of a current correction unit 13 of the inverter according to the embodiment of the present invention.

FIG. 12 is a diagram showing the relationship between the final value of the coefficient K of the inverter and the capacity of the inverter device according to the embodiment of the present invention.

FIG. 13 is a configuration diagram of an inverter based on a conventional triangular wave PWM control method.

FIG. 14 is a diagram showing a switching signal and a current fetch timing of a conventional inverter.

FIG. 15 is a diagram showing a detected current waveform in a high frequency range of a conventional inverter.

[Explanation of symbols]

1 inverter main circuit, 2 induction motor, 3 current detection means, 4 clock compensation means, 5 clock generation means, 6 clock frequency division means, 7 triangular wave generation means, 8 dead time generation means, 9 PWM generation means, 10 voltage command Creating means, 11 Frequency generating means, 12 Current detection signal generating means, 13 Current correcting means, 20 Trigger timing, 21 Trigger timing, 22 Triangular wave creation clock, 23 Trigger timing, 24 Triangular wave, 30 Actual output current in high frequency range , 31 detected current, 32 detected current by shifted detection point, 33 detected current by detected point (△ mark), 34 detected current by averaging, 40 U-phase voltage command, 41 U-phase upper arm switching signal, 42 U-phase lower arm switching signal, 43 low frequency actual Power current, 44
Detected current in low frequency range, 50 coefficient calculation means.

Claims (5)

(57) [Claims] 1. An upper and lower pair of six switching elements.
Based on the main circuit that configures the three arms, the frequency setting means that sets the operating frequency, and the frequency command set by the frequency setting means,
A voltage command generating means for generating a voltage command of a three-phase, a clock generator, a clock divider means for dividing a clock output from the clock generating means, the frequency division of this clock dividing unit
Triangular Wave Carrier to Create Triangle Wave Carrier
Wave generating means, comparing the three-phase voltage command and the triangular wave carrier,
PWM creating means for creating a 3-phase PWM signal, and a device for preventing an arm short circuit in the 3-phase PWM signal.
3 phase P with dead time inserted and dead time inserted
The six switches that make up the main circuit are generated by the WM signal.
Dead time generating means for driving the pendulum element, and induction power is generated by AC power of variable frequency and variable voltage.
In an inverter device for variable speed control of a motive, a clock correction unit for correcting a clock output from the clock frequency dividing unit based on a frequency command output from the frequency setting unit, and a clock output from the clock correction unit An inverter device comprising: a current detection unit that detects a current by using as a trigger. 2. The clock correction means comprises a shift amount and a first frequency for switching the shift amount.
It is possible to set the frequency of 2 and output from the clock frequency dividing means up to the first frequency based on the frequency command output from the frequency setting means.
The clock that is output is output as it is, and between the first frequency and the second frequency,
The clock output from the clock frequency dividing means
The shift obtained by linearly changing between the set shift amounts.
Output by shifting the clock frequency by a predetermined amount, and when the second frequency is exceeded, the clock output from the clock frequency dividing means is shifted by the set shift amount.
The inverter device according to claim 1, wherein the inverter device shifts the output only . 3. The clock correction means selects a clock output from the clock frequency dividing means based on a frequency command output from the frequency setting means to select the current.
By outputting to the detection means, in case of high frequency current
The number of triggers for detection is increased, and the current detection means detects the average value of the current detection value and the detection value.
Is calculated, this was designed to output the detected current averaged <br/> the inverter apparatus according to claim 1, wherein. 4. Six switching elements form one set above and below.
Based on the main circuits that form the three arms, the frequency setting means that sets the operating frequency, and the frequency command set by the frequency setting means,
A voltage command creating means for creating a three-phase voltage command, a clock generating means, and a clock output from the clock generating means are frequency-divided.
Clock dividing means and the clock dividing means
Triangular Wave Carrier to Create Triangle Wave Carrier
Wave generating means, comparing the three-phase voltage command and the triangular wave carrier,
PWM creating means for creating a 3-phase PWM signal, and a device for preventing an arm short circuit in the 3-phase PWM signal.
3 phase P with dead time inserted and dead time inserted
The six switches that make up the main circuit are generated by the WM signal.
Dead time generating means for driving the pendulum element, and induction power is generated by AC power of variable frequency and variable voltage.
In an inverter device for variable speed control of a motive, a current detecting means for detecting a current, a first coefficient for multiplying the detected current, and a first coefficient switching coefficient.
Third frequency and to allow the fourth set the frequency of bets
The frequency command output from the frequency setting means
However, up to the third frequency, output from the current detection means
The detected current is output as it is, and the detected current is output as it is from the third frequency to the fourth frequency.
The detection current output from the current detection means has 1 to
The coefficient obtained by linearly changing between the determined first coefficients
The current is multiplied as a detection current and output as a detection current, and when it exceeds the fourth frequency, the current detection means
The detected current output from the set first coefficient
An inverter device comprising: a current correction unit that multiplies by and outputs as a detection current . 5. The current correction means enables setting of a second coefficient by which the detected current is multiplied by the capacity of the inverter device and a first capacity and a second capacity for coefficient switching, and the inverter is also provided. If the capacity of the device is up to the first capacity,
The first coefficient set as the coefficient by which the detected current is multiplied.
Number, and between the first capacity and the second capacity, the
A line between the determined first coefficient and the set second coefficient
When the coefficient obtained by changing the shape is used and the second capacity is exceeded, the set second
5. The coefficient according to claim 4 is used.
Inverter device described.