JPH08222550A - Planarization of coating insulating film - Google Patents

Abstract

PURPOSE: To provide a simple and secure technique for removing thick portions of peripheral portions of a coating insulating film made of SOG and the like. CONSTITUTION: An organic polymer layer 7 is formed on a coating insulating film 6, and peripheral portions of the organic polymer layer 7 are removed by an edge bead remover. Using the organic polymer layer 7 as a mask, the coating insulating film 6 is etched. On this stage, constant-velocity etch back may be performed on the organic polymer layer 7 and the coating insulating film 6. Also, heat treatment may be performed on the coating insulating film so as to make the film inorganic and fine, after the organic polymer layer is rotally removed. Thus, as the peripheral portions of the organic polymer layer are removed by the edge bend remover, the technique for removal is very simple without employing lithography. Since peripheral thick portions of the coating insulating film are removed by etching, these portions can be securely removed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of flattening a coating insulating film applied in the field of manufacturing semiconductor devices and the like. More specifically, the thickness of the coating insulating film at the peripheral edge of the substrate formed by spin coating. The present invention relates to a method for flattening a coated insulating film capable of reliably and easily removing a portion.

[0002]

2. Description of the Related Art With the progress of higher integration of semiconductor devices such as LSIs, the design rules of internal wiring are becoming finer and more and more toward multilayer. While such a high degree of integration contributes to high performance of the semiconductor device, it may cause a decrease in its reliability. This is because the step of the interlayer insulating film formed on the lower layer wiring becomes large and steep, which causes a problem in step coverage and processing accuracy of the upper layer wiring formed on the interlayer insulating film. Further, in the lithography of a resist layer on a high stepped base, the D
There is also a decrease in OF (Depth of Focus) margin, which adversely affects the patterning accuracy of the resist mask. Therefore, planarization of the interlayer insulating film is one of the key processes that must be established by all means in order to improve the reliability of highly integrated semiconductor devices.

Conventionally, for flattening an interlayer insulating film of a semiconductor device, a coating insulating film by SOG (Spin on Glass) spin coating has been widely put into practical use because of its simplicity. SOG is a silanol bond (Si-
It is a generic term for a coating liquid having a silicon compound having at least one (OH bond) in the molecule as a main component and dissolving this in a solvent such as alcohol, or an insulating film obtained by coating and baking the coating liquid. SOG is roughly classified into inorganic SOG and organic SOG, and each has its own characteristics. Of these, inorganic SOG
Is a silicon compound having no organic group in the molecule, for example, one containing Si (OH) ₄ as a main component. Since there is no organic component in the film, high temperature heat treatment at about 1000 ° C. is possible, and the film quality is close to that of SiO ₂ by thermal oxidation and is dense and good. However, if the film thickness is increased to about 500 nm or more, deposition shrinkage and cracks are likely to occur during heat treatment. Therefore, only a thin coating insulating film can be put into practical use, and it is not suitable for flattening a high stepped base.

The other organic SOG is R _n Si (OH) _4-n (R is an organic group such as an alkyl group or an alkoxy group, which is a silicon compound having an organic group in the molecule, and n is a natural number of 1 to 4). Representation) is the main component. Since it has an organic component, even if it is applied thickly, cracks are unlikely to occur in the film,
Further, the flattening effect is good even if the base has a high step. However, in order to avoid the thermal decomposition of the organic component, the heat treatment temperature is required to be relatively low, for example, 500 ° C. or less, and the film quality and the corrosion resistance of the adjacent wiring material such as Al-based metal are insufficient. . Therefore, organic SOG
In combination with the etch-back process after film formation, measures are taken such as leaving only in the stepped recesses of the underlying substrate and further stacking an insulating film of good film quality by CVD or the like. In recent years, organic S
Attempts have also been made to improve the film quality by making the OG coating film inorganic. That is, the organic SOG coating film is 85
A heat treatment is performed at about 0 ° C. to remove the organic groups as CO ₂ and H ₂ O, and the remaining silicon atoms are converted to SiO ₂ . In addition to SOG, heat-resistant polymer such as polyimide may be used as the coating insulating film.

Under the present circumstances, the coating insulating film such as SOG is put to practical use while supplementing the characteristics in this way. However, the problems with spin coating still remain. It is a problem that the film thickness of the coating insulating film at the peripheral portion of the substrate is thicker than that at the central portion of the substrate due to centrifugal force and surface tension. This is called an edge built-up phenomenon, etc., and cracks are likely to occur in this portion during the subsequent heat treatment. Also, when handling the substrate after forming the coated insulating film, the thick portion of the peripheral edge of the substrate comes into contact with a jig such as a carrier, and the thick coated insulating film in this portion is scraped or peeled off, which causes particle contamination. . Therefore, there is a concern that the yield and reliability of the manufacturing process of semiconductor devices and the like may be reduced.

As a method of removing the coated insulating film on the peripheral portion of the substrate, there is a method of performing edge rinse after spin coating and before heat treatment. However, since the applied insulating film has a high viscosity, it is difficult to remove it stably by edge rinse, and even if it can be removed, a thick portion may be newly formed inside the peripheral edge.

As another method for removing the coating insulating film on the peripheral portion of the substrate, a resist layer is formed on the entire surface of the coating insulating film, and then exposed and developed to remove the resist layer on the peripheral portion of the substrate, and the resist layer is used as a mask to form the substrate. There is also a method of etching the coated insulating film on the peripheral portion. Although this method can reliably remove the coated insulating film on the peripheral edge of the substrate, it requires the addition of processes such as exposure and development, which offsets the simplicity of the process, which is the feature of planarization by the coated insulating film. Become.

[0008]

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems of the prior art, and to provide a simple and reliable means for forming a thick portion at the peripheral portion of the substrate of a coating insulating film such as SOG. The purpose of the present invention is to provide a method for planarizing a coated insulating film that can be removed by.

Another object of the present invention is a method of planarizing a coated insulating film which can prevent cracks in the coated insulating film and can realize a highly reliable manufacturing process for semiconductors and the like without fear of particle contamination. Is to provide.

[0010]

The method for flattening a coated insulating film according to the present invention was devised to solve the above-mentioned problems. That is, spin coating the coating insulating film on the substrate,
A flattening method of a coating insulating film, which selectively removes a thick portion of the coating insulating film on the peripheral edge of the substrate, which comprises a step of forming an organic polymer layer on the entire surface of the coating insulating film, and an organic high layer on the peripheral edge of the substrate. The method is characterized in that a step of selectively removing the molecular layer by edge rinsing and a step of selectively removing the coating insulating film exposed from the organic polymer layer by etching are performed in this order.

The method of flattening the coated insulating film of the present invention is
After the step of selectively etching away the coating insulating film exposed from the organic polymer layer described above, a step of removing the organic polymer layer and a step of heat-treating the coating insulating film are performed in this order. It is what

The step of removing the organic polymer layer may be a step of etching back the organic polymer layer and the coating insulating film at a constant rate. The organic polymer layer used in the present invention may be formed of a normal resist or a general polymer material having no photosensitivity. However, since the organic polymer layer cured by the crosslinking reaction is difficult to remove by edge rinse,
Exclude this.

[0013]

The essence of the method for flattening a coated insulating film of the present invention is that the means for selectively removing the thick portion of the coated insulating film at the peripheral edge of the substrate is such that when the organic polymer layer is used as a mask for etching removal, The edge of the substrate of the organic polymer layer is selectively removed by edge rinsing, and the coated insulating film is removed by etching using this as a mask.

As a conventional flattening method of the coating insulating film, as described above, the resist layer formed on the entire surface of the coating insulating film is selectively exposed and developed to remove the resist layer at the peripheral portion of the substrate, Using this as a mask, the coating insulating film on the peripheral portion of the substrate has been removed. In the present invention, as a means for removing the organic polymer layer at the peripheral portion of the substrate, a simple means called edge rinse is adopted instead of exposure and development, thereby eliminating the complication of the process.

As described above, there have been attempts to remove the peripheral thick portion by edge-rinsing the coated insulating film itself after the spin coating of the coated insulating film and before the heat treatment. However, in this case, a basically viscous coating film such as SOG must be directly edge rinsed, and stable removal is difficult, and even if it can be removed, a thick portion is newly formed inside the substrate periphery. It was sometimes formed. In the present invention, since the coating layer removed by edge rinse is an organic polymer layer such as a resist,
The viscosity is much smaller than that of G and the like, and removal of only the peripheral portion can be achieved without any problem. Further, during edge rinsing of the organic polymer layer, even if a thick portion of the organic polymer layer is newly formed inside the peripheral edge of the substrate, the organic polymer layer is to be removed finally, and as a mask. It does not adversely affect the function. In this manner, by using the organic polymer layer from which the edge of the substrate has been selectively edge-rinsed as a mask and etching the coating insulating film exposed from this organic polymer layer, the coating insulating film of the substrate periphery can be removed. It is possible to reliably remove the thick portion and achieve flattening.

According to the method of claim 2 of the present invention, after removing the coating insulating film on the peripheral portion of the substrate by etching, the organic polymer layer functioning as an etching mask is removed,
Furthermore, the applied insulating film is heat-treated. According to this method, the applied insulating film can be subjected to the mineralization treatment or the densification treatment by the heat treatment at this stage. On the other hand, in the stage of etching, the coating insulating film is not yet mineralized or densified, so that the film quality is weak and can be easily etched, which contributes to the simplicity of planarization.

In the method of the third aspect of the present invention, after the coating insulating film on the peripheral portion of the substrate is removed by etching, etching back is further performed under the condition that the etching rates of the organic polymer layer and the coating insulating film are constant. According to this method, the surface morphology of the organic polymer layer is transferred to the coating insulating film, and the bulk flatness of the coating insulating film in the central portion of the substrate is further improved. That is, since the organic polymer layer is formed by means of spin coating or the like on the coating insulating film originally formed for the purpose of flattening, the surface flatness is excellent. Therefore, it is possible to improve the bulk flatness of the coating insulating film by utilizing this surface morphology and transferring it to the coating insulating film by constant-rate etchback. After that, if heat treatment is applied to the coated insulating film, the film quality can be improved by the mineralization treatment or the densification treatment.

[0018]

EXAMPLES Specific examples of the present invention will be described below with reference to FIGS. 1 and 2A to 2E. In the following embodiments, a case where a coating insulating film is applied to the interlayer insulating film on the Al-based metal wiring and is planarized will be described as an example. As a sample, for example, an insulating film 3 of SiO ₂ or the like, an Al-based metal wiring 4 as a lower layer wiring, and a lower interlayer insulating film 4 of SiO ₂ are sequentially formed on a semiconductor substrate 2 of silicon or the like having a diameter of 8 inches. Using. This sample shown in FIG. 1 will be simply referred to as the substrate 1. FIG. 1 is an enlarged sectional view of a part of the substrate 1. The Al-based metal wiring 4 is, for example, 50
0.35 deposited by sputtering to a thickness of 0 nm
It is patterned into a line and space shape of nm. The lower interlayer insulating film 5 made of SiO ₂ is deposited by plasma CVD to have a thickness of 300 nm, for example. As a feature of plasma CVD, it is possible to form a SiO ₂ film having a good film quality at a relatively low temperature, but its surface shape is close to conformal, and the surface of the lower interlayer insulating film 5 is formed of an Al-based metal as shown in the figure. A step is formed that reflects the shape of the wiring 4.

Example 1 This example is an example in which organic SOG is used as a coating insulating film and planarization is performed. The substrate 1 shown in FIG. 1 is set in a commercially available ordinary spinner, and organic SOG is dropped at room temperature under a rotation speed of 2000 rpm to form a coating insulating film 6. After that, the coated insulating film 6 is pre-baked at 200 ° C.,
The solvent in the coating insulating film 6 is removed. This state is shown in Figure 2.
(A). As shown in the figure, a thick portion due to the edge built-up phenomenon is formed on the peripheral portion of the substrate 1.
In addition, in FIG. 1, a schematic cross section of the entire substrate 1 is shown.
Details of the Al-based metal wiring 4 and the lower interlayer insulating film 5 and the like therein are omitted. Further, a surface step of the lower interlayer insulating film 5 is formed on the surface of the substrate 1, but this is also omitted in the drawing. A thick portion peculiar to spin coating is formed on the coating insulating film 6 on the peripheral portion of the substrate. The thickness of the coating insulating film 6 in the central portion of the substrate is 500 nm as an example, and the flatness is good.

Next, the organic polymer layer 7 is also spin-coated on the coating insulating film 6. The organic polymer layer 7 may use a normal novolac-based positive resist, but it does not need to have photosensitivity and may be a normal polymer material. The thickness of the organic polymer layer 7 after drying is 80 as an example.
It is 0 nm, and the surface thereof is extremely flat. This state is shown in FIG. No baking treatment or the like that causes a crosslinking reaction is added to the organic polymer layer.

Next, the substrate 1 is set in a spinner and edge rinse is performed. The edge rinse is a process of dropping or ejecting a solvent such as a developing solution only on the peripheral portion of the substrate while rotating the substrate, and the dissolved organic polymer layer 7 on the peripheral portion is scattered and removed by centrifugal force. The width of the edge rinse is set to a width corresponding to the width of the thick portion of the coated insulating film 6, for example, 2.
5 mm. After that, the organic polymer layer 7 may be subjected to baking treatment such as pre-baking and post-baking to impart etching resistance. This state is shown in FIG. From the portion where the organic polymer layer 7 is removed, the peripheral thick wall portion of the coating insulating film 6 is exposed.

Using the organic polymer layer 7 as an etching mask,
The exposed portion of the coated insulating film 6 is removed by etching. The etching may be dry etching using F-based gas,
Wet etching with an HF aqueous solution is simple.
The state after etching is shown in FIG.

After that, the organic polymer layer is removed by ashing or the like, and the coated insulating film 6 is heat treated. This state is shown in FIG. Although the Al-based metal wiring is used as the lower wiring in this embodiment, when a wiring material having no problem in heat resistance such as refractory metal wiring is used, heat treatment is performed at about 850 ° C. in an oxidizing atmosphere. Alternatively, a mineralization treatment may be performed.

According to this embodiment, organic SOG, which is originally excellent in flatness, is used as the coating insulating film, and the thick portion at the peripheral edge of the substrate is removed to secure the flatness over the entire surface of the coating insulating film. It is possible. The thick portion of the coated insulating film is removed by etching using the organic polymer layer whose edge is rinsed to remove the peripheral portion as a mask. Therefore, the thick portion can be reliably removed without impairing the simplicity of the entire process.

Example 2 This example is an example in which inorganic SOG is used as a coating insulating film and planarization is performed. The substrate 1 shown in FIG. 1 is set in a commercially available ordinary spinner, and inorganic SOG is dropped at room temperature under a rotation speed of 2000 rpm to form a coating insulating film 6. After that, the coated insulating film 6 is pre-baked at 200 ° C.,
The solvent in the coating insulating film 6 is removed. This state is shown in Figure 2.
(A). Although a schematic cross section of the entire substrate 1 is shown in the figure, details of the Al-based metal wiring 4, the lower interlayer insulating film 5 and the like in the substrate 1 are omitted. Further, a surface step of the lower interlayer insulating film 5 is formed on the surface of the substrate 1, but this is also omitted in the drawing. A thick portion peculiar to spin coating is formed on the coating insulating film 6 on the peripheral portion of the substrate. The thickness of the coating insulating film 6 in the central portion of the substrate is 50 as an example.
It is 0 nm, and has a surface property slightly reflecting the step difference of the underlying lower insulating film 5.

Next, the organic polymer layer 7 is also spin-coated on the coating insulating film 6. The organic polymer layer 7 may use a normal novolac-based positive resist, but it does not need to have photosensitivity and may be a normal polymer material. The thickness of the organic polymer layer 7 after drying is 80 as an example.
It is 0 nm, and its surface is almost flat. This state is shown in FIG. The organic polymer layer is not subjected to any baking treatment or the like which causes a crosslinking reaction.

Next, the substrate 1 is set in a spinner and edge rinse is performed. The width of the edge rinse is a width corresponding to the width of the thick portion of the coated insulating film 6, and is 2.5 mm, for example. After that, the organic polymer layer 7 may be subjected to baking treatment such as pre-baking and post-baking to impart etching resistance. This state is shown in FIG. From the portion where the organic polymer layer 7 is removed, the peripheral thick wall portion of the coating insulating film 6 is exposed.

Using the organic polymer layer 7 as an etching mask,
The exposed portion of the coated insulating film 6 is removed by etching. The etching may be dry etching using F-based gas,
Wet etching with an HF aqueous solution is simple.
This state is shown in FIG.

After that, the entire surface is etched back under the condition that the organic polymer layer 7 and the coating insulating film 7 have the same etching rate.
The etch-back conditions were RIE using a mixed gas of F-based gas and O-based gas, and the following conditions were adopted as an example. CF ₄ gas flow rate 7 sccm O ₂ gas flow rate 50 sccm gas pressure 66.7 Pa RF power density 0.4 W / cm ² The surface of the coated insulating film 7 is slightly removed, for example, by 50 nm, and this etchback is performed. finish. After this, 45
The applied insulating film 6 is densified by heat treatment at about 0 ° C. This state is shown in FIG. Although the Al-based metal wiring is adopted as the lower layer wiring in this embodiment, when a wiring material having no problem in heat resistance such as refractory metal or refractory metal polycide wiring is adopted, it is 850 ° C. in an oxidizing atmosphere. The heat treatment may be performed to some extent to perform the mineralization treatment.

According to the present embodiment, the inorganic SOG having a slight problem in flatness is used as the coating insulating film to remove the thick portion at the peripheral portion of the substrate and to cover the entire surface of the coating insulating film in the central portion of the substrate. By performing the etch-back process, it is possible to secure flatness over the entire surface of the coated insulating film. The thick portion of the coated insulating film is removed by etching using the organic polymer layer whose edge is rinsed to remove the peripheral portion as a mask. Therefore, the thick portion can be reliably removed without impairing the simplicity of the entire process.

Although the present invention has been described with reference to the two examples, the present invention is not limited to these examples.

For example, although organic SOG and inorganic SOG are presented as the coating insulating film, an organic coating insulating film such as polyimide may be used. Although a novolac-based positive resist was used as the organic polymer layer formed on the coating insulating film, it does not have to be a photoresist having photosensitivity.
A general polymer material having no photosensitivity may be used as long as the organic polymer layer is subjected to edge rinsing and then the etching resistance of the exposed coating insulating film on the peripheral portion of the substrate is removed. When the constant velocity etchback of the organic polymer layer and the coated insulating film is adopted, the constant velocity etchback condition, for example, the mixing ratio of the mixed gas may be appropriately selected according to the material of the organic polymer layer.

[0033]

As is clear from the above description, according to the present invention, it is possible to flatten the coating insulating film by removing the peripheral portion of the substrate of the coating insulating film by a simple and reliable method.
Therefore, it is possible to provide a highly reliable manufacturing process of a semiconductor or the like without the risk of cracking of the coated insulating film and contamination of particles.

That is, according to the method of claim 1, the coating insulating film is removed by using the organic polymer layer, which is a peripheral edge portion of the substrate simply and selectively removed by edge rinsing, as a mask, thereby reliably removing the coating insulating film. It is possible to remove the thick portion and flatten the applied insulating film.

According to the method of claim 2, the thick portion of the coated insulating film can be removed more easily, and at the same time, the coated insulating film can be made inorganic or densified.

Furthermore, according to the method of claim 3, the organic polymer layer used for removing the thick portion is used as it is as a mask for the constant velocity etchback, as well as the flattening by removing the thick portion on the peripheral portion of the substrate. Also, bulk flatness of the central portion of the substrate can be achieved. Further, since the resist coating for constant speed etch back can be omitted, it contributes to the improvement of throughput.

[Brief description of drawings]

FIG. 1 is a partially enlarged cross-sectional view of a substrate used for flattening a coated insulating film of the present invention.

2A and 2B are schematic cross-sectional views showing a method for planarizing a coated insulating film of the present invention, where FIG. 2A is a state in which the coated insulating film is formed on a substrate, and FIG. 2B is an organic polymer on the entire surface of the coated insulating film. A state in which a layer is formed, (c) is a state in which the organic polymer layer at the peripheral portion of the substrate is removed by edge rinse, and (d) is a thick portion in the peripheral portion of the coated insulating film exposed from the organic polymer layer, which is removed by etching. State (e) is a state in which the organic polymer layer has been removed and the planarization of the coating insulating film has been completed.

[Explanation of symbols]

 1 substrate 2 semiconductor substrate 3 insulating film 4 Al-based metal wiring 5 lower interlayer insulating film 6 coating insulating film 7 organic polymer layer

Claims (3)

[Claims] 1. A method of flattening a coated insulating film by spin-coating the coated insulating film on a substrate and selectively removing the coated insulating film at the peripheral edge of the substrate, wherein A step of forming a polymer layer; a step of selectively removing the organic polymer layer on the peripheral portion of the substrate by edge rinsing; and a step of selectively removing the coating insulating film exposed from the organic polymer layer by etching. A method for planarizing a coated insulating film, which comprises performing the steps in this order. 2. A step of selectively removing the coating insulating film exposed from the organic polymer layer by a step of removing the organic polymer layer and a step of heat-treating the coating insulating film in this order. The method for planarizing a coated insulating film according to claim 1, which is performed. 3. The flattening of the coating insulating film according to claim 2, wherein the step of removing the organic polymer layer is a step of etching back the organic polymer layer and the coating insulating film at a constant rate. Method.