JPH08213609A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PURPOSE: To manufacturing a CMOS dual gate transistor having high reliable operational characteristics by providing a thin film impurity mutual diffusion blocking layer. CONSTITUTION: The semiconductor device is provided with a gate oxide film 3 formed on a semiconductor substrate, a polysilicon layer 4 having n- or P-type conductivity formed on the gate insulating film 3, an impurity diffusion blocking layer made of an Si3 N4 film 6 (nitride film) in thickness not exceeding 100Å formed by processing the surface layer of the polysilicon layer 4. Furthermore, the Si3 N4 film 6 is formed, after introducing impurities into the polysilicon layer 4, by processing in nitrogen atmosphere containing NH4 as a component (the pressure is 1-10Torr, and the temperature is 900 deg.C) for 30 minutes.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for preventing interdiffusion (interdiffusion of impurities in a semiconductor material through a silicide compound) in a gate portion of a transistor, and more specifically, it relates to The present invention relates to formation of a (mutual) diffusion blocking layer for preventing n-type and p-type impurities introduced into a silicon gate from interdiffusing through a silicide compound provided on polysilicon.

[0002]

BACKGROUND ART Conventional CMOS dual gate transistors, Nch (P-well forming portion), Pch and the n ⁺ gate introducing the n-type impurity respectively in (N-well forming portion), p ⁺ gate introducing the p-type impurity And a silicide compound (often WSi) is formed on them.

[0003]

However, depending on the temperature at the time of WSi formation and the subsequent thermal process, n-type impurities and p
Since the type impurities diffuse into each other via WSi, the initially expected amount of impurities greatly changes when the threshold voltage (Vth) is set, resulting in a large change in Vth.

As a technique for solving such a problem, Japanese Patent Laid-Open No. 5-55562 discloses a technique of depositing a SiN film as a diffusion blocking layer after forming polysilicon. It is also known that nitrogen is ion-implanted from above polysilicon or a silicide compound to form a nitride layer as a diffusion blocking layer on the surface of polysilicon or at the interface between polysilicon and the silicide compound.

However, in the above technique, SiN
Since the film thickness is relatively thick at 500 to 1000Å and the film forming process is added, the process time becomes long and the cost is increased. In addition, in the above, since the nitrogen is introduced in the ion implantation process, the nitride layer is 200
There was a problem in that it was relatively widely distributed at ~ 500Å.

That is, in the above, the diffusion blocking layer is sufficient if Si and nitrogen form a strong network. Therefore, if Si ₃ N ₄ is formed,
A thickness of 00Å is sufficient, but in reality, a much thicker film is formed. Therefore, there is a problem that stress is likely to increase, and film peeling and abnormal diffusion due to stress are likely to occur.

Therefore, an object of the present invention is to provide a CMOS dual gate transistor and a method for manufacturing the same, which solves the above problems of the prior art.

[0008]

A semiconductor device according to claim 1, wherein a gate insulating film formed on a semiconductor substrate, a polysilicon layer having n-type or p-type conductivity formed thereon, and impurities. A semiconductor device having a diffusion blocking layer and a silicide compound is characterized in that the impurity diffusion blocking layer is formed of a partial nitride film of polysilicon.

According to another aspect of the semiconductor device of the present invention, a gate insulating film formed on a semiconductor substrate, a polysilicon layer having n-type or p-type conductivity formed thereon, an impurity diffusion blocking layer, and a silicide are formed. In the semiconductor device having a compound, the impurity diffusion blocking layer is formed by a partially carbonized film of polysilicon.

A semiconductor device according to a third aspect is the semiconductor device according to the first aspect.
Or 2, the impurity diffusion blocking layer has a thickness of 1
It is characterized in that it is less than 00Å.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the first aspect, wherein the nitride film forms an n-type or p-type polysilicon layer, and then the polysilicon film is formed. The layer is treated in a nitrogen atmosphere containing at least one of NH ₃ and N ₂ O as a component.

The method of manufacturing the semiconductor device according to the fourth aspect will be described in detail. Normally, when manufacturing the CMOS dual gate transistor of the present invention, Nc is usually used.
WSi (tungsten silicide) is added after doping arsenic, which is n-type conductive in the gate part of the h-transistor, and p-type boron, which is p-type conductive in the polysilicon part of the Pch transistor gate.
Are formed and annealed at about 900 ° C. for activation of impurities in each gate and control of the interface between polysilicon and WSi. At this time, arsenic in the n-type gate and boron in the p-type gate have a large diffusion coefficient in the WSi immediately above the arsenic, and thus interdiffuse through WSi. When the impurities of each gate move due to this mutual diffusion, the work function thereof changes and Vth changes. Further, since the resistance of the gate electrode is increased, the driving ability of the transistor is reduced. Therefore, according to the present invention, when the introduction of impurities into the polysilicon is completed, the surface nitriding treatment in NH ₃ or N ₂ O provides a higher degree of activation than the conventional one and, at the same time, the mutual diffusion blocking layer. Formation.

Surface nitriding is carried out by using NH ₃ and N ₂ as component gases.
It can be performed in an atmosphere of 900 to 1000 ° C. containing at least one of O. Si ₃ N ₄ film (nitride film) with a film thickness of about 50-100Å by surface nitriding treatment for 1 hour
Is formed. In addition, activation can be performed using WSi as in the conventional method.
If it is performed after the formation, the formation of Si ₃ N ₄ can also form a nitride film of 50 to 100 Å from the surface by annealing using an electron beam or a laser beam in the same atmosphere as described above. Further, Si ₃ N ₄ can also be formed by exposing it to plasma in the same atmosphere as described above. Plasma irradiation and beam annealing is 50
It is possible at a substrate temperature of 0 ° C. or lower, and there is almost no redistribution of impurities, and as a result, the influence on the transistor characteristics (particularly Vth) can be ignored.

According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fourth aspect, the treatment in the nitrogen atmosphere is
It is characterized in that it is performed in a plasma or a beam at a temperature of 800 ° C. or less.

[0015]

EXAMPLE Next, an example of the present invention will be described with reference to FIG.
(G)]. Example 1 A gate oxide film 3 having a thickness of 90 to 100 Å is formed on an N well 1 and a P well 2, and then a polysilicon layer 4 having a thickness of 2000 Å is formed [(a)]. In FIG. 1A, 5 is a field oxide film. Polysilicon film 4
Is ion-implanted under the conditions of 10 keV and 4E15 / cm ^{2 on} the entire surface of the substrate [(b)] and on the Nch side (P well 1 side).
Arsenic (As) is selectively applied to only the polysilicon of
v ion implantation under conditions of 3E15 / cm ² [(c)] and 900 ° C. in NH ₃ atmosphere (1 to 10 to
rr) for 30 minutes to perform nitriding treatment to form the polysilicon layer 4
A Si ₃ N ₄ film 6 is formed on the surface of the substrate [(d)]. In addition,
In FIG. 1C, 21 is a resist.

Thereafter, a W having a thickness of 700Å is sputtered.
A Six film 7 is formed, and an NSG film 8 having a thickness of 1000 Å is deposited [(e)]. After performing a gate-like etching on this laminated structure, the HTO is formed to a thickness of 15
Deposition to 00Å and etching back to form sidewalls 9 [(f)]. Furthermore, phosphorus is 40 ke
v (1e15 / cm ² ) and then obliquely ion implantation from an angle of 45 ° to selectively form the n ⁻ layer 10 only on the Nch side [(f)] and then arsenic (As) at 50 kev and 6E1.
The n ⁺ layer 11 is ion-implanted under the condition of 5 / cm ² and BF
₂ is ion-implanted under the conditions of 40 keV and 1E15 / cm ² to form p ⁺ layers 12, and then 850 ° C. × 2
Activation is performed by heat treatment for 0 minutes to form each transistor [(g)].

In FIG. 1 (d), 20 to 10
In the NH ₃ atmosphere of 0 torr, the outermost surface of polysilicon is
100m by excimer laser (krF, 248nm)
The Si ₃ N ₄ film 6 can also be formed by irradiating with J / cm ² . Also, instead of FIG.
By processing in a CH ₄ gas of 0 to 100 torr and in plasma, a SiCx film as a carbonized film can be formed. In this case, the other steps are the same as those shown in FIG. With such a carbonized film, Si
_{The same} effect as that of the ₃ N ₄ film can be obtained.

[0018]

As is apparent from the above description, in the semiconductor device according to the first and second aspects, by forming the interdiffusion blocking layer, Pch and N which are main factors of the fluctuation of Vth.
Since the movement of impurities in the ch gate can be suppressed, stable transistor operation can be obtained and high reliability can be secured. In the semiconductor device according to the third aspect, by forming the nitride film or the carbide film having a thickness of 100 Å or less, it is possible to form the diffusion blocking layer having less stress and having high reliability in the process formation. In the method of manufacturing a semiconductor device according to claim 4, NH ₃ or N ₂ O is used.
By using an atmosphere containing gas as a component,
S which is a stable diffusion blocking layer under the temperature condition of 900 ° C.
i ₃ N ₄ can be formed. In the method for manufacturing a semiconductor device according to claim 5, by forming a nitride film in plasma or in a beam (laser and electron beam, ion beam, etc.), a low temperature process of 800 ° C. or lower is possible, and it is required to be less than the quarter micron. A stable and highly reliable process that meets the needs of thin oxide film, shallow junction formation, and ensuring reliability due to low process temperature can be realized. The present invention is not limited to CMOS transistors,
It can also be applied to ASICs and memories.

[Brief description of drawings]

FIG. 1 is a process explanatory view showing an embodiment of a semiconductor device manufacturing method according to the present invention.

[Explanation of symbols]

1 N-well 2 P-well 3 Gate oxide film 4 Polysilicon layer 5 Field oxide film 6 Si ₃ N ₄ film 7 WSix film 8 NSG film 9 Sidewall 10 n ^- layer 11 n ⁺ layer 12 p ⁺ layer 21 Resist

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁶ Identification number Internal reference number FI Technical indication 613 B (72) Inventor Eiji Mochizuki 1-3-6 Nakamagome, Ota-ku, Tokyo Within Ricoh Co., Ltd.

Claims (5)

[Claims] 1. A semiconductor device having a gate insulating film formed on a semiconductor substrate, a polysilicon layer having n-type or p-type conductivity formed thereon, an impurity diffusion blocking layer, and a silicide compound, The semiconductor device according to claim 1, wherein the impurity diffusion blocking layer is formed of a partial nitride film of polysilicon. 2. A semiconductor device having a gate insulating film formed on a semiconductor substrate, a polysilicon layer having n-type or p-type conductivity formed thereon, an impurity diffusion blocking layer, and a silicide compound, The semiconductor device, wherein the impurity diffusion blocking layer is formed of a partially carbonized film of polysilicon. 3. The impurity diffusion blocking layer has a thickness of 100.
The semiconductor device according to claim 1 or 2, characterized in that it is Å or less. 4. In manufacturing the semiconductor device according to claim 1, after forming an n-type or p-type polysilicon layer as the nitride film, the polysilicon layer is formed of at least one of NH ₃ and N ₂ O. A method for manufacturing a semiconductor device, which comprises processing in a nitrogen atmosphere containing as a component. 5. The treatment in the nitrogen atmosphere is performed at a temperature of 80.
The method for manufacturing a semiconductor device according to claim 4, wherein the method is performed in plasma or a beam at 0 ° C. or less.