JPH08204336A - Manufacture of board for multilayer printed circuit board - Google Patents

Manufacture of board for multilayer printed circuit board

Info

Publication number
JPH08204336A
JPH08204336A JP4607695A JP4607695A JPH08204336A JP H08204336 A JPH08204336 A JP H08204336A JP 4607695 A JP4607695 A JP 4607695A JP 4607695 A JP4607695 A JP 4607695A JP H08204336 A JPH08204336 A JP H08204336A
Authority
JP
Japan
Prior art keywords
board
printed circuit
inner layer
copper foil
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4607695A
Other languages
Japanese (ja)
Inventor
Tsuneo Katayama
統夫 片山
Koji Hirata
浩司 平田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Risho Kogyo Co Ltd
Original Assignee
Risho Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Risho Kogyo Co Ltd filed Critical Risho Kogyo Co Ltd
Priority to JP4607695A priority Critical patent/JPH08204336A/en
Publication of JPH08204336A publication Critical patent/JPH08204336A/en
Pending legal-status Critical Current

Links

Landscapes

  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE: To provide a board for a multilayer printed wiring board in which harrowing of the periphery of a through hole-plating can be suppressed, an interlayer peeling is entirely eliminated and an external appearance inspection is facilitated by obtaining an adhesive force of a copper foil circuit pattern to prepreg resin. CONSTITUTION: A method for manufacturing a multilayer printed wiring board has the steps of disposing to superpose one or more inner layer printed circuit boards via a prepreg on at least one surface of an outer layer board or a copper foil, heating, pressurizing and integrally laminating it, and comprises the steps of etching the surface of the copper foil circuit pattern of the inner layer printed circuit board with air oxidation by organic acid soft etchant containing no hydrogen peroxide as the inner layer printed circuit board to form a roughed surface, and then generating black oxide film on the roughed surface.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は多層プリント配線板用
基板の製造方法に関し、更に詳しくは内層用プリント回
路板の銅箔回路パターン表面の処理に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a substrate for a multilayer printed wiring board, and more particularly to treatment of a copper foil circuit pattern surface of an inner layer printed circuit board.

【0002】[0002]

【従来技術およびその問題点】多層プリント配線板用基
板は、一般に、次のような手順で製造される。先ず片面
または両面銅張積層板を出発材料としてこの積層板の片
面または両面の銅箔にプリント法により銅箔回路パター
ンを形成して内層プリント回路板を得て、次にこの内層
プリント回路の両面または片面にプリプレグを重ね合
せ、さらにその上に外層用銅箔を重ね合せ、全体を加熱
・加圧して一体化することにより多層プリント配線板用
基板を得ている。多層プリント配線板用基板に用いる内
層用プリント回路板は、上記のように片面または両面銅
張積層板を出発材料とし、表面の銅箔に回路パターンを
プリント形成したものであるから、回路パターン表面が
シルキーな面になっていて、このような内層用プリント
回路板の1枚以上をプリプレグを介し、多層用の基材を
少なくとも1表面に配置して重ね合せ、積層一体化する
際の、プリプレグ樹脂との間の接着強度が足りないた
め、銅箔回路パターン表面に銅酸化物の層を形成し、銅
酸化物に起因する凹凸の表面として接着面積を拡大する
と共に、アンカー効果による接着強度を向上させる手段
が採用されている。
2. Description of the Related Art Generally, a substrate for a multilayer printed wiring board is manufactured by the following procedure. First, a single-sided or double-sided copper clad laminate is used as a starting material to form a copper foil circuit pattern on a copper foil on one side or both sides of this laminate by a printing method to obtain an inner layer printed circuit board, and then both sides of this inner layer printed circuit. Alternatively, a prepreg is superposed on one side, an outer layer copper foil is further superposed on the prepreg, and the whole is heated and pressed to be integrated to obtain a multilayer printed wiring board substrate. The inner layer printed circuit board used for the multilayer printed wiring board substrate is a single-sided or double-sided copper-clad laminate as a starting material as described above, and the circuit pattern is printed on the surface copper foil. Has a silky surface, and at least one such inner layer printed circuit board is placed on at least one surface of the prepreg via a prepreg, and the prepreg is used for lamination and integration. Since the adhesive strength with the resin is insufficient, a layer of copper oxide is formed on the surface of the copper foil circuit pattern to increase the adhesive area as the surface of the unevenness caused by the copper oxide, and to improve the adhesive strength due to the anchor effect. Measures to improve have been adopted.

【0003】銅酸化物層は、例えば次に示す酸化処理液
に浸漬することにより生成することができる。 苛性ソーダ5〜100g/l、亜塩素酸ソーダ30
〜300g/l、リン酸亜鉛0.1〜10g/l、リン
酸三ナトリウム0〜20g/lの成分を含む水溶液に、
温度40〜100℃、10秒〜10分間浸漬する。 アルカリ性亜塩素酸ナトリウム水溶液(亜塩素酸ナ
トリウム50〜150g/l、水酸化ナトリウム10〜
50g/l、リン酸三ナトリウム1〜20g/l、温度
80〜100℃)に2〜5分間浸漬する。 アルカリ性過硫酸カリウム水溶液(過硫酸カリウム
10g/l、水酸化ナトリウム50g/l、温度80〜
100℃)に2〜5分間浸漬する。 硫化バリウム24g/l、塩化アンモニウム24g
/l、酢酸銅30g/l、硫酸銅24g/l、温度40
〜50℃)に2〜5分間浸漬する。
The copper oxide layer can be formed, for example, by immersing it in an oxidizing treatment solution shown below. Caustic soda 5-100g / l, Sodium chlorite 30
~ 300 g / l, zinc phosphate 0.1-10 g / l, trisodium phosphate 0-20 g / l in an aqueous solution containing components,
Immerse at a temperature of 40 to 100 ° C. for 10 seconds to 10 minutes. Alkaline sodium chlorite aqueous solution (sodium chlorite 50-150 g / l, sodium hydroxide 10-
50 g / l, trisodium phosphate 1-20 g / l, temperature 80-100 ° C.) for 2-5 minutes. Alkaline potassium persulfate aqueous solution (potassium persulfate 10 g / l, sodium hydroxide 50 g / l, temperature 80-
Immerse in 100 degreeC for 2 to 5 minutes. Barium sulfide 24g / l, ammonium chloride 24g
/ L, copper acetate 30g / l, copper sulfate 24g / l, temperature 40
Dip in (~ 50 degreeC) for 2 to 5 minutes.

【0004】このようにして得られる銅酸化物層は、接
着強度の面で向上を計ることができ、更には銅酸化物層
が黒色を呈するため多層プリント配線板用基板に積層成
形された際の外観検査が容易であると云う長所を有して
いるが、しかしながら回路パターン銅箔の表面に形成し
た銅酸化物は酸に対して容易に溶解するため、多層プリ
ント配線板用基板を多層プリント配線板に仕上げる際に
通過するスルーホールめっき工程に使用される塩酸や硫
酸などの酸によって銅箔回路パターン表面に生成した銅
酸化物層が侵食され、銅酸化物の褐色または黒色から銅
のピンク色になった侵食痕を生じる現象(ハローイン
グ)が発生し、その部分の接着力が低下し、そのため多
層プリント配線板のはんだ付け工程などの熱衝撃により
層間が剥離し、プリント配線板の事故につながるおそれ
があると云う問題があった。
The copper oxide layer thus obtained can be improved in terms of adhesive strength, and when the copper oxide layer exhibits a black color, it is laminated and formed on a substrate for a multilayer printed wiring board. However, since the copper oxide formed on the surface of the circuit pattern copper foil easily dissolves in acid, the multilayer printed wiring board substrate is printed The copper oxide layer formed on the surface of the copper foil circuit pattern is eroded by acids such as hydrochloric acid and sulfuric acid used in the through-hole plating process that passes through when finishing a wiring board, and the copper oxide brown or black to copper pink A phenomenon (haloing) that causes colored erosion marks occurs, and the adhesive strength of that part decreases, so that the interlayer peels due to thermal shock during the soldering process of the multilayer printed wiring board, There is a problem that there can lead to accidents bets wiring board.

【0005】この発明はこのような事情に鑑みてなされ
たもので、この発明の目的とするところは、銅箔回路パ
ターンとプリプレグ樹脂との接着力を得、スルーホール
めっき周りのハローイングを抑制できて層間剥離が皆無
であり、しかも外観検査が容易である多層プリント配線
板用基板を提供する点にある。
The present invention has been made in view of the above circumstances, and an object of the present invention is to obtain an adhesive force between a copper foil circuit pattern and a prepreg resin and suppress haloing around through-hole plating. An object of the present invention is to provide a substrate for a multilayer printed wiring board which is capable of being free from delamination and which can be easily inspected for appearance.

【0006】[0006]

【問題点を解決するための手段】この発明は、前記問題
点を解決するために、多層プリント配線板用基板に使用
する内層用プリント回路板として銅箔回路パターン表面
に過酸化水素を含まない有機酸系ソフトエッチング剤に
よって空気酸化を伴いながらエッチングにより粗化面を
形成した後、その粗化面に黒色酸化膜を生成したものを
用いるようにしたのである。本発明において、内層用プ
リント回路板の銅箔回路パターン表面に粗化面を形成す
るためのエッチッチングは、過酸化水素を含まない有機
酸素系ソフトエッチング剤によって空気酸化を伴いなが
ら行う。エッチング深さは0.3〜5.0μm程度が好
ましい。それは、エッチング深さが0.3μm以下であ
ると表面の凹凸が小さくて接着力の向上に効果がなく、
5.0μm以上であると大きな接着力は得られるもの
の、必要な銅箔回路パターンの厚さを確保できなくなる
ためである。尚、本発明に使用できるエッチング剤とし
ては、メック(株)からCZ−5450の商品名で市販
されているものを用いることができる。粗化面に生成す
る黒色酸化膜は、特に限定するものではなく、例えば、
前記段落番号0003のに示した苛性ソーダ5〜10
0g/l、亜塩素酸ソーダ30〜300g/l、リン酸
亜鉛0.1〜10g/l、リン酸三ナトリウム0〜20
g/lの成分を含む水溶液に、液温度40〜100℃、
浸漬時間10秒〜10分の条件で浸漬して生成すること
ができる。
In order to solve the above-mentioned problems, the present invention does not contain hydrogen peroxide on the surface of a copper foil circuit pattern as an inner layer printed circuit board used for a multilayer printed wiring board substrate. The organic acid-based soft etching agent was used to form a roughened surface by etching while being accompanied by air oxidation and then to use a black oxide film formed on the roughened surface. In the present invention, the etching for forming the roughened surface on the copper foil circuit pattern surface of the printed circuit board for the inner layer is carried out by air-oxidation with an organic oxygen-based soft etching agent containing no hydrogen peroxide. The etching depth is preferably about 0.3 to 5.0 μm. If the etching depth is 0.3 μm or less, the unevenness of the surface is small and there is no effect in improving the adhesive strength.
If the thickness is 5.0 μm or more, a large adhesive force can be obtained, but the required thickness of the copper foil circuit pattern cannot be secured. As the etching agent that can be used in the present invention, the one commercially available under the trade name of CZ-5450 from Mech Co., Ltd. can be used. The black oxide film formed on the roughened surface is not particularly limited, and for example,
Caustic soda 5-10 shown in paragraph 0003 above
0 g / l, sodium chlorite 30-300 g / l, zinc phosphate 0.1-10 g / l, trisodium phosphate 0-20
A liquid temperature of 40 to 100 ° C. in an aqueous solution containing g / l of component,
It can be generated by dipping under the condition of dipping time of 10 seconds to 10 minutes.

【0007】[0007]

【実施例1】先ず、内層用両面プリント回路板を準備
し、この内層プリント回路を脱脂液(メテックスS−1
707:日本マクダミッド(株)製)65℃に5分間浸
漬し、その後水洗した。次に、過酸化水素を含まない有
機酸系ソフトエッチング液(CZ−5450:メック
(株)製)に液温35℃で60秒間スプレーして、空気
酸化を伴いながらエッチングして粗化面を形成し、その
後水洗した。次いで、下記(a),(b),(c),
(d)成分の酸化処理水溶液に60℃で2分浸漬して粗
化面に黒色の酸化銅膜を形成し、その後水洗して後10
5℃で40分間乾燥した。 −記− (a) 苛性ソーダ … 10g/l (b) 亜塩素酸ソーダ … 100g/l (c) リン酸亜鉛 … 0.5g/l (d) リン酸三ナトリウム … 5g/l この黒色酸化銅膜を生成した内層用両面プリント回路板
の上下面にプリプレグを積み重ね、更にその上下面に外
層用銅箔を積み重ねて4層構成とし、上下より加熱・加
圧して積層一体化することにより4層プリント配線板用
基板を得た。
Example 1 First, a double-sided printed circuit board for inner layer was prepared, and this inner layer printed circuit was degreased with a degreasing solution (Metex S-1).
707: Nihon MacDamid Co., Ltd.) It was immersed in 65 ° C. for 5 minutes and then washed with water. Then, a hydrogen peroxide-free organic acid-based soft etching solution (CZ-5450: manufactured by Mec Co., Ltd.) is sprayed at a liquid temperature of 35 ° C. for 60 seconds, and etching is performed while air oxidation is performed to form a roughened surface. Formed and then washed with water. Then, the following (a), (b), (c),
A black copper oxide film is formed on the roughened surface by immersing it in the oxidizing treatment aqueous solution of the component (d) at 60 ° C. for 2 minutes, and then washing with water.
It was dried at 5 ° C. for 40 minutes. -Note- (a) Caustic soda ... 10 g / l (b) Sodium chlorite ... 100 g / l (c) Zinc phosphate ... 0.5 g / l (d) Trisodium phosphate ... 5 g / l This black copper oxide film 4 layers printed by stacking prepregs on the upper and lower surfaces of the double-sided printed circuit board for the inner layer, and further stacking copper foil for the outer layer on the upper and lower surfaces of the prepreg, and heating and pressing from the top and bottom to integrate them. A wiring board substrate was obtained.

【0008】[0008]

【実施例2】実施例1の有機酸系ソフトエッチング液の
スプレー時間を30秒とした以外は実施例1と同様に行
って4層プリント配線板用基板を得た。
Example 2 A four-layer printed wiring board substrate was obtained in the same manner as in Example 1 except that the spray time of the organic acid-based soft etching solution in Example 1 was changed to 30 seconds.

【0009】[0009]

【比較例1】実施例1の有機酸系ソフトエッチング液の
スプレー時間を5秒とした以外は実施例1と同様に行っ
て4層プリント配線板用基板を得た。
Comparative Example 1 A substrate for a four-layer printed wiring board was obtained in the same manner as in Example 1 except that the spray time of the organic acid-based soft etching solution in Example 1 was changed to 5 seconds.

【0010】[0010]

【比較例2】実施例1のソフトエッチ液を硫酸−過酸化
水素系とし、60秒間の浸漬とした以外は実施例1と同
様に行って4層プリント配線板用基板を得た。
Comparative Example 2 A 4-layer printed wiring board substrate was obtained in the same manner as in Example 1 except that the soft etchant of Example 1 was changed to sulfuric acid-hydrogen peroxide system and immersed for 60 seconds.

【0011】[0011]

【比較例3】実施例1のソフトエッチ液を硫酸−過硫酸
塩系とし、60秒間の浸漬とした以外は実施例1と同様
に行って4層プリント配線板用基板を得た。上記実施例
1,2、比較例1,2,3の4層プリント配線板用基板
の所定位置にそれぞれ0.4mmφのスルーホールを形
成し、このスルーホールに常法によるスルーホールめっ
きを施し、ハロー値、はんだ耐熱性、内層ピール強度、
外観検査性を測定し、表1にその結果を示した。
Comparative Example 3 A four-layer printed wiring board substrate was obtained in the same manner as in Example 1 except that the soft etchant of Example 1 was changed to sulfuric acid-persulfate system and immersed for 60 seconds. Through holes of 0.4 mmφ were formed at predetermined positions on the four-layer printed wiring board substrates of Examples 1 and 2 and Comparative Examples 1, 2, and 3, and the through holes were plated by a conventional method. Halo value, solder heat resistance, inner layer peel strength,
The appearance inspectability was measured, and the results are shown in Table 1.

【0009】 [0009]

【0010】尚、上記実施例及び比較例は4層プリント
配線板用基板を例に説明したが更に高多層の場合も同様
であることは云うまでもない。
Although the above-mentioned Examples and Comparative Examples have been described by taking the substrate for a four-layer printed wiring board as an example, it goes without saying that the same applies to the case of a higher multilayer.

【0011】[0011]

【発明の効果】この発明は、内層用回路銅の外観色が黒
色のため外観検査性に優れ、ハローイング量の増加がな
く、内層ピール強度が高く、はんだ耐熱性に優れた多層
プリント配線板用基板を提供することができると云う効
果がある。
EFFECT OF THE INVENTION The present invention provides a multilayer printed wiring board which has excellent appearance inspectability because the inner layer circuit copper has a black appearance color, does not increase the haloing amount, has a high inner layer peel strength, and has excellent solder heat resistance. There is an effect that a substrate for use can be provided.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 内層用プリント回路板の1枚以上を、プ
リプレグを介し、外層用基板又は銅箔を少なくとも1表
面に配置して重ね合せ、加熱・加圧して積層一体化する
多層プリント配線板用基板の製造方法であって、内層用
プリント回路板として、内層用プリント回路板の銅箔回
路パターン表面を過酸化水素を含まない有機酸系ソフト
エッチング剤によって空気酸化を伴いながらエッチング
することにより粗化面を形成した後、その粗化面に黒色
酸化膜を生成したものを用いることを特徴とする多層プ
リント配線板用基板の製造方法。
1. A multilayer printed wiring board in which at least one printed circuit board for an inner layer is placed on at least one surface of a substrate for an outer layer or a copper foil with a prepreg interposed therebetween, and the layers are laminated by heating and pressing. A method for manufacturing a substrate for use as an inner layer printed circuit board, comprising: etching the copper foil circuit pattern surface of the inner layer printed circuit board with an organic acid-based soft etching agent containing no hydrogen peroxide while accompanied by air oxidation. A method of manufacturing a substrate for a multilayer printed wiring board, comprising forming a roughened surface and then forming a black oxide film on the roughened surface.
JP4607695A 1995-01-27 1995-01-27 Manufacture of board for multilayer printed circuit board Pending JPH08204336A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4607695A JPH08204336A (en) 1995-01-27 1995-01-27 Manufacture of board for multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4607695A JPH08204336A (en) 1995-01-27 1995-01-27 Manufacture of board for multilayer printed circuit board

Publications (1)

Publication Number Publication Date
JPH08204336A true JPH08204336A (en) 1996-08-09

Family

ID=12736909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4607695A Pending JPH08204336A (en) 1995-01-27 1995-01-27 Manufacture of board for multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPH08204336A (en)

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