JPH08204120A - Semiconductor module for power - Google Patents

Semiconductor module for power

Info

Publication number
JPH08204120A
JPH08204120A JP2584495A JP2584495A JPH08204120A JP H08204120 A JPH08204120 A JP H08204120A JP 2584495 A JP2584495 A JP 2584495A JP 2584495 A JP2584495 A JP 2584495A JP H08204120 A JPH08204120 A JP H08204120A
Authority
JP
Japan
Prior art keywords
copper circuit
semiconductor module
power semiconductor
metal substrate
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2584495A
Other languages
Japanese (ja)
Other versions
JP2869771B2 (en
Inventor
Toyoji Yasuda
豊二 安田
Toshihide Tokuda
俊秀 徳田
Masahiro Aoyama
雅洋 青山
Hideo Ishii
秀雄 石井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sansha Electric Manufacturing Co Ltd
Original Assignee
Sansha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sansha Electric Manufacturing Co Ltd filed Critical Sansha Electric Manufacturing Co Ltd
Priority to JP2584495A priority Critical patent/JP2869771B2/en
Publication of JPH08204120A publication Critical patent/JPH08204120A/en
Application granted granted Critical
Publication of JP2869771B2 publication Critical patent/JP2869771B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE: To provide a power semiconductor module, which facilitates the work of the connection of a copper circuit on a metal substrate with a control device and is miniaturized at the same time. CONSTITUTION: A power semiconductor module is formed into a structure, wherein a semiconductor chip 2 is placed and fixed on the upper surface of a copper circuit on a metal substrate 1 via an insulating layer, the chip 2 is enclosed in a resin case 4 and a sealing medium is injected and cured in the interior of the case 4, and the module is constituted of projected parts made to project 4a and 4b from the outer wall of the case 4 and respectively having bosses 7 and 8 engaged with mounting holes formed in a printed-wiring board 5, on their points, and control terminals 6 which respectively have holes, which are engaged with the bosses, and respectively have a plurality of pins which are connected with one part of the copper circuit.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電力用半導体チップと
この半導体チップの制御部品を1つのモジュール内に搭
載した電力用半導体モジュールに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power semiconductor chip and a power semiconductor module in which a control component for the semiconductor chip is mounted in one module.

【0002】[0002]

【従来の技術】電力用半導体モジュールに用いられる電
力用制御装置の1つに図3に示すようなものがある。す
なわち、入力端子51により交流を受電し、整流ダイオ
ード52により交流を整流し、高周波バイパス用コンデ
ンサ53及び平滑用コンデンサ54により平滑して、こ
の整流平滑された直流をインバータ55により交流に変
換し、出力端子10から交流を出力している。また、イ
ンバータ55はIGBT,MOSFET,トランジス
タ、GTO等の制御素子56〜61と、この制御素子5
6〜61と並列にそれぞれ設けられたフラーホイリング
ダイオード62〜67とにより構成され、制御素子56
〜61には制御装置71から駆動信号が入力されてい
る。
2. Description of the Related Art One of power control devices used in a power semiconductor module is shown in FIG. That is, AC is received by the input terminal 51, AC is rectified by the rectifier diode 52, smoothed by the high-frequency bypass capacitor 53 and smoothing capacitor 54, and the rectified and smoothed DC is converted by the inverter 55 into AC. AC is output from the output terminal 10. The inverter 55 includes control elements 56 to 61 such as IGBTs, MOSFETs, transistors, GTOs, and the like.
6 to 61 and fuller Wheeling diodes 62 to 67 provided in parallel, respectively, and control element 56
A drive signal is input to the controller 61 from the controller 71.

【0003】従来、図3に示す電力制御装置を電力半導
体モジュールを組み立てる場合、図4に示すようなもの
が知られている。すなわち、一方の全面に絶縁層を形成
した金属基板1上に銅回路が接着、半田付けされ、この
金属基板上の銅回路の必要個所にクリーム半田を印刷
し、銅回路上にダイオード及び電力用制御素子のチップ
2を搭載し、リフロー炉で半田付けされている。その
後、回路間のワイヤボンディングを行っている。また、
金属基板1に樹脂ケース14を接着し、この樹脂ケース
14内に電力用制御素子を駆動する制御装置を搭載した
プリント配線板5を固定する。ケース14内にシリコン
ゲルを注入し加熱硬化してシリコンゲル層9を形成し、
さらにエポキシ樹脂を注入し加熱硬化してエポキシ樹脂
層10を形成する。その後、樹脂ケースから引出した入
力端子及び出力端子(図示せず)は、ナットを設けるな
どを行い、外部接続端子を形成して、電力用半導体モジ
ュールを形成する。
Conventionally, when assembling a power semiconductor module from the power control device shown in FIG. 3, the one shown in FIG. 4 is known. That is, a copper circuit is adhered and soldered on a metal substrate 1 having an insulating layer formed on one entire surface, cream solder is printed on a required portion of the copper circuit on the metal substrate, and a diode and a power source are provided on the copper circuit. The control element chip 2 is mounted and soldered in a reflow furnace. After that, wire bonding between circuits is performed. Also,
A resin case 14 is adhered to the metal substrate 1, and a printed wiring board 5 having a control device for driving a power control element mounted therein is fixed in the resin case 14. Silicon gel is injected into the case 14 and heat-cured to form the silicon gel layer 9,
Further, epoxy resin is injected and cured by heating to form the epoxy resin layer 10. After that, the input terminal and the output terminal (not shown) drawn out from the resin case are provided with nuts or the like to form the external connection terminals and form the power semiconductor module.

【0004】[0004]

【発明が解決しようとする課題】ところが、金属基板の
銅回路と、制御装置との間は制御端子で接続されるが、
制御端子の開ピッチが狭く、かつ多数の制御端子で構成
されるため、この多数の制御端子を樹脂ケースにインサ
ートする工程が複雑化するなどの問題がある。また、多
数のピンを端子台として形成することもあるが、この場
合プリント配線板上に固定する端子台とするために、プ
リント配線板を載置した時、プリント配線板が妨げとな
ってピンと銅回路との半田付が困難になっていた。ま
た、半田付を容易にしようとすると電力用半導体モジュ
ールが大きくなるなどの問題がある。
However, although the copper circuit of the metal substrate and the control device are connected by the control terminal,
Since the control terminals have a narrow open pitch and are composed of a large number of control terminals, there is a problem that the process of inserting the large number of control terminals into a resin case becomes complicated. In addition, a large number of pins may be formed as a terminal block. In this case, since the terminal block is fixed on the printed wiring board, when the printed wiring board is placed, the printed wiring board interferes with the pins. Soldering with a copper circuit was difficult. In addition, there is a problem that the power semiconductor module becomes large if the soldering is attempted easily.

【0005】[0005]

【課題を解決するための手段】以上のような問題点を解
決するために、本発明は金属基板上に絶縁層を介して設
けられた銅回路の上面に電力用半導体チップを載置固定
し、樹脂ケースで囲まれ内部に封止材が注入硬化された
電力用半導体モジュールにおいて、上記樹脂ケースが外
壁から内側に突出し、先端にプリント配線板の取付穴に
係合するボスを有する突出部と、上記ボスに係合する穴
を有し、上記銅回路の一部に接続される複数のピンを有
する制御端子とを具備されている。
In order to solve the above problems, the present invention mounts and fixes a power semiconductor chip on the upper surface of a copper circuit provided on a metal substrate via an insulating layer. In a power semiconductor module which is surrounded by a resin case and in which a sealing material is injected and cured, the resin case protrudes inward from an outer wall and has a protrusion having a boss at a tip end that engages with a mounting hole of a printed wiring board. A control terminal having a plurality of pins having holes for engaging the bosses and connected to a part of the copper circuit.

【0006】[0006]

【作用】樹脂ケースに設けた突出部の先端のボスに、複
数ピンを有する制御端子を挿入すると、ピンの先端と銅
回路との接続が容易になる。また、上記ボスにプリント
配線板の取付穴を挿入すると、プリント配線板はボスに
係合される。
When the control terminal having a plurality of pins is inserted into the boss at the tip of the protruding portion provided on the resin case, the tip of the pin and the copper circuit can be easily connected. When the mounting hole of the printed wiring board is inserted into the boss, the printed wiring board is engaged with the boss.

【0007】[0007]

【実施例】以下にこの発明を図1ないし図3により詳細
に説明する。なお、図中従来例と同じ符号は同一部位を
示すものである。そして、6は制御端子で、この制御端
子は、制御装置に接続される多数のピン6aが1つの端
子台6bにインサート形成され、端部に穴6cが設けら
れている。一方、ケースは外壁から内部に突出する突出
部4a及び4bが設けられ、それぞれの突出部4a,4
bの上部にはボス7,8が設けられている。そして、一
方のボス7が制御端子6の穴6cと係合される。また、
突出部4aの高さは4bの高さより端子台6bの厚み分
低く設計されている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to FIGS. In the figure, the same reference numerals as those in the conventional example indicate the same parts. Further, 6 is a control terminal, and a large number of pins 6a connected to the control device are insert-formed on one terminal block 6b, and a hole 6c is provided at the end thereof. On the other hand, the case is provided with protrusions 4a and 4b that protrude inward from the outer wall, and the protrusions 4a and 4b are provided.
Bosses 7 and 8 are provided on the upper part of b. Then, the one boss 7 is engaged with the hole 6c of the control terminal 6. Also,
The height of the protruding portion 4a is designed to be lower than the height of 4b by the thickness of the terminal block 6b.

【0008】電力用半導体モジュールを組立てる場合、
絶縁層を形成した金属基板1上に銅回路が接着又は半田
付けされ、この金属基板上の銅回路の必要個所にクリー
ム半田を印刷し、銅回路にダイオード,電力用制御素子
等の電力用半導体チップ2を搭載し、リフロー炉で半田
付けする。その後回路間のワイヤボンディングを行って
いる。次に金属基板1に端子(図示しない)をインサー
ト成形した樹脂ケース4をシリコンゴム等により接着
し、端子と銅回路間とを半田付けする。
When assembling a power semiconductor module,
A copper circuit is adhered or soldered onto the metal substrate 1 on which an insulating layer is formed, cream solder is printed on a required portion of the copper circuit on the metal substrate, and a power semiconductor such as a diode or a power control element is printed on the copper circuit. The chip 2 is mounted and soldered in a reflow furnace. After that, wire bonding between circuits is performed. Next, a resin case 4 in which terminals (not shown) are insert-molded on the metal substrate 1 is bonded with silicon rubber or the like, and the terminals and the copper circuit are soldered together.

【0009】そして、低く設けられた突出部4a側のボ
ス7に制御端子6の穴6cをはめ込む。この時、ボス7
の先端は穴6cから突き出ている。制御端子6から伸び
たピン6aの一方の先端は、金属基板1の銅回路に接触
しており、このピン6aの一方の先端と銅回路との間が
半田付けされる。この後、ボス7,8及びピン6aに係
合できる穴を有し電子部品等が搭載したプリント配線板
5を載置し、ピン6bとプリント配線板5間を半田付け
する。そして、ケース4内にシリコンゲルを注入し、加
熱硬化させてゲル層9を形成し、このゲル層9の上部に
エポキシ樹脂を注入し、加熱硬化させてエポキシ樹脂層
10を形成する。また、ゲル層9及びエポキシ樹脂10
から引出された端子は、ナットを設けるなどを行い、外
部接続端子を形成し、電力用半導体モジュールを形成す
る。
Then, the hole 6c of the control terminal 6 is fitted into the boss 7 on the side of the protruding portion 4a which is provided low. At this time, boss 7
Has a tip protruding from the hole 6c. One end of the pin 6a extending from the control terminal 6 is in contact with the copper circuit of the metal substrate 1, and one end of the pin 6a and the copper circuit are soldered to each other. After that, the printed wiring board 5 having holes for engaging with the bosses 7 and 8 and the pin 6a and having electronic components mounted thereon is placed, and the pins 6b and the printed wiring board 5 are soldered. Then, silicone gel is injected into the case 4 and cured by heating to form a gel layer 9, and an epoxy resin is injected onto the upper portion of the gel layer 9 and cured by heating to form an epoxy resin layer 10. In addition, the gel layer 9 and the epoxy resin 10
The terminal pulled out from the device is provided with a nut or the like to form an external connection terminal and form a power semiconductor module.

【0010】上記実施例では電力用半導体チップを保護
する封止材にシリコンゲルとエポキシ樹脂を用いていた
が、いずれか一方であってもよい。また、上記実施例で
はプリント配線板を固定するボスは4ケであったが、制
御端子6をプリント配線板を共用に固定する2ケのボス
であってもよく、また3ケ以上であってもよい。また、
温度検出器を銅回路に搭載させ、温度検出器の検出信号
を制御装置に入力させれば、動作時、モジュールを温度
保障行うことができる。
Although silicon gel and epoxy resin are used as the encapsulating material for protecting the power semiconductor chip in the above embodiment, either one may be used. Further, although the number of bosses for fixing the printed wiring board is four in the above-mentioned embodiment, the number of bosses for fixing the control terminal 6 to the printed wiring board in common may be two, or three or more. Good. Also,
By mounting the temperature detector on the copper circuit and inputting the detection signal of the temperature detector to the control device, the temperature of the module can be guaranteed during operation.

【0011】[0011]

【発明の効果】以上のように、本発明の電力用半導体モ
ジュールにおいては、多数のピンが簡単な端子台にイン
サート成形されて端子台を構成し、この端子台を樹脂ケ
ースに設けたボスへの取付けが簡単で、かつピンが銅回
路に接触し、ピンと銅回路間の半田付けが容易となる。
また、端子台を取付けるボスがプリント配線板を取付け
るボスとなっており、プリント配線板用として別にボス
を設ける必要がなく、電力用半導体モジュールを小形化
することができる。
As described above, in the power semiconductor module of the present invention, a large number of pins are insert-molded in a simple terminal block to form a terminal block, and the terminal block is connected to a boss provided in a resin case. Is easy to attach, and the pins come into contact with the copper circuit, which facilitates soldering between the pins and the copper circuit.
Further, the boss for mounting the terminal block is a boss for mounting the printed wiring board, and it is not necessary to separately provide a boss for the printed wiring board, and the power semiconductor module can be miniaturized.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の電力用半導体モジュールの一実施例の
横断面図である。
FIG. 1 is a cross-sectional view of an embodiment of a power semiconductor module of the present invention.

【図2】図1の構成部品の正面図である。2 is a front view of the components of FIG. 1. FIG.

【図3】本発明に係わる電力制御装置の結線図である。FIG. 3 is a wiring diagram of a power control device according to the present invention.

【図4】従来の電力用半導体モジュールの横断面図であ
る。
FIG. 4 is a cross-sectional view of a conventional power semiconductor module.

【符号の説明】[Explanation of symbols]

1 金属基板 2 電力用半導体チップ 4 樹脂ケース 4a,4b 突出部 5 プリント配線板 6 制御端子 7,8 ボス 9 シリコンゲル 10 エポキシ樹脂 1 Metal Substrate 2 Power Semiconductor Chip 4 Resin Case 4a, 4b Projection 5 Printed Wiring Board 6 Control Terminals 7, 8 Boss 9 Silicon Gel 10 Epoxy Resin

───────────────────────────────────────────────────── フロントページの続き (72)発明者 石井 秀雄 大阪府大阪市東淀川区淡路2丁目14番3号 株式会社三社電機製作所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Hideo Ishii Inventor Hideo Ishii 2-14-3 Awaji, Higashiyodogawa-ku, Osaka-shi, Osaka Sansan Electric Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 金属基板上に絶縁層を介して設けられた
銅回路の上面に電力用半導体チップを載置し固定し、樹
脂ケースで囲まれ内部に封止材が注入硬化された電力用
半導体モジュールにおいて、上記樹脂ケースが外壁から
内側に突出し先端にプリント配線板の取付穴に係合する
ボスを有する突出部と、上記ボスに係合する穴を有し上
記銅回路の一部に接続される複数のピンを有する制御端
子とを具備されたことを特徴とする電力用半導体モジュ
ール。
1. A power semiconductor chip in which a power semiconductor chip is mounted and fixed on the upper surface of a copper circuit provided on a metal substrate with an insulating layer interposed therebetween, and a sealing material is injected and cured inside the resin case. In a semiconductor module, the resin case projects inward from an outer wall and has a boss at a tip end that engages with a mounting hole of a printed wiring board, and a hole that engages with the boss and is connected to a part of the copper circuit. And a control terminal having a plurality of pins, the semiconductor module for electric power.
JP2584495A 1995-01-20 1995-01-20 Power semiconductor module Expired - Fee Related JP2869771B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2584495A JP2869771B2 (en) 1995-01-20 1995-01-20 Power semiconductor module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2584495A JP2869771B2 (en) 1995-01-20 1995-01-20 Power semiconductor module

Publications (2)

Publication Number Publication Date
JPH08204120A true JPH08204120A (en) 1996-08-09
JP2869771B2 JP2869771B2 (en) 1999-03-10

Family

ID=12177162

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2584495A Expired - Fee Related JP2869771B2 (en) 1995-01-20 1995-01-20 Power semiconductor module

Country Status (1)

Country Link
JP (1) JP2869771B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000091499A (en) * 1998-09-11 2000-03-31 Hitachi Ltd Power semiconductor module and motor drive system employing the same
JP2001156253A (en) * 1999-10-01 2001-06-08 Fairchild Korea Semiconductor Ltd Semiconductor power module and its manufacturing method
JP2002164500A (en) * 2000-11-27 2002-06-07 Fuji Electric Co Ltd Semiconductor module
US7019394B2 (en) 2003-09-30 2006-03-28 Intel Corporation Circuit package and method of plating the same
EP2775524A1 (en) * 2013-03-08 2014-09-10 Fuji Electric Co., Ltd. Semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000091499A (en) * 1998-09-11 2000-03-31 Hitachi Ltd Power semiconductor module and motor drive system employing the same
JP2001156253A (en) * 1999-10-01 2001-06-08 Fairchild Korea Semiconductor Ltd Semiconductor power module and its manufacturing method
US7449774B1 (en) 1999-10-01 2008-11-11 Fairchild Korea Semiconductor Ltd. Semiconductor power module having an electrically insulating heat sink and method of manufacturing the same
US7501700B2 (en) 1999-10-01 2009-03-10 Fairchild Korea Semiconductor Ltd. Semiconductor power module having an electrically insulating heat sink and method of manufacturing the same
JP2002164500A (en) * 2000-11-27 2002-06-07 Fuji Electric Co Ltd Semiconductor module
US7019394B2 (en) 2003-09-30 2006-03-28 Intel Corporation Circuit package and method of plating the same
US7405155B2 (en) 2003-09-30 2008-07-29 Intel Corporation Circuit package and method of plating the same
EP2775524A1 (en) * 2013-03-08 2014-09-10 Fuji Electric Co., Ltd. Semiconductor device
US9750137B2 (en) 2013-03-08 2017-08-29 Fuji Electric Co., Ltd. Semiconductor device

Also Published As

Publication number Publication date
JP2869771B2 (en) 1999-03-10

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