JPH08203989A - Electrostatic chuck and its method - Google Patents

Electrostatic chuck and its method

Info

Publication number
JPH08203989A
JPH08203989A JP697295A JP697295A JPH08203989A JP H08203989 A JPH08203989 A JP H08203989A JP 697295 A JP697295 A JP 697295A JP 697295 A JP697295 A JP 697295A JP H08203989 A JPH08203989 A JP H08203989A
Authority
JP
Japan
Prior art keywords
wafer
insulating film
switch
electrostatic chuck
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP697295A
Other languages
Japanese (ja)
Inventor
Yoichi Ito
陽一 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP697295A priority Critical patent/JPH08203989A/en
Publication of JPH08203989A publication Critical patent/JPH08203989A/en
Pending legal-status Critical Current

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  • Jigs For Machine Tools (AREA)
  • Drying Of Semiconductors (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

PURPOSE: To provide an electrostatic chuck suitable for treating a wafer by multi-step etching with excellent throughput and its method. CONSTITUTION: A SiC sintered body is connected with solder 12 as an insulation film 11 on an electrode 10 to constitute an electrostatic chuck electrode. A parallel circuit 17 of a variable resistor 15 and a capacitor 16 is provided in an electrostatic chuck circuit comprising a direct current power supply 14, the insulation film 11 and a switch 18, and further resistors 21 are provided in parallel via the switch 18. A direct current voltage is applied to an electrostatic chuck electrode 13 via the parallel circuit 17 when a wafer is chucked, and an operator manipulates to grind the electrostatic chuck electrode 13 via the resistors 21 by the switch 18 when the wafer is released.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】プラズマ等により処理されるウエ
ハを静電吸着力により支持する静電吸着装置において、
ウエハを多段エッチングでスル-プットよく処理するの
に好適な静電吸着装置及び方法に関する。
[Field of Industrial Application] In an electrostatic chucking device for supporting a wafer processed by plasma or the like by electrostatic chucking force,
The present invention relates to an electrostatic chucking apparatus and method suitable for processing a wafer through multi-stage etching with good throughput.

【0002】[0002]

【従来の技術】静電吸着に関する従来技術としては、特
開平3−204924号公報記載のように絶縁膜がTi
2を含み、100℃以下の使用温度において、固有抵
抗値を109〜1011Ω−cmの範囲に調整することが提
案されている。
2. Description of the Related Art As a conventional technique relating to electrostatic attraction, as disclosed in Japanese Patent Application Laid-Open No. 3-204924, an insulating film is made of Ti.
It has been proposed to adjust the specific resistance value to a range of 10 9 to 10 11 Ω-cm at a use temperature of 100 ° C. or lower including O 2 .

【0003】[0003]

【発明が解決しようとする課題】前記従来技術をエッチ
ング処理されるウエハを載置する電極に適用することを
考えると次のような解決すべき課題がある。つまり、デ
バイスの高集積化に伴ってプロセスも複雑化しており、
プロセス条件を多段に変更しながらウエハをエッチング
する方法が主流になっている。前述の方法により、ウエ
ハをスル-プットよく処理するためには、静電吸着電極
としてプロセス間でプラズマを消滅した際にウエハ冷却
用Heガスのウエハ裏面への導入、排気を不必要とするた
めに吸着力が残留し易く、逆に処理が終了したウエハを
解放する際には搬送をスム-ズに行うために吸着力がす
みやかに低減するように残留吸着力をコントロ-ルする
必要がある。前記従来技術の絶縁膜では、固有抵抗値が
109〜1011Ω-cmの範囲であるためにプラズマを消滅した
際にウエハ冷却用Heガスのウエハ裏面圧力を維持する
のに十分な残留吸着力が得られず、スル-プットの向上
が図れなかった。
Considering the application of the above-mentioned conventional technique to an electrode on which a wafer to be etched is mounted, there are the following problems to be solved. In other words, the process is becoming more complicated as the device becomes more highly integrated,
A method of etching a wafer while changing the process conditions in multiple stages has become the mainstream. In order to process the wafer well by the above-mentioned method, it is not necessary to introduce and exhaust He gas for cooling the wafer to the back surface of the wafer when the plasma is extinguished as the electrostatic attraction electrode during the process. Adhesive force is likely to remain on the other hand, and conversely, when releasing a processed wafer, it is necessary to control the residual attractive force so that the attractive force can be promptly reduced in order to carry out smoothly. . In the conventional insulating film, the specific resistance value is
Since it is in the range of 10 9 to 10 11 Ω-cm, when the plasma is extinguished, a sufficient residual adsorption force for maintaining the backside pressure of the wafer cooling He gas cannot be obtained and the throughput is improved. I couldn't.

【0004】本発明の目的は、残留吸着力をコントロ-
ルすることにより多段エッチングをスル-プットよく処
理できる静電吸着装置及び方法を提供することにある。
The object of the present invention is to control the residual adsorption force.
It is an object of the present invention to provide an electrostatic attraction device and method capable of treating multi-stage etching with good throughput by performing the etching.

【0005】[0005]

【課題を解決するための手段】上記目的は、直流電源と
絶縁膜とスイッチにより構成された静電吸着回路に抵抗
とコンデンサの並列回路を設け、さらにスイッチを介し
て並列に抵抗を設ける。そして、ウエハを吸着する際に
は抵抗とコンデンサの並列回路を介して絶縁膜に直流電
圧を印加し、ウエハを解放する際には抵抗とコンデンサ
の並列回路を介さずに絶縁膜を接地するようにスイッチ
により操作することにより、達成される。
The above object is to provide a parallel circuit of a resistor and a capacitor in an electrostatic attraction circuit composed of a DC power source, an insulating film and a switch, and further provide a resistor in parallel via a switch. Then, a DC voltage is applied to the insulating film via the parallel circuit of the resistor and the capacitor when the wafer is adsorbed, and the insulating film is grounded without the parallel circuit of the resistor and the capacitor when releasing the wafer. It is achieved by operating the switch.

【0006】[0006]

【作用】ウエハを解放する際の絶縁膜に充電された電荷
の放電時定数は、絶縁膜の抵抗Rとウエハと絶縁膜の隙
間の静電容量Cの積で表される。一方、プラズマを消滅
した際の電荷の放電時定数は、抵抗の抵抗値R1を絶縁
膜の抵抗Rより高く、コンデンサの静電容量C1をウエ
ハと絶縁膜の隙間の静電容量Cより大きくすることによ
り前述したRCより長いR11となる。従って、残留吸
着力をコントロ−ルすることができ、ウエハを多段エッ
チングでスル-プットよく処理することが可能となる。
The discharge time constant of the electric charge charged in the insulating film when the wafer is released is represented by the product of the resistance R of the insulating film and the electrostatic capacitance C in the gap between the wafer and the insulating film. On the other hand, the discharge time constant of the electric charge when the plasma is extinguished is such that the resistance value R 1 of the resistor is higher than the resistance R of the insulating film, and the electrostatic capacitance C 1 of the capacitor is larger than the electrostatic capacitance C of the gap between the wafer and the insulating film. By increasing the value, R 1 C 1 is longer than RC described above. Therefore, the residual adsorption force can be controlled, and the wafer can be processed in a good throughput by multi-stage etching.

【0007】[0007]

【実施例】以下、本発明の一実施例を適用したいわゆる
有磁場マイクロ波エッチング装置の構成を図1及び図2
により説明する。図1において、ウエハ1のエッチング
は、放電管2内に導入したプロセスガス3をマイクロ波
4とソレノイド5による磁場の相互作用によりプラズマ
6化し、さらに下部電極7に高周波電源8により高周波
を印加してウエハ1に入射するイオンのエネルギ−を制
御しながら行う。ウエハ1のエッチングが終了すると該
エッチング済みウエハ1は、ウエハ押し上げ装置9の作
動により下部電極7から搬送装置(図示省略)に渡され
た後、該搬送装置により他の場所に搬送される。また、
下部電極7上には、電極10に絶縁膜11としてSiC
焼結体をろう材12により接合して構成した静電吸着電
極13が固定されており、さらに下部電極7と直流電源
14の間には可変抵抗15とコンデンサ16の並列回路
17とスイッチ18が設けてあり、スイッチ18を端子
19と接続することにより静電吸着電極13に並列回路
17を介しての直流電圧を印加でき、端子20と接続す
ることにより静電吸着電極13を抵抗21を介して接地
できるようにしてある。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of a so-called magnetic field microwave etching apparatus to which an embodiment of the present invention is applied will be described below with reference to FIGS.
This will be described below. In FIG. 1, the wafer 1 is etched by turning the process gas 3 introduced into the discharge tube 2 into plasma 6 by the interaction of the microwave 4 and the magnetic field of the solenoid 5, and applying a high frequency to the lower electrode 7 by the high frequency power source 8. Is performed while controlling the energy of the ions incident on the wafer 1. When the etching of the wafer 1 is completed, the etched wafer 1 is transferred from the lower electrode 7 to a transfer device (not shown) by the operation of the wafer lifting device 9, and then transferred to another place by the transfer device. Also,
On the lower electrode 7, the electrode 10 is made of SiC as an insulating film 11.
An electrostatic attraction electrode 13 formed by joining a sintered body with a brazing material 12 is fixed, and a parallel circuit 17 of a variable resistor 15 and a capacitor 16 and a switch 18 are further provided between the lower electrode 7 and the DC power source 14. A DC voltage can be applied to the electrostatic attraction electrode 13 via the parallel circuit 17 by connecting the switch 18 to the terminal 19, and by connecting the switch 18 to the terminal 20, the electrostatic attraction electrode 13 via the resistor 21. So that it can be grounded.

【0008】一方、エッチングされるウエハ1の冷却
は、スイッチ18を端子19と接続して絶縁膜11とウ
エハ1間に直流電圧を印加した後、前述した方法により
プラズマ6を生成することにより生じる静電吸着力によ
りウエハ1を支持した状態で、マスフロ−コントロ−ラ
22を開いてHeガス23をウエハ1裏面に導入するこ
とにより行う。また、下部電極7は、サ−キュレ−タ2
4により冷媒25を循環することにより温調されてい
る。
On the other hand, the cooling of the wafer 1 to be etched occurs by connecting the switch 18 to the terminal 19 and applying a DC voltage between the insulating film 11 and the wafer 1, and then generating the plasma 6 by the method described above. With the wafer 1 supported by electrostatic attraction, the mass flow controller 22 is opened and He gas 23 is introduced to the back surface of the wafer 1. Further, the lower electrode 7 is used as the circulator 2.
The temperature is controlled by circulating the refrigerant 25 by means of 4.

【0009】次に、プロセス条件を多段例えば2段に変
更してエッチング処理する場合について具体的に図3に
より説明する。図3において、まず、処理されるウエハ
1が静電吸着電極13上に搬送されると、スイッチ18
を端子19と接続して絶縁膜11とウエハ1間に直流電
圧を印加した状態で、前述した方法によりプラズマ6を
生成してウエハ1を静電吸着電極13上に支持する。そ
して、マスフロ−コントロ−ラ22を開いてウエハ1裏
面にHeガス23を導入してウエハ1を冷却しながらエ
ッチング処理を開始する。その後、1段目のエッチング
処理が終了し、2段目のエッチング処理が開始されるま
で一端プラズマ6を消滅するがウエハ1裏面へのHeガ
ス23の導入は継続する。そして、2段目のエッチング
処理が終了するとマスフロ−コントロ−ラ22を閉じて
Heガス23の導入をやめて真空ポンプ26により排気
する。その後、スイッチ18を端子20と接続して静電
吸着電極13の両端を一定時間接地した後、プラズマ6
を消滅する。
Next, the case of changing the process condition to multiple stages, for example, two stages and performing the etching process will be specifically described with reference to FIG. In FIG. 3, first, when the wafer 1 to be processed is transferred onto the electrostatic attraction electrode 13, the switch 18
Is connected to the terminal 19 and a DC voltage is applied between the insulating film 11 and the wafer 1, plasma 6 is generated by the above-described method to support the wafer 1 on the electrostatic attraction electrode 13. Then, the mass flow controller 22 is opened, and He gas 23 is introduced to the back surface of the wafer 1 to start the etching process while cooling the wafer 1. After that, the plasma 6 is once extinguished until the first etching process is completed and the second etching process is started, but the introduction of the He gas 23 to the back surface of the wafer 1 is continued. When the second-stage etching process is completed, the mass flow controller 22 is closed, the introduction of the He gas 23 is stopped, and the vacuum pump 26 exhausts the gas. After that, the switch 18 is connected to the terminal 20 and both ends of the electrostatic attraction electrode 13 are grounded for a certain time, and then the plasma 6
Disappear.

【0010】以上のように動作させた場合の1段目から
2段目へのプロセスの切り替え時、2段目のエッチング
終了時の吸着力の残留特性について図4及び図5により
説明する。図において、まず、絶縁膜11に充電された
電荷は、第1段目から第2段目への切り替え時に、可変
抵抗15とコンデンサ16の並列回路17を介して放電
される。このために可変抵抗15の抵抗値R1を絶縁膜
11の抵抗値Rより大きく、コンデンサ16の静電容量
1をウエハ1と絶縁膜11の隙間の静電容量Cより大
きく調整することにより放電時定数はR11となるので
RCより長くなり、プラズマ6が消滅してもウエハ1裏
面のHeガス23の圧力によりウエハ1が外れることな
く保持できる。次に、2段目のエッチング終了時につい
ては、静電吸着電極13の両端を接地するので絶縁膜1
1からの電荷の放電時定数は、絶縁膜11の抵抗値Rと
ウエハ1と絶縁膜11の隙間の静電容量Cの積となり、
絶縁膜11であるSiC焼結体の抵抗値Rを小さく設定
しておくことにより短くなるので、吸着力はすみやかに
低減され、ウエハ1を静電吸着電極13からスム−ズに
解放できる。
The residual characteristics of the adsorption force at the time of switching the process from the first stage to the second stage when the above operation is performed will be described with reference to FIGS. 4 and 5. In the figure, first, the electric charge charged in the insulating film 11 is discharged through the parallel circuit 17 of the variable resistor 15 and the capacitor 16 when switching from the first stage to the second stage. Therefore, by adjusting the resistance value R 1 of the variable resistor 15 to be larger than the resistance value R of the insulating film 11 and the electrostatic capacitance C 1 of the capacitor 16 to be larger than the electrostatic capacitance C of the gap between the wafer 1 and the insulating film 11. Since the discharge time constant is R 1 C 1 , it is longer than RC, and even if the plasma 6 is extinguished, the pressure of the He gas 23 on the back surface of the wafer 1 can hold the wafer 1 without detaching it. Next, when the etching of the second stage is completed, both ends of the electrostatic attraction electrode 13 are grounded, so that the insulating film 1
The discharge time constant of the electric charge from 1 is the product of the resistance value R of the insulating film 11 and the electrostatic capacitance C of the gap between the wafer 1 and the insulating film 11,
Since the resistance value R of the SiC sintered body that is the insulating film 11 is set to be small, the resistance value is shortened, so that the attraction force is quickly reduced and the wafer 1 can be released from the electrostatic attraction electrode 13 in a smooth manner.

【0011】次に、プラズマ6消滅時、ウエハ1解放時
の残留吸着力を測定した結果を図6及び図7に示す。図
において、測定は、絶縁膜11として抵抗が8.1×1
4ΩのSiC焼結体を用い、可変抵抗15の抵抗値を
1×107Ω、コンデンサ16の静電容量を3×10~6
Fとして行った。この結果より、プラズマ6を消滅した
際の残留吸着力は、印加電圧に依存するが約60S後に
おいても約0.2N/cm2の吸着力が残留しており、H
eガス23によるウエハ1の裏面圧力を十分維持でき
た。また、ウエハ1を解放する際の残留吸着力は、瞬時
に目標の0.02N/cm2以下に低下しており、ウエハ
1の搬送に問題を生じなかった。
Next, FIG. 6 and FIG. 7 show the results of measuring the residual adsorption force when the plasma 6 is extinguished and when the wafer 1 is released. In the figure, the measurement shows that the insulating film 11 has a resistance of 8.1 × 1.
Using a SiC sintered body of 0 4 Ω, the resistance value of the variable resistor 15 is 1 × 10 7 Ω, and the capacitance of the capacitor 16 is 3 × 10 6
I went as F. From this result, the residual adsorption force when the plasma 6 is extinguished depends on the applied voltage, but the adsorption force of about 0.2 N / cm 2 remains even after about 60 S.
The backside pressure of the wafer 1 due to the e gas 23 could be sufficiently maintained. In addition, the residual suction force when releasing the wafer 1 was instantaneously lowered to the target value of 0.02 N / cm 2 or less, and there was no problem in the transfer of the wafer 1.

【0012】本発明では、以上のように残留吸着力をコ
ントロ−ルできるので1段目と2段目のエッチング処理
の間にHeガス23を排気、導入する工程を省略するこ
とができ、スル−プットを向上できる。
In the present invention, since the residual adsorption force can be controlled as described above, the step of exhausting and introducing the He gas 23 between the first and second etching processes can be omitted, and the sulfur gas can be omitted. -The put can be improved.

【0013】[0013]

【発明の効果】本発明によれば、ウエハを多段エッチン
グでスル−プットよく処理するのに好適な静電吸着装置
および方法を提供することができる。
According to the present invention, it is possible to provide an electrostatic chucking device and method suitable for processing a wafer with good throughput by multi-step etching.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を適用したエッチング装置の
全体構成を示した説明図である。
FIG. 1 is an explanatory diagram showing an overall configuration of an etching apparatus to which an embodiment of the present invention is applied.

【図2】本発明の一実施例を適用した静電吸着電極の構
成を示した説明図である。
FIG. 2 is an explanatory diagram showing a configuration of an electrostatic attraction electrode to which an embodiment of the present invention is applied.

【図3】本発明の一実施例の多段エッチング方法を説明
する図である。
FIG. 3 is a diagram illustrating a multi-step etching method according to an embodiment of the present invention.

【図4】本発明の一実施例の吸着力の残留特性を説明す
る図である。
FIG. 4 is a diagram illustrating a residual characteristic of an attraction force according to an embodiment of the present invention.

【図5】本発明の一実施例の吸着力の残留特性を説明す
る図である。
FIG. 5 is a diagram illustrating the residual characteristics of the suction force according to the embodiment of the present invention.

【図6】本発明の一実施例の残留吸着力の測定結果を示
した図である。
FIG. 6 is a diagram showing a measurement result of residual adsorption force according to an example of the present invention.

【図7】本発明の一実施例の残留吸着力の測定結果を示
した図である。
FIG. 7 is a diagram showing a measurement result of residual adsorption force according to an example of the present invention.

【符号の説明】[Explanation of symbols]

11…絶縁膜、13…静電吸着電極、14…直流電源、
15…可変抵抗、16…コンデンサ、17…並列回路。
11 ... Insulating film, 13 ... Electrostatic adsorption electrode, 14 ... DC power supply,
15 ... Variable resistance, 16 ... Capacitor, 17 ... Parallel circuit.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】試料を絶縁膜との間に発生させた静電吸着
力により支持する静電吸着装置において、直流電源とス
イッチと絶縁膜により構成された静電吸着回路に抵抗と
コンデンサの並列回路を設け、さらにスイッチを介して
並列に抵抗を設けたことを特徴とする静電吸着装置。
1. An electrostatic adsorption device for supporting a sample by an electrostatic adsorption force generated between the sample and an insulating film, wherein a resistance and a capacitor are connected in parallel to an electrostatic adsorption circuit composed of a DC power supply, a switch and an insulating film. An electrostatic adsorption device characterized in that a circuit is provided and a resistor is provided in parallel via a switch.
【請求項2】ウエハを吸着する際には抵抗とコンデンサ
の並列回路を介して絶縁膜に直流電圧を印加し、ウエハ
を解放する際には可変抵抗とコンデンサの並列回路を介
さずに絶縁膜を接地するようにスイッチにより操作する
ことを特徴とする静電吸着方法。
2. When a wafer is attracted, a DC voltage is applied to the insulating film via a parallel circuit of a resistor and a capacitor, and when releasing the wafer, the insulating film is bypassed without a parallel circuit of a variable resistor and a capacitor. An electrostatic adsorption method characterized in that the switch is operated so as to be grounded.
JP697295A 1995-01-20 1995-01-20 Electrostatic chuck and its method Pending JPH08203989A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP697295A JPH08203989A (en) 1995-01-20 1995-01-20 Electrostatic chuck and its method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP697295A JPH08203989A (en) 1995-01-20 1995-01-20 Electrostatic chuck and its method

Publications (1)

Publication Number Publication Date
JPH08203989A true JPH08203989A (en) 1996-08-09

Family

ID=11653125

Family Applications (1)

Application Number Title Priority Date Filing Date
JP697295A Pending JPH08203989A (en) 1995-01-20 1995-01-20 Electrostatic chuck and its method

Country Status (1)

Country Link
JP (1) JPH08203989A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023137777A1 (en) * 2022-01-19 2023-07-27 长鑫存储技术有限公司 Semiconductor apparatus, semiconductor device, and semiconductor process method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023137777A1 (en) * 2022-01-19 2023-07-27 长鑫存储技术有限公司 Semiconductor apparatus, semiconductor device, and semiconductor process method

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