JPH08203916A - Structure of bipolar ic - Google Patents

Abstract

PURPOSE: To provide the title structure of bipolar IC wherein parasitic PMOS leakage current is prevented from being generated between n-type layers or adjacent elements. CONSTITUTION: Within a bipolar IC 10 wherein an n+type buried layer 12 is formed on the p-type silicon substrate 11 by thermal diffusion, etc., an n-type layer 13 is formed on the layer 13 extending over the whole surface by epitaxial growing step, and the n-type layer 13 is isolated by forming a p+type separating layer 14 around the layer 13 furthermore, after forming a p+type diffused layer 15 on the surface of the n-type layer 13 by thermal diffusion, a wiring layer 18 connecting to the p+type diffused layer 15 is formed and finally, a protecting layer 19 extending over the whole surface is formed, a bipolar IC is fubricated so that an n+type diffused layer 16 may be so formed as to encircle the p+type diffused layer 15 on the surface of the n-type layer 13 between the p+type diffused layer 15 and the p+type isolation layer 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar IC structure having an epitaxial growth layer formed by a bipolar process.

[0002]

2. Description of the Related Art Conventionally, a bipolar IC is shown in FIG.
It is configured as shown in FIG. That is, in FIG. 4, the bipolar IC 1 has an n + type buried layer 3 formed on the surface of the p type silicon substrate 2 by thermal diffusion or the like, and n is formed by epitaxial growth over the entire surface of the substrate 2. Form the mold layer 4.

Subsequently, a p + type layer 5 is formed around the n− type layer 4.
Is formed, the n − type layer 4 is separated, and a p + type diffusion layer 6 is formed on the surface of the n − type layer 4 by thermal diffusion.

After that, an insulating layer 7 made of SiO2 is formed on the surface, and a window 7a is provided in the insulating layer 7, and p
The + type diffusion layer 6 is exposed. Then, a wiring layer 8 made of aluminum is formed on the insulating layer 7, and finally, a protective layer 9 made of nitride is formed over the entire surface to complete the bipolar IC.

[0005]

However, in the bipolar IC 1 having such a structure, in an environment of high temperature and high humidity, moisture penetrates into the inside from an outer coat such as a mold made of epoxy resin or the like.
Therefore, a negative charge is attracted to the surface of the protective film,
The electric field causes positive charges to be accumulated along the surface of the n − -type layer 4, which is an epitaxial growth layer, as schematically shown in FIG. Therefore, the surface of the n− type layer 4 undergoes p inversion, and the p + type layer 5 around the p + type diffusion layer 6 passes through the p inversion region of the n− type layer 4.
A leak current will flow to the so-called parasitic PMOS.
A leak current will be generated.

When the bipolar IC 1 has adjacent elements, the p + type diffusion layer 6 of the adjacent elements is used.
In the meantime, a leak current similarly flows, and a so-called parasitic PMOS leak current occurs.

Due to the occurrence of such a leak current, the resistance value of the element of the bipolar IC changes, and the operation failure of the element occurs, which causes a problem that the reliability of the bipolar IC deteriorates.

In view of the above points, the present invention has an object to provide a structure of a bipolar IC in which a parasitic PMOS leakage current is not generated between an n-type layer or adjacent elements.

[0009]

The above object is to form an n + type buried layer on the surface of a p type silicon substrate by thermal diffusion or the like, and perform epitaxial growth over the entire surface to form an n− type layer. Is formed and a p + type separation layer is formed around it to separate the n− type layer, and
After the p + type diffusion layer is formed on the surface of the − type layer by thermal diffusion, a wiring layer connected to the p + type diffusion layer is formed, and finally,
In a bipolar IC formed by forming a protective layer over the entire surface, the p + type diffusion layer is surrounded by the surface of the n− type layer between the p + type diffusion layer and the p + type separation layer. Thus, it is achieved by the structure of a bipolar IC characterized in that an n + type diffusion layer is formed.

In the bipolar IC according to the present invention, the wiring layer preferably extends in a region corresponding to the surface of the n-type layer between the p + type diffusion layer and the p + type separation layer.

Further, the above object is to form n + type buried layers adjacent to each other on the surface of a p type silicon substrate by thermal diffusion or the like, and form an n− type layer by epitaxial growth over the entire surface. Then, a p + type diffusion layer is formed on the surface of the n− type layer above the n + type buried layer by thermal diffusion, and then a wiring layer connected to the p + type diffusion layer is formed. Finally, In a bipolar IC formed by forming a protective layer over the entire surface, the wiring layer extends to a region corresponding to the surface of the n− type layer between adjacent p + type diffusion layers. This is achieved by the structure of the bipolar IC, which is characterized by an extension.

[0012]

According to the above construction, the n-type layer between the p + type diffusion layer and the p + type separation layer is provided with the n + type diffusion layer formed so as to surround the p + type diffusion layer. Therefore, even when a high voltage is continuously applied under the environment of high temperature and high humidity, no positive charge is accumulated in the region of the n + type diffusion layer. No p inversion of the surface region occurs, and no leak current flows from the p + type diffusion layer to the p + type separation layer.

Further, according to the second structure, since the wiring layer extends so as to face the n-type layer between the p + type diffusion layers adjacent to each other, the wiring layer is extended in an environment of high temperature and high humidity. Even when a high voltage is continuously applied, in the surface region of the n-type layer, since the wiring layer is connected to the high potential side, the electric field attracts negative charges to the surface of the n-type layer. Therefore, the positive charge does not accumulate, and therefore, the p + type diffusion layer of one element is connected to the p + type of the adjacent element.
No leak current flows into the type diffusion layer.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below based on the embodiments shown in the drawings. 1 and 2 show an embodiment of a bipolar IC according to the present invention. That is, in FIG. 1 and FIG. 2, the bipolar IC 10 has an n + type buried layer 12 formed on the surface of a p-type silicon substrate 11 by thermal diffusion or the like, and then is epitaxially grown on the entire surface of the substrate 11. The n− type layer 13 is formed.

Then, around the n + type buried layer 12,
By forming the p + type separation layer 14 on the surface of the n− type layer 13, the n− type layer 13 is separated, and at the same time, on the surface of the n− type layer 13 corresponding to the n + type embedded layer 12, The p + type diffusion layer 15 is formed. Further, the p + type separation layer 14 and p
Between the + type diffusion layers 15 and around the p + type diffusion layer 15,
An n + type diffusion layer 16 is formed on the surface of the n− type layer 13.

Thereafter, as in the conventional case, an insulating layer 17 made of SiO 2 is formed on the entire surface of the substrate 11 from above, and a window 17a is provided in the insulating layer 17 to expose the p + type diffusion layer 15. To be done. Then, a wiring layer 18 made of aluminum is formed on the insulating layer 17, and finally, a protective layer 19 made of nitride is formed over the entire surface to complete the bipolar IC.

The bipolar IC 10 according to the present invention is configured as described above, and in a high-temperature and high-humidity environment, a wiring layer is formed in a state where moisture penetrates into the inside from an outer coat such as a mold made of epoxy resin or the like. Even if negative ions accumulate on the surface of the protective layer 19 due to ionization of the water when a high voltage is continuously applied to the 18, the corresponding diagram is schematically shown in FIG. As shown, the n-type layer 13 which is an epitaxial growth layer
Positive ions are accumulated along the surface of the n − -type diffusion layer 16, but since the n + -type diffusion layer 16 is formed on the surface in the intermediate region of the n − -type layer 13, positive ions are accumulated in the n + -type diffusion layer 16. Does not accumulate. Therefore, from the p + type diffusion layer 15,
No leak current flows toward the surrounding p + type isolation layer 14.

FIG. 3 shows another embodiment of the bipolar IC according to the present invention, in which two elements are arranged adjacent to each other. In FIG. 3, the bipolar IC 20
Forms two n + type buried layers 22a and 22b on the surface of the p type silicon substrate 21 by thermal diffusion or the like, and then forms an n− type layer 23 by epitaxial growth over the entire surface of the substrate 21. To do.

Then, on the surface of the n-type layer 23 corresponding to the n + type buried layers 22a, 22b, the p + type diffusion layers 24a, 24a,
24b is formed.

Thereafter, as in the conventional case, an insulating layer 25 made of SiO2 is formed on the entire surface of the substrate 21 from above, and a window 25a is provided in the insulating layer 25 to expose the p + type diffusion layer 24a. To be done. Then, a wiring layer 26 made of aluminum is formed on the insulating layer 25. In this case, the wiring layer 26 is the p + type diffusion layers 24a, 2
It is formed so as to extend to a region corresponding to the surface of the n-type layer 23 between 4b, and is connected to the high potential side. Then, finally, the bipolar IC 20 is completed by forming the protective layer 27 made of nitride over the entire surface.

The bipolar IC 20 having the above structure
According to the above, when a high voltage is continuously applied to the wiring layer 26 in an environment of high temperature and high humidity in a state where moisture penetrates into the inside from an outer coat such as a mold made of epoxy resin or the like. Even if negative ions are accumulated on the surface of the protective layer 27 due to the ionization of this moisture, the wiring layer 26 is interposed between the surface of the protective layer 27 and the surface of the n-type layer 23, so that the n- The mold layer 23 is the wiring layer 2
Can be shielded by 6. Therefore, the n
Positive ions do not accumulate on the surface of the − type layer 23. Thus, the p + type diffusion layer 24a of one device
To the p + type diffusion layer 24b of the adjacent element,
No leak current flows.

The above-mentioned embodiment, that is, the bipolar IC
10, in the same manner as the second embodiment, the wiring layer 18 is
Between the p + type diffusion layer 15 and the p + type separation layer 14, it may be formed so as to extend to a region corresponding to the surface of the n− type layer 13 and be connected to the high potential side. In this case, n-
Since the accumulation of positive ions on the surface of the mold layer 13 can be eliminated, the generation of leak current from the p + type diffusion layer 15 to the p + type separation layer 14 can be more completely suppressed.

[0023]

As described above, the p + type diffusion layer and the p + type
The n-type layer between the type separation layer is provided with an n + type diffusion layer formed so as to surround the p + type diffusion layer, or the n + type diffusion layer and the p + type separation layer are provided. Since the wiring layer extends so as to face the n-type layer between the two, the surface area of the n-type layer can be maintained even when a high voltage is continuously applied in an environment of high temperature and high humidity. No p inversion occurs, and no leak current flows from the p + type diffusion layer to the p + type separation layer. Thus, the generation of so-called parasitic PMOS leakage current to the n-type layer or the adjacent element can be prevented, so that the resistance value of the element of the bipolar IC can be prevented from changing and the operation failure can be suppressed. Become.

Thus, according to the present invention, it is possible to provide an extremely excellent structure of the bipolar IC in which the parasitic PMOS leakage current is not generated between the n-type layer or the adjacent elements.

[Brief description of drawings]

FIG. 1 is a schematic sectional view showing an embodiment of a bipolar IC according to the present invention.

FIG. 2 is a schematic plan view of the bipolar IC of FIG.

FIG. 3 is a schematic sectional view showing another embodiment of the bipolar IC according to the present invention.

FIG. 4 is a schematic sectional view showing an example of a conventional bipolar IC.

[Explanation of symbols]

 10, 20 Bipolar IC 11, 21 p-type silicon substrate 12, 22a, 22b n + type burying layer 13, 23 n− type layer 14, 24a, 24b p + type separation layer 15 p + type diffusion layer 16 n + type diffusion layer 17, 25 Insulating layer 18,26 Wiring layer 19,27 Protective layer

Claims (3)

[Claims] 1. An n + -type buried layer is formed on the surface of a p-type silicon substrate by thermal diffusion or the like, and an n − -type layer is formed by epitaxial growth over the entire surface, and a p + -type layer is formed around the surface. By forming a separation layer, the n-
The p-type diffusion layer is separated by thermal diffusion on the surface of the n-type layer, and then a wiring layer connected to the p + type diffusion layer is formed. Finally, over the entire surface, In a bipolar IC formed by forming a protective layer, an n + type diffusion layer is formed between the p + type diffusion layer and the p + type separation layer so as to surround the p + type diffusion layer on the surface of the n− type layer. A bipolar IC structure characterized in that a diffusion layer is formed. 2. The bipolar layer according to claim 1, wherein a wiring layer extends in a region corresponding to the surface of the n− type layer between the p + type diffusion layer and the p + type separation layer. IC structure. 3. An n + -type buried layer adjacent to each other is formed on the surface of a p-type silicon substrate by thermal diffusion or the like, and n is formed by epitaxial growth over the entire surface.
A n-type layer is formed on the n + type buried layer.
After forming the p + type diffusion layer on the surface of the mold layer by thermal diffusion, a wiring layer connected to the p + type diffusion layer is formed, and finally,
In a bipolar IC formed by forming a protective layer over the entire surface, the wiring layer is formed between p + type diffusion layers adjacent to each other.
A structure of a bipolar IC, characterized in that it extends to a region corresponding to the surface of the n-type layer.