JPH08195402A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE: To reduce the warp of a pellet as far as possible when the pellet is mounted on a package. CONSTITUTION: A recessed part 18 which is opened on the rear side of a GaAs substrate 11 is formed in such a way that a substrate thickness under an FET 17 in the substrate becomes smaller than a substrate thickness under other regions. A PHS 19 which is bonded to the substrate 11 at the inner face of the recessed part 18 under the PET 17, which comprises a space part 21 not coming into contact with the substrate 11 other than this bonding region 19a and which is used to dissipate heat generated from the PET 17 is formed inside the recessed part 18.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a device such as a field effect transistor serving as a heat generation source is formed on a substrate and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, compound semiconductors, especially GaAs and I
nP or a mixed crystal thereof has high electron mobility and has a large maximum saturation value of electron velocity in a high electric field region, and thus has been attracting attention as a material capable of realizing a field effect transistor having a high cutoff frequency. On the other hand, since this type of element uses a high-resistance semiconductor substrate, it has a drawback that the heat dissipation is poor and the thermal resistance value is large. In particular, high output Ga with large power consumption
In As MES FET, the channel temperature during operation is high,
It is extremely disadvantageous in terms of reliability. Also, in terms of characteristics, the mobility decreases at high temperatures, which is not preferable.

Therefore, as a countermeasure against this problem, PHS
(Plated Heat Sink) structure is adopted. That is, the PHS structure in the conventional field effect transistor (hereinafter referred to as FET) is as shown in FIG.
As shown in (a) to (c), the recessed portion 3 in which the thickness of the GaAs substrate 2 immediately below the active region of the FET portion 1 is thinner than other regions, and the GaAs substrate 2 including this recessed portion 3 It has PHS4 (metal for heat dissipation) formed by filling the back surface with gold by plating (see, for example, JP-A-60-
46076).

In the conventional PHS structure, GaA
s Pellets 5 with PHS4 formed by gold plating on the recess 3 provided directly below the active region forming portion of the FET part 1 from the back surface of the substrate 2 are mounted on the package 6 to generate from the active region during FET operation. GaA when handling a GaAs substrate by tweezers, etc. by increasing the heat dissipation effect of the heat to reduce the thermal resistance and increasing the thickness of the GaAs substrate other than immediately below the active region forming portion.
s It is characterized in that the substrate 2 is prevented from cracking.

[0005]

In the above-mentioned conventional FET pellet having the PHS structure, when the pellet is mounted on the package by the solder material, for example, gold / tin (Au / Sn) solder is used as the solder material. In this case, heating and cooling steps up to about 350 ° C. are performed, but there is a problem that warpage occurs due to the difference in thermal expansion coefficient between GaAs forming the substrate and gold forming the PHS. Then, due to the occurrence of the warp, stress is applied to the GaAs substrate, so that piezo electric charges are generated inside the FET to change the pinch-off voltage Vp, the gate-drain breakdown voltage is changed, and the electrode of the pellet is changed. There is a problem that when the wire is bonded to the wire, the variation of the wire length due to the warp of the pellet deteriorates the high frequency characteristics. Therefore, it has been necessary to reduce the warpage when mounting the pellet on the package.

The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a semiconductor device and a manufacturing method thereof capable of reducing the warpage of the pellet when mounting the pellet on the package. And

[0007]

In order to achieve the above-mentioned object, a semiconductor device of the present invention has a device serving as a heat generation source formed on a semiconductor substrate, and the heat generated from the device is formed on the back surface of the semiconductor substrate. In a semiconductor device in which a heat-dissipating metal for dissipating heat is formed on the semiconductor substrate, the semiconductor substrate has a substrate thickness below the device in the semiconductor substrate is thinner than a substrate thickness below other regions. Is formed in the recess on the back side of the device, and a space is formed inside the recess that is bonded to the semiconductor substrate at the inner surface of the recess below the device and does not contact the semiconductor substrate except at this bonding portion. The heat-dissipating metal has is formed. Further, a via hole penetrating from the inner surface of the recess of the semiconductor substrate to the back surface of the source electrode of the device is formed in the semiconductor substrate, and the heat dissipation metal formed inside the recess also covers the inner surface of the via hole. You may form so that it may be covered.

The method of manufacturing a semiconductor device according to the present invention is
After forming the device on the front surface of the semiconductor substrate, the recess is formed by etching using a photoresist formed on the back surface of the semiconductor substrate so that the lower side of the device is opened, and the inner surface of the recess The metal for heat dissipation is formed by performing gold plating using a photoresist formed so as to cover the device and opening the lower side of the device as a mask, and then removing the photoresist. Further, after forming the concave portion, the via hole is formed by performing etching using a photoresist as a mask, and the photoresist formed so as to cover the inner surface of the concave portion and open below the device is used as a mask. The metal for heat dissipation may be formed by removing the photoresist after performing gold plating.

[0009]

According to the semiconductor device of the present invention, when the pellet is mounted on the package by a solder material such as gold / tin (Au / Sn) solder, a heating / cooling process up to about 350 ° C. is performed. Normally, even if the heat dissipation metal made of a material such as gold having a large thermal expansion coefficient expands with respect to the semiconductor substrate made of a material such as GaAs, the heat dissipation metal formed inside the recess and the surrounding semiconductor substrate Since there is a space in the structure, the stress generated by the thermal expansion of the heat-dissipating metal is prevented from being transmitted to the surrounding semiconductor substrate.

Therefore, in a conventional semiconductor device having a PHS structure, pellet warpage occurs in the heating step, and the curing rate of the solder material is faster than the rate at which the warpage returns in the next cooling step. In the semiconductor device of the present invention, the stress generated by the thermal expansion of the heat-dissipating metal can be reduced from being transmitted to the surrounding semiconductor substrate in the semiconductor device of the present invention, while it is fixed to the package in a warped state. Since the warpage in the process can be reduced, the pellet after mounting is prevented from being fixed to the package in a warped state as compared with the pellet before mounting.

On the other hand, regarding the heat dissipation effect of the semiconductor device of the present invention, since the recess is formed so that the substrate thickness below the device in the semiconductor substrate is thinner than the substrate thickness below the other regions, the thermal resistance of the substrate is reduced. In addition to being small, the heat dissipation metal is bonded to the semiconductor substrate at the inner surface of the recess below the device, so that the heat flow flowing downward from the device, which is the heat generation source, is sufficient through the heat dissipation metal. Dissipated.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a diagram showing a semiconductor device 10 of this embodiment, and FIG.
0 is a plan view (front surface), FIG. 1 (b) is a plan view (back surface), and FIG. 1 (c) is a sectional view taken along line AA.

As shown in FIG. 1A, a GaAs substrate 1
1 (semiconductor substrate) on the active region 12 by a conventional technique,
Drain electrode 13, source electrode 14, gate electrode 15,
An FET 17 (device) made of the insulating film 16 is formed. Further, FIG. 1B is a view of the FET 17 portion of FIG.
A PHS (metal for heat dissipation) made of gold is formed inside the recess 18 (PHS formation region) formed at the position corresponding to the back surface of the.

FIG. 1C is a cross-sectional view taken along the line AA in FIGS. 1A and 1B and shows the GaAs substrate 11
In order to make the substrate thickness below the FET 17 in the region of FIG. 2 thinner than the substrate thickness under the other regions, a concave portion 18 having a curved inner surface opening to the rear surface side of the GaAs substrate 11 is formed.
A current-carrying film 20 having a two-layer structure of, for example, titanium (Ti) having a film thickness of 50 nm and gold (Au) having a film thickness of 200 nm is formed so as to cover the inner surface of the substrate and the back surface of the GaAs substrate 11.

Then, as shown in FIG. 1 (c), GaA
In the inner surface of the recess 18 of the substrate 11, the conductive film 2 is formed in a region slightly outside the active region 12 of the FET 17 in size.
A PHS 19 joined to the GaAs substrate 11 via 0 is formed. In addition, PHS19 is this junction area 1
Except for 9a, the shape is such that it does not come into contact with the conducting film 20, that is, the GaAs substrate 11, and therefore PHS 19 and Ga
A space 21 is provided between the As substrate 11 and the As substrate 11.

Next, a manufacturing process of the semiconductor device 10 having the above structure will be described with reference to FIGS. Note that P
It is a well-known technique to use the glass plate 23 and the bonding material 24 when forming the HS structure, and is omitted from FIG. 2B and subsequent figures for simplification of the drawing. First,
As shown in FIG. 2A, a FET having an active region 12
The front surface side (the side where the FET 17 is formed) of the wafer-shaped GaAs substrate 11 on which 17 is formed is attached to the glass plate 23 as a reinforcing material by using an attaching material 24 made of, for example, a resist. Then, from the back side of the substrate, the substrate thickness 15
After polishing the GaAs substrate 11 to about 0 μm,
A photoresist 25 in which a region corresponding to the back surface of the active region 12 is opened and the other region is covered on the polished surface 11a.
To form.

Next, as shown in FIG. 2B, when the GaAs substrate 11 is wet-etched with a chlorine-based etching solution using the photoresist 25 as a mask until the substrate thickness reaches about 30 μm, the etching becomes uniform. The concave portion 18 having a curved inner surface is formed due to the progress of the directionality. Then, the photoresist 25 is removed. Next, as shown in FIG. 2C, GaAs having the recess 18 processed in FIG.
On the back surface of the substrate 11, for example, titanium (Ti) 50 nm and gold (Au) 200 nm are sputtered to form the conductive film 20. Then, the active region 12 of the FET 17 is formed on the conductive film 20.
Thickness of 30 μm with an area slightly outside
The photoresist 26 is formed as a mask, and gold plating is performed by using the conductive film 20 exposed in the region.
The PHS 19 is formed by carrying out about 50 μm. After that, when the photoresist 26 interposed between the conductive film 20 and the PHS 19 is removed, the conductive film 20 and the PHS 19 are removed.
A space portion 21 is formed between the space portion 19 and the space 19.

Next, as shown in FIG. 2D, the pellet separation region 28 is formed on the wafer-shaped GaAs substrate 11 by using the photoresist 27 covering the individual pellets as a mask.
Of the current-carrying film 20 is removed by ion milling, and then,
The GaAs substrate 11 itself is removed by etching with a chlorine-based gas to separate the GaAs substrate 11 into pellet units. Finally, by removing the photoresist 27 in FIG. 2D, as shown in FIG.
P having a space portion 21 between the As substrate 11 and the PHS 19
The semiconductor device 10 having the HS structure is completed.

In the semiconductor device 10 of this embodiment, the PHS 19 formed in the recess 18 and the surrounding GaAs substrate 1
Since the space 21 exists between the PHS 19 and 1, the stress generated by the thermal expansion of the PHS 19 can be reduced from being transmitted to the surrounding GaAs substrate 11, and the warpage in the heating process can be reduced. Therefore, the pellet is packaged by using the solder material. It is possible to prevent the pellets after mounting from being fixed to the package in a warped state compared to the pellets before mounting when mounting on. Therefore, for example, chip size 3
With the mm × 0.8 mm pellet, the conventional PHS structure had a warp with a height of 5 μm in the longitudinal direction, but by applying the PHS structure of the present embodiment, the warp with a height of 1 μm or less is reduced. We were able to.

Due to the reduction of the warp of the pellet, the stress applied to the GaAs substrate 11 causes piezo electric charges to be generated inside the FET 17 formed on the GaAs substrate 11, and the pinch-off voltage Vp of the FET fluctuates. It is possible to improve the problem that the breakdown voltage between the gate and the drain can be improved, and also, when bonding the wire to the electrode of the pellet, it is possible to reduce the variation of the wire length caused by the warp of the pellet, and thus the deterioration of the high frequency characteristics can be improved. It is possible to achieve the effect.

Further, in this embodiment, since the recess 18 is formed so that the substrate thickness under the FET 17 is thinner than the substrate thickness under the other regions, the thermal resistance of the substrate is small, and PHS19 is the active region 1 of FET17
Since it is bonded to the GaAs substrate 11 in a region slightly outside the size of 2, the heat flow flowing from the active region 12 of the FET 17, which is a heat generation source, to spread outward obliquely downward in cross section should be sufficiently dissipated through the PHS 19. You can Therefore, the PHS structure of the present embodiment can maintain the heat radiation effect equivalent to that of the conventional structure while reducing the warpage of the pellet.

Further, the conductive film 20 is provided to form the PHS 19, but since the conductive film 20 is used without being removed to the end, the manufacturing process can be simplified because there is no conductive film removing process. it can. In addition, the conductive film 20 having a two-layer structure of titanium and gold is formed on the outer peripheral portion of the pellet.
As a result, the pellet and the package are fixed to each other with appropriate strength through the solder material, so that the strength can be secured when wire-bonding to each electrode of the FET 17.

In the method of manufacturing the semiconductor device 10 of this embodiment, a photoresist 26 having a region slightly outside the active region 12 of the FET 17 opened is formed on the conductive film 20 as a mask, and then gold plating is performed. By performing the above, the PHS 19 having the space portion 21 can be formed between the PHS 19 and the GaAs substrate 11. Therefore, the PHS 19 having the space portion 21 between the PHS structure and the GaAs substrate 11, which is a feature of the PHS structure of this embodiment, can be realized only by adding a simple processing step to the conventional manufacturing step.

A second embodiment of the present invention will be described below with reference to FIG.
Will be described with reference to. FIG. 3 shows a semiconductor device 30 of this embodiment.
FIG. 4 is a cross-sectional view showing the semiconductor device 30 in the same manner as the semiconductor device 10 of the first embodiment, in which the recess 32 is formed on the back surface side of the GaAs substrate 31, and the thermal resistance and the source grounded inductance are reduced. In order to achieve the above, by removing the GaAs immediately below the region where the source electrode 33 is formed, a via hole 34 penetrating from the inner surface of the recess 32 to the back surface of the source electrode 33 is provided.

Also, as in the first embodiment, the GaAs substrate 3 is formed in a region slightly outside the active region of the FET 35.
Although the PHS 36 joined to 1 is formed, at the same time, the gold constituting the PHS 36 is also filled inside the via hole 34. The PHS 36 has a shape that does not come into contact with the GaAs substrate 31 except for the bonding region 36a, and therefore, the space 37 is provided between the PHS 36 and the GaAs substrate 31.

The semiconductor device 30 of this embodiment can be manufactured by only adding a via hole forming process to the manufacturing process of the semiconductor device 10 of the first embodiment shown in FIG. That is, as shown in FIG. 2B, after forming a recess in the GaAs substrate and removing the photoresist, a new photoresist (not shown) is used as a mask to form the source electrode of the FET in the active region. On the other hand, the via hole 34 is formed by dry etching using a chlorine-based gas. After that, through the same process as in FIGS. 2C to 2E, by filling the inside of the via hole 34 with gold by gold plating and simultaneously forming the PHS 36,
The semiconductor device 30 of this embodiment is completed.

Therefore, according to the semiconductor device 30 of the present embodiment, the general effect of a semiconductor device having a via hole, that is, thermal resistance, is obtained by only adding a via hole forming step to the manufacturing process of the semiconductor device 10 of the first embodiment. And the grounded source inductance can be reduced, and similarly to the first embodiment, since the space 37 exists between the PHS 36 and the GaAs substrate 31, the stress due to the thermal expansion of the PHS 36 is applied to the GaAs substrate 31. Transmission can be reduced and warpage of pellets can be reduced.

[0028]

As described above in detail, in the semiconductor device of the present invention, in addition to forming the recess in the semiconductor substrate to reduce the substrate thickness below the device, the heat dissipation formed in the recess Since there is a space between the metal and the surrounding semiconductor substrate, the stress generated by the thermal expansion of the heat-dissipating metal can be reduced from being transmitted to the semiconductor substrate, and the warpage in the heating process can be reduced. When used for mounting in a package, the pellet after mounting can be prevented from being fixed to the package in a warped state than the pellet before mounting. Therefore,
Due to the reduction of the warp of the pellet, the stress applied to the semiconductor substrate causes piezo electric charges inside the device such as a field effect transistor formed on the semiconductor substrate to change the pinch-off voltage of the device. It has an effect of improving the problem of fluctuation in withstand voltage, and also has an effect of reducing variation in wire length due to warpage of the pellet when bonding the wire to the electrode of the pellet and improving deterioration of high frequency characteristics. be able to.

On the other hand, regarding the heat dissipation effect of the semiconductor device of the present invention, since the recess is formed so that the substrate thickness under the device in the semiconductor substrate is thinner than the substrate thickness under the other regions, the thermal resistance of the substrate is reduced. In addition, since the heat dissipation metal is bonded to the semiconductor substrate at the inner surface of the recess below the device, the heat flow flowing downward from the device, which is the heat generation source, is sufficiently dissipated through the heat dissipation metal. be able to. Therefore, the semiconductor device of the present invention can maintain the heat radiation effect equivalent to that of the conventional semiconductor device while reducing the warpage of the pellet.

Further, in the method for manufacturing a semiconductor device of the present invention, after forming a recess in a semiconductor substrate, gold plating is performed using a photoresist formed so as to cover the inner surface of the recess and open below the device. By doing so, a heat-dissipating metal having a space between the semiconductor substrate and the semiconductor substrate can be formed. Therefore, the heat-dissipating metal having the space between the semiconductor substrate and the semiconductor substrate, which is a feature of the present invention, can be realized only by adding a simple processing step to the conventional manufacturing step.

[Brief description of drawings]

1A and 1B are plan views (front surface), (b) plan view (back surface), and (c) showing a semiconductor device according to a first embodiment of the present invention.
It is sectional drawing which follows the AA line in (a) and (b).

FIG. 2 is a cross-sectional view showing the manufacturing process of the semiconductor device step by step.

FIG. 3 is a sectional view showing a semiconductor device according to a second embodiment of the present invention.

4A is a plan view showing a semiconductor device having a PHS structure as an example of the related art, FIG. 4B is a sectional view taken along line BB in FIG. 4B, and C- in FIG. 4C. It is sectional drawing which follows the C line.

[Explanation of symbols]

 10, 30 Semiconductor device 11, 31 GaAs substrate (semiconductor substrate) 17, 35 FET (device) 18, 32 Recessed portion 19, 36 PHS (metal for heat dissipation) 21, 37 Space portion 25, 26 Photoresist 33 Source electrode 34 Via hole

Claims (4)

[Claims] 1. A semiconductor device in which a device serving as a heat generation source is formed on a semiconductor substrate, and a heat radiating metal for radiating heat generated from the device is formed on a back surface side of the semiconductor substrate. In the semiconductor substrate, a recess opening to the back side of the semiconductor substrate is formed so that the substrate thickness below the device in the semiconductor substrate is thinner than the substrate thickness below the other region. The semiconductor device is characterized in that a heat-dissipating metal is formed on the inner surface of the concave portion, the heat-dissipating metal having a space portion that is joined to the semiconductor substrate and does not contact the semiconductor substrate except the joint portion. 2. The semiconductor device according to claim 1, wherein a via hole penetrating from the inner surface of the recess of the semiconductor substrate to the back surface of the source electrode of the device is formed in the semiconductor substrate and is formed inside the recess. The semiconductor device, wherein the heat-dissipating metal is formed so as to cover the inner surface of the via hole. 3. The method of manufacturing a semiconductor device according to claim 1, wherein after the device is formed on the front surface of the semiconductor substrate, the device is formed on the back surface of the semiconductor substrate so that the lower side of the device is opened. The recess is formed by etching using the photoresist as a mask, gold plating is performed using the photoresist formed so as to cover the inner surface of the recess and the lower side of the device is opened, and then the photoresist is removed. A method of manufacturing a semiconductor device, wherein the heat dissipation metal is formed by removing the heat dissipation metal. 4. The method of manufacturing a semiconductor device according to claim 2, wherein the device is formed on the front surface of the semiconductor substrate, and then the lower side of the device is formed on the back surface of the semiconductor substrate. The recess is formed by etching using the photoresist as a mask, and then the via hole is formed by performing etching using the photoresist as a mask. Then, the inner surface of the recess is covered and the lower side of the device is opened. After performing gold plating using the photoresist formed as described above as a mask,
A method of manufacturing a semiconductor device, wherein the heat dissipation metal is formed by removing the photoresist.