JPH081943B2 - Semiconductor integrated circuit package - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit (IC
The present invention relates to a semiconductor integrated circuit package for mounting an IC), and particularly to a semiconductor package that realizes a multi-pin IC.

[0002]

2. Description of the Related Art Conventionally, a semiconductor integrated circuit package of this type has been used for supplying power to a mounted semiconductor integrated circuit or inputting / outputting a signal like a QFP (Quad Flat Package) 50 shown in FIG. The external connection terminals 51 are provided only on the outer edge of the package, or like the external connection terminals 62 of the PGA (Pin Grid Array) 60 shown in FIG. 6, the bottom surface of the package (the package is mounted on the substrate Sometimes it is arranged only on the surface on the substrate side).

[0003]

In the conventional semiconductor integrated circuit package described above, in response to the recent demand for accelerated high integration of ICs and increase in the number of pins, the pin pitch is being miniaturized. However, there is a problem in that it is technically difficult to realize a higher number of pins from the present stage on this extension line even in the soldering process at the time of mounting.

[0004]

The semiconductor integrated circuit package of the present invention In order to achieve the above object, according to a plurality of external connection terminal to which the are connected to the substrate to the respective bottom surface of the substrate to be outer sides and mounted provided, either outer side or bottom External on either side
Use only the connection terminals as power terminals, and
It is characterized in that only the provided external connection terminals are used as signal terminals .

[0005]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view showing an embodiment of a semiconductor package of the present invention.

In FIG. 1, 10 is a semiconductor integrated circuit package, and 11 and 12 are external connection terminals for supplying power and inputting / outputting control signals and data signals to / from the ICs mounted in the semiconductor integrated circuit package.

[0008] embodiment shown in FIG. 1, a QFP shown in FIG. 5 is a conventional package, which features a structure as to integrally and PGA shown in FIG. 6, in particular of the package 10 is here The external connection terminal 11 at the outer edge is a signal terminal
And a, also it is described with a case of using the external connection terminals 12 of the bottom portion of the package 10 as a power supply terminal that includes a grounding potential terminal as an example.

Power is supplied to the semiconductor integrated circuit mounted in the semiconductor package 10 from an external connection terminal 12 on the bottom surface of the package, and a control signal and a data signal are supplied from the external connection terminal 11 on the outer edge of the package. Input and output.

FIG. 2 is a sectional view of another embodiment of the present invention in which the external connection terminals on the bottom surface of the semiconductor integrated circuit package shown in FIG. 1 have a bump structure.

In the case of this embodiment as well, as in the embodiment of FIG. 1, the IC mounted on the semiconductor integrated circuit package 20 is supplied with power from the external connection terminals indicated by 22 on the bottom surface of the package, and the outer peripheral portion of the package. A control signal and a data signal are input and output from the external connection terminal indicated by 21.

As in the embodiment shown in FIG. 1 or 2,
An external connection terminal that supplies power to the IC and inputs and outputs signals
As in the conventional package shown in FIG. 5 or FIG. 6, by disposing not only on the outer edge or on the bottom of the package but on both the outer edge and the bottom of the package, the pin pitch of the semiconductor package can be reduced. As a result, more external connection terminals can be obtained than in the conventional package, and the recent demand for accelerated multi-pin ICs can be realized.

Further, as described in the embodiment of FIG. 1 or FIG. 2, the external connection terminals are provided on both the outer edge of the package and the bottom surface of the package, and the power supply terminal and the other signal terminals are connected to each other.
By using them independently such as the bottom of the package and the outer edge of the package, it is possible to prevent accidents such as IC destruction due to signal-power short circuit due to mounting mistakes.
The advantages that can be obtained are obtained.

FIGS. 3 and 4 show the case where the external connection terminals 11 and 21 of the QFP structure around the semiconductor integrated circuit package shown in FIGS. 1 and 2 have an LCC (Leaded Chip Carrier) structure. It is sectional drawing of one Example.

In the case of this embodiment as well, similar to the embodiment of FIGS. 1 and 2, the ICs mounted on the semiconductor integrated circuit packages 30 and 40 have external connection terminals 32 and 4 on the bottom surface of the package.
Power is supplied from 2, and control signals and data signals are input / output from / to the external connection terminals 31 and 41 at the outer edge of the package.

In FIGS. 1 to 4, all external connection terminals are connected by soldering to a circuit on a board on which a semiconductor integrated circuit package is mounted.

In the above embodiment, the external connection terminals on the outer edge of the package are used as signal terminals and the external connection terminals on the bottom surface of the package are used as power supply terminals.
The external connection terminals on the outer edge of the
You can also use the external connection terminal on the bottom as a signal terminal.
Wear.

In the above, the QFP and LCC structures are used as the external connection terminal structures on the outer edge of the package, and the PGA and bump structures are used as the external connection terminal structures on the bottom surface of the package. Inline Packag
The same applies to other package structures such as e) and TAB (Tape Automated Bonding).

[0019]

As described above, according to the present invention, the external connection terminals for supplying power and inputting / outputting control signals and data signals to / from the IC mounted on the semiconductor package are not limited to only the outer edge of the package or only the bottom surface of the package. By arranging them on both the outer edge and the bottom surface of the package, there is an effect that the external connection terminals can be prepared without making the pin pitch fine. Also, the contact of the outer edge of the package
Separate the connecting terminal from the connecting terminal on the bottom of the package
Implementation by using separately for the child and other signal terminals
Signal due to mistake-IC destruction due to power supply short circuit, etc.
You can prevent accidents.

[Brief description of drawings]

FIG. 1 is a sectional view of an embodiment of the present invention.

FIG. 2 is a sectional view of another embodiment of the present invention.

FIG. 3 is a sectional view of another embodiment of the present invention.

FIG. 4 is a sectional view of another embodiment of the present invention.

FIG. 5 is a perspective view of a conventional semiconductor integrated circuit package (QFP).

FIG. 6 is a perspective view of a conventional semiconductor integrated circuit package (PGA).

[Explanation of symbols]

10, 20, 30, 40, 50, 60 Semiconductor packages 11, 12, 21, 22, 31, 32, 41, 42, 5
1,62 External connection terminal

Claims (1)

[Claims] 1. A plurality of external connection terminals connected to the board are provided on the outer edge and the bottom surface on the board side to be mounted, and an external device provided on either the outer edge or the bottom surface.
Use only the connection terminals as power terminals, and
A semiconductor integrated circuit package, wherein only the provided external connection terminals are used as signal terminals .