JPH08191103A - Manufacturing method of semiconductor device - Google Patents

Abstract

PURPOSE: To provide a manufacturing method of a semiconductor device with an excellent step coverage of a connecting hole capable of enhancing the integration by reducing the connecting hole dimension. CONSTITUTION: Within the first constitution, the etching steps of an insulating film 2 to form a connecting hole 4 are performed in the following order i.e., an isotropical wet etching (b), an isotropical dry etching (c) and anisotropical dry etching (d). On the other hand, within the second constitution, said etching steps are performed in the following order i.e., the isotropical wet etching (b), anisotropical dry etching (d) and isotropical dry etching (c). Through these procedures, the step coverage can be enhanced without increasing the size of the connecting hole 4 (without decreasing the degree of integration).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming a contact hole.

[0002]

2. Description of the Related Art In order to improve the step coverage of a connection hole for connecting conductors arranged above and below with an insulating film sandwiched therebetween, a method of tapering the connection hole is disclosed in Japanese Patent Laid-Open No. Hei 5-
Japanese Patent No. 90420 discloses that isotropic dry etching is performed after anisotropic dry etching.

Further, it has been conventionally proposed that anisotropic dry etching is performed after isotropic wet etching.

[0004]

However, in the former method, there is a problem that a sufficient taper cannot be obtained when the diameter of the connection hole is reduced due to miniaturization, and in the latter method, due to lateral expansion due to isotropic wet etching. There is a problem that it is difficult to miniaturize the connection holes. The present invention has been made in view of the above problems, and it is possible to improve the degree of integration by reducing the diameter of the connection hole, and to provide a method for manufacturing a semiconductor device having good step coverage of the connection hole, Its purpose is.

[0005]

The first structure of the present invention is as follows.
In a method of manufacturing a semiconductor device, wherein a connection hole for connecting a conductor or a semiconductor arranged above and below an insulating film is formed by etching the insulating film through an opening of a mask on the insulating film, the etching is isotropic. A method of manufacturing a semiconductor device is characterized in that wet etching, isotropic dry etching, and anisotropic dry etching are performed in this order.

A second structure of the present invention is a semiconductor device in which a connection hole for connecting a conductor or a semiconductor disposed above and below an insulating film is formed by etching the insulating film through an opening of a mask on the insulating film. In the manufacturing method of 1., the etching is performed in the order of isotropic wet etching, anisotropic dry etching, and isotropic dry etching.

A third structure of the present invention is the above-mentioned first or second.
In the above configuration, the insulating film is BPSG or PS.
It is characterized by comprising G or BSG.

[0008]

In the first structure of the present invention, the insulating film for forming the contact hole is etched in the order of isotropic wet etching, isotropic dry etching and anisotropic dry etching. To be done. That is, in this configuration, first, a substantially shallow dish-shaped (in other words, wide) hole is formed by isotropic wet etching. Next, isotropic dry etching is performed to improve the taper of the hole (referred to as the inclination of the side surface) so that the hole has a slightly deep plate shape. Finally, anisotropic dry etching is performed to vertically dig the bottom of the hole to complete the connection hole. That is, in this configuration, isotropic dry etching is performed between both etching steps, as compared with the conventional method of performing anisotropic dry etching after isotropic wet etching.

With this configuration, the inclination angle of the slope (taper) can be made steeper than that in the case where anisotropic dry etching is performed after isotropic wet etching. Therefore, the size of the connection hole on the surface of the insulating film can be increased. Can be reduced and the degree of integration can be improved. In addition, since the inclination angle of the slope (taper) can be made gentler as compared with the case where anisotropic dry etching is performed after isotropic dry etching, step coverage can be improved. Further, when the taper (slope) of the connection hole is formed only by isotropic dry etching, the side surface of the opening of the resist mask is eaten during the isotropic dry etching, and the opening of the resist mask is enlarged. However, in this configuration, isotropic wet etching that does not eat the side surface of the opening of the resist mask and isotropic dry etching that eats it are used to form the connection hole. Since a taper (slope) is formed,
It is possible to improve the degree of integration because the opening of the resist mask is not enlarged.

Further, in this structure, anisotropic dry etching is the last as compared with the second structure of the present invention described later. Therefore, anisotropic dry etching is performed when the bottom of the connection hole penetrates the insulating film. It is sufficient to end the process with the advantage that it is easy to stop the anisotropic dry etching. In the second configuration of the present invention, the etching of the insulating film for forming the connection hole is performed in the order of isotropic wet etching, anisotropic dry etching, and isotropic dry etching.

According to this structure, in addition to the effect of the first structure, isotropic dry etching is performed after anisotropic dry etching. The portion can be tapered by subsequent isotropic dry etching, and further step coverage can be improved. Furthermore, in the above first and second configurations,
Since the wet etching is not performed after the dry etching, it is possible to obtain a smooth etching surface without the polymer residue generated by the dry etching remaining on the etching surface and hindering the subsequent wet etching. it can.

In the third structure of the present invention, BPSG, PSG or BSG, that is, soft glass is further adopted as the material of the insulating film in the first or second structure. By doing so, the above-mentioned effects can be made more remarkable. That is, the aspect ratio of the taper formed when these low-melting-point soft glasses are subjected to isotropic wet etching is approximately 4 in the horizontal direction with respect to the vertical (depth) 1, which is a substantially shallow dish and the degree of integration is significantly increased. Will fall. On the other hand, in isotropic dry etching, the aspect ratio of the above-mentioned taper is about 1 in the horizontal direction with respect to 1 in the vertical direction (depth), which is steep and step coverage is deteriorated. In addition, the increase in the opening size of the resist mask becomes large.

With this structure, it is possible to obtain a good taper aspect ratio, and it is possible to suppress an increase in the opening size of the resist mask.

[0014]

【Example】

(Embodiment 1) An embodiment of the connection hole forming technique of the present invention will be described below with reference to FIG. In FIG. 1A, a BPSG film having a thickness of about 0.6 μm, a B concentration of 3% and a P concentration of about 4% is formed on a semiconductor substrate 1, and a resist film 3 made of a polymer is coated on the BPSG film. A state in which the resist opening 30 is formed by curing, exposing and developing is shown.

Next, as shown in FIG. 1B, BHF (mixed solution of HF and NH ₄ F) is used with the resist film 3 as a mask.
Isotropic wet etching is performed. At this time, due to the adhesiveness between the insulating film 2 and the resist film 3, etching in the lateral direction proceeds faster than etching in the depth direction. The ratio is about 4 for the length (H) and for the width (W). if,
If the adjacent contact holes come into contact with each other by etching in the lateral direction, the resist film 3 will be in a floating state.
In this embodiment, when the total thickness is 1, the insulating film 2
The above isotropic wet etching is completed when the residual thickness t of 0.75 to 0.85.

Next, as shown in FIG. 1C, isotropic dry etching is performed. This can be realized, for example, by using CF ₄ / O ₂ gas in a town flow type etching apparatus. The dry etching is almost completely isotropic, and can be gently tapered without spreading in the lateral direction. However, since the isotropic dry etching also etches the resist film 3 to some extent,
There is a problem that the resist film 3 recedes in the lateral direction and the size of the contact hole becomes wider than the target value.
Here, the etching amount is limited. In this embodiment, when the total thickness is 1, the residual thickness t of the insulating film 2 is 0.
The isotropic dry etching is completed within the range of 4 to 0.6.

Finally, the remaining insulating film 2 is etched by anisotropic dry etching to complete the connection hole 4 (see FIG. 1).
(See (d)). This is a parallel plate type etching system
It can be realized with F ₃ / CF ₄ gas. This anisotropic dry etching is terminated at the time when it is estimated that a short predetermined time has passed after penetrating the BPSG film 2. In this way, it is possible to form a contact hole having a dimensional accuracy while having a gentle taper.

The operation of each step will be described below. Isotropic wet etching is a simple and highly productive process, but as mentioned above, due to the adhesiveness with the resist, lateral etching is faster than the depth direction, and the pitch of the contact holes is increased in the case of miniaturized semiconductor substrates. It became smaller and the resist floated in contact with the next. Isotropic dry etching compensates for this. However, as described above, there is a drawback that the contact hole is different from the target value because the resist is etched, and the accurate dimension cannot be obtained. Therefore, in the present invention, by combining these two, it is possible to obtain a gradual taper with high dimensional accuracy.

The reason why isotropic dry etching is carried out after isotropic wet etching is that if dry etching is carried out first, residues or polymer-like substances are generated on the surface of the insulating film,
This is because the next wet etching is hindered and the etching becomes uneven. Although the above embodiment has been described with reference to the contact hole on the semiconductor substrate, for example, Al wiring and Al
The same can be applied to the formation of connection holes (so-called via holes) that connect wirings. (Embodiment 2) Another embodiment of the connection hole forming technique of the present invention will be described below with reference to FIG.

In this embodiment, after the isotropic wet etching of Embodiment 1 (see FIG. 1B), anisotropic dry etching is performed as shown in FIG. 2A. The anisotropic dry etching process itself is the same as that of the first embodiment shown in FIG. Next, as shown in FIG. 2B, isotropic dry etching is performed. The isotropic dry etching process itself is the same as that of the first embodiment shown in FIG.

By doing so, the same operational effect as that of the first embodiment can be obtained. Further, the shoulder 20 of the vertical hole formed by anisotropic dry etching can be rounded by the subsequent isotropic dry etching to improve the step coverage.

[Brief description of drawings]

FIG. 1 is a process drawing showing an embodiment of a manufacturing process of the present invention.

FIG. 2 is a process drawing showing an example of a manufacturing process of the present invention.

[Explanation of symbols]

1 is a substrate, 2 is a BPSG film (insulating film), 3 is a resist mask, 30 is an opening of the resist mask 3, and 4 is a connection hole.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location H01L 21/3065 21/306 H01L 21/306 F Q

Claims (3)

[Claims] 1. A method of manufacturing a semiconductor device, comprising: forming a connection hole for connecting a conductor or a semiconductor arranged above and below an insulating film by etching the insulating film through an opening of a mask on the insulating film. Is performed in the order of isotropic wet etching, isotropic dry etching and anisotropic dry etching. 2. A method of manufacturing a semiconductor device, comprising: forming a connection hole for connecting a conductor or a semiconductor arranged above and below an insulating film by etching the insulating film through an opening of a mask on the insulating film. Is carried out in the order of isotropic wet etching, anisotropic dry etching, and isotropic dry etching. 3. The insulating film is BPSG or PSG or B
The method for manufacturing a semiconductor device according to claim 1, which is made of SG.