JPH08172163A - One-input/multi-output switch and multi-input/one-output switch - Google Patents

Abstract

PURPOSE: To realize an 1-input/n-outputs switch of simple constitution wherein isolation is ensured and high frequency characteristics deviation of each output terminal is little. CONSTITUTION: An unit switch group consists of four unit switches 13. The unit switch group is arranged in a square. The unit switches 13 constituting the unit switch group are arranged point-symmetrically to the center of the unit switch group. The wiring 14 from an input terminal 12 to each unit switch 13 stretches from the input 12 to the center of each switch group, branches from the center, and stretches as fas as each unit switch 13, passing each of the equal distances.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device, particularly Ga
As MESFET (MEtal Semiconductor Field Effect
SPnT (Single-Pole-n-Thr) using Transistor
ow) switch (1 input n output switch) (n is an integer of 2 or more) or nPST (n-Pole-Single-Throw) switch (n input 1 output switch) (n is an integer of 2 or more).

[0002]

2. Description of the Related Art High-frequency switch devices for directly switching high-frequency signals ranging from several MHz to several tens of GHz have been roughly classified into mechanical switches (relays) and semiconductor switches. Semiconductor switches are widely used in the field of mobile communication because they have features such as high-speed switching, small size and light weight, and excellent reliability. Especially GaAsM
SPDT (Single-Pole-Dual-Thro) using ESFET
w) The switch (1-input 2-output switch) has the characteristics that it operates at high speed and consumes almost no power in principle. Therefore, it is especially suitable for antenna changeover switches of mobile communication terminals that are required to be small and lightweight. Widely adopted.

FIG. 7 is a circuit diagram of a unit switch composed of SPST (Single-Pole-Single-Throw) switches constituting the conventional SPnT switch. As shown in FIG. 7, normally, in the SPnT switch, one of the source electrode and the drain electrode is connected to the input terminal and the other is connected to the output terminal, and one of the source electrode and the drain electrode is connected. It is composed of n unit switches 36 each including a shunt FET 32 connected to the output side of the through FET 31 and the other of which is grounded. Through FET 31
Is a transfer gate, and the shunt FET 32 is provided for improving isolation between input and output. In FIG. 7, reference numerals 33A and 33B are bias resistors for blocking the leak current to the gate electrode.

To turn on the unit switch 36,
Turn on the through FET 31 and shunt FET 3
A control voltage for turning OFF 2 is applied to the control terminals 34A, 3
Give to 4B. To turn off the unit switch 36, a control voltage for turning off the through FET 31 and turning on the shunt FET 32 is applied to the control terminals 34A and 34B. As a result, the unit switch 3
6 operates as a switch.

FIG. 8 is a plan view of a semiconductor chip for explaining the structure of an SP4T (Single-Pole-4-Throw) switch (1 input 4 output switch) using a conventional GaAs MESFET.

As shown in FIG. 8, four unit switches 43 are formed on the main surface of a semiconductor substrate 41 made of GaAs, and a high frequency signal input to an input terminal 42 is input to the input line 4.
The data is input to each unit switch 43 through 4. An output terminal 45, a ground terminal 46, and a control terminal 47 are formed on the peripheral portion of the main surface of the semiconductor substrate 41. Also,
Each unit switch 43 includes a through FET 48 and a shunt FE.
It consists of T49.

Such an SPnT switch has several MH
Strict characteristics such as low insertion loss, high isolation, and high-speed switching are required for high-frequency signals ranging from z to several tens GHz. For example, SP used in wireless terminals
In the DT switch, at 2 (GHz), insertion loss 0.8 (dB), isolation 32 (dB),
A switching time of about 5 (ns) or less has been put to practical use.

However, the SP currently in practical use
In the nT switch, multi-output terminals up to the SP4T switch are used due to reasons such as increase in chip area, deterioration of isolation between output terminals, and increase in deviation of high-frequency characteristics between output terminals. It is a degree.
When configuring a switch having more output terminals, use a plurality of SP4T switches as described above,
This is achieved by mounting a plurality of SP4T switches on a substrate, and at present, a multi-output terminal switch in which n is 5 or more has not been put into practical use at present.

[0009]

By the way, in the case of an SPnT switch in which n unit switches are formed on a semiconductor substrate, the wiring length from the input terminal to each unit switch increases as the number of output terminals increases. Not equal. For example, a width of several tens of μ formed on a semiconductor substrate made of GaAs
Since a wiring of about m is equivalently seen as an inductor at a high frequency of several GHz or more, if the wiring lengths are different, it means that inductors having different inductance values are connected in series on the input side of each unit switch. Therefore, when each unit switch operates, there is a problem that a large deviation occurs in the high-frequency characteristics of the unit switch, such as the values of insertion loss and return loss (S ₁₁ ) between the unit switches.

As the semiconductor substrate on which the SPnT switch is mounted, a ceramic substrate to which a copper thin film is adhered and which has a predetermined circuit pattern formed by etching is often used. Generally, a microstrip line through which a high frequency signal passes has a characteristic impedance Z _O
Is often 50Ω, and the thickness t and the wiring width w of the ceramic substrate are selected so that the characteristic impedance Z _O becomes 50Ω. When a ceramic substrate (ε = 9.7) having a thickness t of 0.635 mm is used, the wiring width w is about 0.61 mm. Further, due to the restriction of the etching accuracy of the copper thin film, the actual wiring interval is inevitably about several hundred μm. On the other hand, as the number of output terminals of the SPnT switch increases, a large number of input / output terminals and control terminals will be arranged on the peripheral portion of the semiconductor substrate. Therefore, SP
The distance between the wires connecting the nT switch and the mounting substrate is about several hundreds of μm, and they are densely packed, so that the isolation between the wires cannot be ignored. For this reason, the isolation between wires becomes a problem rather than the isolation that the unit switch originally has.

In view of the above, it is an object of the present invention to reduce the deviation of the high frequency characteristics between the output terminals and to secure the isolation characteristics in a one-input multi-output switch or a multi-input one-output switch with a simple structure. And

[0012]

In order to achieve the above-mentioned object, the means for solving the problems according to the invention of claim 1 is to provide a one-input multi-output switch with one input terminal formed on a semiconductor substrate, respectively. A plurality of output terminals and a plurality of unit switches connected in parallel to the input terminals and having the same function, wherein the plurality of unit switches have equal wiring lengths from the input terminals to the respective unit switches. The arrangement is such that

According to a second aspect of the present invention, a one-input multi-output switch is formed by connecting one input terminal and a plurality of output terminals respectively formed on a semiconductor substrate in parallel with the input terminal. And a unit switch group composed of four unit switches having the same function, the unit switch group is provided in a rectangular shape, and each unit switch forming the unit switch group is located at the center of the unit switch group. Wirings from the input terminal to each of the unit switches extend from the input terminal to the center of the unit switch group, and then branch from the center to branch each unit. The structure is such that they extend to the switch so that they are equidistant from each other.

According to a third aspect of the present invention, a one-input multi-output switch is formed by connecting one input terminal and a plurality of output terminals respectively formed on a semiconductor substrate in parallel with the input terminal. And a plurality of unit switch groups each including a plurality of unit switches having the same function, the plurality of unit switch groups being arranged so as to be point-symmetric with respect to the center of the semiconductor substrate, and the input terminal From the input terminal to the central portion of the semiconductor substrate, and then branches from the central portion to each unit switch so as to be equidistant from each other. Is.

According to a fourth aspect of the present invention, in the structure of the first to third aspects, the unit switch includes a through FET that functions as a transfer gate, and a source-grounded or drain-grounded shunt FET connected in series with the through FET. The configuration that consists of and is added.

According to a fifth aspect of the present invention, in the structure according to the first to third aspects, the plurality of output terminals are arranged without being adjacent to each other and are respectively provided between the control terminal and the ground terminal of the unit switch. It adds a configuration that is.

According to a sixth aspect of the present invention, in addition to the configurations of the first to third aspects, a configuration in which a ground terminal is provided between the adjacent output terminals on the semiconductor substrate is added.

According to a seventh aspect of the present invention, in a solution means, a multi-input / single-output switch is connected in parallel to a plurality of input terminals, one output terminal, and the output terminals, each formed on a semiconductor substrate. A plurality of unit switches having the same function as described above, and the plurality of unit switches are arranged such that wiring lengths from the unit switches to the output terminals are equal to each other. is there.

According to an eighth aspect of the present invention, there is provided a solving means, wherein a multi-input / single-output switch is connected in parallel to a plurality of input terminals, one output terminal, and the output terminals formed on a semiconductor substrate. And a unit switch group composed of four unit switches having the same function, the unit switch group is provided in a rectangular shape, and each unit switch forming the unit switch group is located at the center of the unit switch group. The wirings from the unit switches to the output terminals are arranged so as to be point-symmetric with respect to each other, and extend from the unit switches to the center of the unit switch group so as to be equidistant from each other. The configuration is such that they gather from the central portion and extend to the output terminal.

According to a ninth aspect of the present invention, there is provided a solving means, wherein a multi-input / single-output switch is connected in parallel to a plurality of input terminals, one output terminal, and the output terminals formed on a semiconductor substrate. And a plurality of unit switch groups each including a plurality of unit switches having the same function, the plurality of unit switch groups being arranged in point symmetry with respect to the center of the semiconductor substrate. The wiring from the switch to the output terminal extends from the unit switches to the center of the semiconductor substrate at an equal distance from each other, and then gathers from the center to extend to the output terminal. is there.

According to a tenth aspect of the present invention, in the structure of the seventh to ninth aspects, the unit switch is a through FET that functions as a transfer gate, and a source-grounded or drain-grounded shunt FET connected in series with the through FET. The configuration that consists of and is added.

According to an eleventh aspect of the present invention, in the configuration of the seventh to ninth aspects, the plurality of input terminals are arranged so as not to be adjacent to each other and are respectively provided between the control terminal and the ground terminal of the unit switch. It adds a configuration that is.

According to a twelfth aspect of the present invention, in addition to the configurations of the seventh to ninth aspects, a configuration in which a ground terminal is provided between the adjacent input terminals on the semiconductor substrate is added.

[0024]

According to the structure of claim 1, since the wiring lengths from the input terminal to each unit switch are equal to each other, the inductance value of the inductor equivalently connected to the input side of each unit switch becomes equal. It is difficult for deviations to occur in high frequency characteristics such as insertion loss and return loss of the unit switch between them.

According to the structure of claim 2, each unit switch is arranged so as to be point-symmetric with respect to the center of the unit switch group, and the wiring from the input terminal to each unit switch is from the input terminal to the unit switch group. After extending to the central part, branching from the central part and extending to each unit switch so as to be equidistant from each other, the inductance value of the inductor equivalently connected to the input side of each unit switch is surely ensured. Will be equal.

According to the structure of claim 3, the plurality of unit switch groups are arranged so as to be point-symmetric with respect to the center of the semiconductor substrate, and the wiring from the input terminal to each unit switch is from the input terminal to the semiconductor substrate. Since it extends to the center of the unit switch and branches from the center unit to each unit switch so as to be equidistant from each other, the inductance value of the inductor equivalently connected to the input side of each unit switch can be ensured. Is equal to

According to the configuration of claim 4, the unit switch is
A through FET that functions as a transfer gate,
Since the through FET and the shunt FET of the source ground or the drain ground are connected in series, isolation in the unit switch is ensured.

According to the structure of claim 5, the plurality of output terminals are arranged so as not to be adjacent to each other and are respectively provided between the control terminal and the ground terminal of the unit switch, so that the intervals between the output terminals are secured. Therefore, the mounting wire, that is, the high-frequency signal line can be spaced at a large distance.

According to the structure of claim 6, a ground terminal is provided between the adjacent output terminals on the semiconductor substrate, the ground terminal exerts a shield function, and the interval between the high frequency signal lines is increased. You can

According to the configuration of claim 7, since the wiring lengths from each unit switch to the output terminal are equal to each other, the inductance value of the inductor equivalently connected to the output side of each unit switch is equal, so that each unit is equal. It is difficult for deviations to occur in high-frequency characteristics such as insertion loss and return loss of unit switches between the switches.

According to the structure of claim 8, each unit switch is arranged so as to be point-symmetric with respect to the center of the unit switch group, and the wiring from each unit switch to the output terminal is from each unit switch to the unit switch group. After extending so that they are equidistant from each other to the central part of the unit, they are gathered from the central part and extend to the output terminal, so that the inductance value of the inductor equivalently connected to the output side of each unit switch is surely Will be equal.

According to the structure of claim 9, the plurality of unit switch groups are arranged so as to be point-symmetric with respect to the center of the semiconductor substrate, and the wiring from each unit switch to the output terminal is from each unit switch to the semiconductor substrate. After extending equidistantly from each other to the central part of each of the unit switches, the inductors equivalently connected to the output side of each unit switch have the same inductance value because they gather from the central part and extend to the output terminal.

According to the structure of claim 10, the unit switch is a through FET functioning as a transfer gate.
And a shunt FET of source ground or drain ground connected in series with the through FET, so that isolation in the unit switch is ensured.

According to the eleventh aspect, the plurality of input terminals are arranged so as not to be adjacent to each other and are respectively provided between the control terminal and the ground terminal of the unit switch, so that the intervals between the input terminals are secured. Therefore, the mounting wire, that is, the high-frequency signal line can be spaced at a large distance.

According to the twelfth aspect, the ground terminal is provided between the adjacent input terminals on the semiconductor substrate, and the ground terminal exerts the shield function, and
The distance between the high frequency signal lines can be increased.

[0036]

FIG. 1 is an SP8T according to a first embodiment of the present invention.
The structure of a (Single-Pole-8-Throw) switch (1 input 8 output switch) is shown.

The SP8T switch according to the first embodiment is G
The aAs MESFET is used and is formed on the main surface of the rectangular semiconductor substrate 11 made of GaAs by using a predetermined semiconductor process technique. In FIG. 1, 12 is an input terminal for inputting a high frequency signal, 13 is a unit switch made of SPST, 14 is a wiring extending from the input terminal 12 to each unit switch 13, 15 is an output terminal for outputting a high frequency signal, and 16 is an output terminal. Ground terminal of unit switch 13, 18
Is a through FET of the unit switch 13, 19 is a shunt FET of the unit switch 13, and 17 is a control terminal for controlling the through FET 18 or the shunt FET 19. The unit switch 13 has the same configuration as that described in the section of the prior art.

As shown in FIG. 1, four unit switches 1
Each of the two unit switch groups 3 is formed in a rectangular shape, and each unit switch group is provided so as to be line-symmetric with respect to the center line of the semiconductor substrate 11 in the short side direction. Each unit switch 13 is arranged point-symmetrically with respect to the center of the unit switch group. The input terminal 12 is provided in the central portion on the long side of the main surface of the semiconductor substrate 11.

The wiring 14 extends from the input terminal 12 to the central portion of the semiconductor substrate 11, then branches into two at the central portion and extends to the branch point 14a at the central portion of each unit switch group, and each branch point 14a. After branching into two, the branching into two further extends to each unit switch 13 so as to be equidistant from each other. As a result, the wiring length from the input terminal 12 to each unit switch 13 becomes equal, so that the inductance values of the inductors equivalently connected to the input side become equal. For this reason, it is difficult for deviations to occur in high-frequency characteristics such as insertion loss and return loss of the unit switches 13 between the unit switches 13.

Further, as shown in FIG. 1, each output terminal 15
Are not adjacent to each other and are provided between the control terminal 17 and the ground terminal 17. As a result, the output terminal 1
Since the interval between the five wires is secured, the interval between the mounting wires, that is, the high-frequency signal lines becomes large, so that deterioration of isolation between the high-frequency signal lines can be suppressed.

Further, as shown in FIG. 1, a ground terminal 17 is provided between adjacent output terminals 15. For this reason, the ground terminal 17 exerts a shield function, so that deterioration of isolation between the high frequency signal lines can be suppressed.

FIG. 2 shows an SP8T according to the second embodiment of the present invention.
The structure of a switch is shown. Also in the second embodiment,
Similar to the first embodiment, each unit switch 13 is formed on the main surface of the semiconductor substrate 11 made of GaAs by using a predetermined semiconductor process technique. In the second embodiment,
The same members as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

As shown in FIG. 2, as in the first embodiment,
Each of the two unit switch groups consisting of the four unit switches 13 is formed in a rectangular shape.
3 are arranged point-symmetrically with respect to the center of the unit switch group.

Unlike the first embodiment, the input terminal 12 is provided in the central portion on the short side of the main surface of the semiconductor substrate 11, and the wiring 14 extends from the input terminal 12 to the semiconductor substrate 11.
After extending in the long side direction at the central portion of the, the two first branch points 14b provided on the left and right are divided into a wiring extending to the unit switch group on the left side and a wiring extending to the unit switch group on the right side in FIG. . The wiring from each first branch point 14b to the unit switch group on the left side branches in the vertical direction in FIG. 2 and extends equidistantly to each unit switch 13. On the other hand, the wiring which passes through the first branch point 14b and extends to the unit switch group on the right side branches vertically to the unit switches 13 at two second branch points 14c provided on the left and right. They are equidistant from each other. Therefore, in the second embodiment, the wiring length from the input terminal 12 to each unit switch 13 is different.

Also in the second embodiment, as shown in FIG. 2, the output terminals 15 are not adjacent to each other and are provided between the control terminal 17 and the ground terminal 17. A ground terminal 17 is provided between the adjacent output terminals 15.

FIG. 3 shows the insertion loss as high frequency characteristics of the SP8T switches according to the first and second embodiments for each output terminal 15. When one unit switch 13 is ON, all other unit switches 13 are controlled to be OFF.

In the second embodiment, since the wiring length from the input terminal 12 to each unit switch 13 is different, the insertion loss deviation between the output terminals 15 is 1.1 (dB).
On the other hand, in the first embodiment, since the wiring length from the input terminal 12 to each unit switch 13 is the same, the insertion loss deviation between the output terminals 15 is about 1/6 of 0. It can be seen that it has been improved to 0.16 (dB).
Further, in the first embodiment, the isolation between the output terminals 15 is 30 (dB) or more. As described above, according to the first embodiment, it is possible to provide the SPnT switch device that ensures the isolation characteristic with a simple configuration and has a small deviation in the high frequency characteristic of each output terminal.

FIG. 4 shows an SP1 according to the third embodiment of the present invention.
The structure of a 2T (Single-Pole-12-Throw) switch is shown. Also in the third embodiment, as in the first embodiment, each unit switch 13 is formed on the main surface of the semiconductor substrate 11 made of GaAs by using a predetermined semiconductor process technique. In the third embodiment, the same members as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

In the third embodiment, three unit switch groups, each consisting of four unit switches 13 arranged linearly, are arranged along the three sides of the rectangular semiconductor substrate 11. The wiring 14 extends from the input terminal 12 to a branch point 14d formed in the central portion of the semiconductor substrate 11,
It is divided into three at the branch point 14d, and then each is divided into 2
It branches twice and extends equidistantly to each unit switch 13.

Also in the third embodiment, as shown in FIG. 4, the output terminals 15 are not adjacent to each other and are provided between the control terminal 17 and the ground terminal 17. A ground terminal 17 is provided between the adjacent output terminals 15.

Therefore, also in the third embodiment, it is possible to provide the SPnT switch device which secures the isolation characteristic with a simple structure and has a small deviation in the high frequency characteristic of each output terminal.

FIG. 5 shows the SP1 according to the fourth embodiment of the present invention.
The structure of a 6T (Single-Pole-16-Throw) switch is shown. Also in the fourth embodiment, as in the first embodiment, each unit switch 13 is formed on the main surface of the semiconductor substrate 11 made of GaAs by using a predetermined semiconductor process technique. In the fourth embodiment, the same members as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

In the fourth embodiment, four unit switch groups consisting of four unit switches 13 linearly arranged are arranged along the long sides of the rectangular semiconductor substrate 11. Each unit switch group is provided so as to be point-symmetric with respect to the center of the semiconductor substrate 11. Wiring 1
4 extends from the input terminal 12 formed in the central portion of the long side of the semiconductor substrate 11 to the branch point 14e in the central portion of the semiconductor substrate 11 and then branches into two three times to equidistantly connect each unit switch. It extends to 13.

Also in the fourth embodiment, as shown in FIG. 5, the output terminals 15 are provided not adjacent to each other but between the control terminal 17 and the ground terminal 17. A ground terminal 17 is provided between the adjacent output terminals 15.

Therefore, also in the fourth embodiment, it is possible to provide the SPnT switch device which ensures the isolation characteristic with a simple structure and has a small deviation in the high frequency characteristic of each output terminal.

FIG. 6 shows an SP3 according to the fifth embodiment of the present invention.
The structure of a 2T (Single-Pole-32-Throw) switch is shown. Also in the fifth embodiment, as in the first embodiment, each unit switch 13 is formed on the main surface of the semiconductor substrate 11 made of GaAs by using a predetermined semiconductor process technique. In the fifth embodiment, the same members as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

In the fifth embodiment, four unit switch groups consisting of eight linearly arranged unit switches 13 are arranged along the long sides of the rectangular semiconductor substrate 11. Each unit switch group is provided so as to be point-symmetric with respect to the center of the semiconductor substrate 11. Wiring 1
4 extends from the input terminal 12 formed in the central portion of the long side of the semiconductor substrate 11 to the branch point 14f in the central portion of the semiconductor substrate 11 and then branches into two three times to equidistantly connect each unit switch. It extends to 13.

Also in the fifth embodiment, as shown in FIG. 6, the output terminals 15 are provided not adjacent to each other but between the control terminal 17 and the ground terminal 17. A ground terminal 17 is provided between the adjacent output terminals 15.

Therefore, also in the fifth embodiment, it is possible to provide the SPnT switch device which has a simple structure and ensures the isolation characteristic and has a small deviation in the high frequency characteristic of each output terminal.

In each of the above embodiments, the SP8T switch (1 input 8 output switch), SP12T switch (1 input 12 output switch), SP16T switch (1
Only the input 16 output switch) and the SP32T switch (1 input 32 output switch) have been described, but n is 32.
It goes without saying that the present invention is extremely effective for the above-mentioned one-input multi-output switch.

Further, in each of the above-mentioned embodiments, the one-input multi-output switch has been described.
Output switch nPST (n-Pole-Single-Throw)
It is also applicable to a switch (n-input 1-output switch) (n is an integer of 2 or more). nPST switch is SP
This can be realized by replacing the input terminal of the nT switch with the output terminal and replacing each output terminal of the SPnT switch with each input terminal.

[0062]

According to the 1-input multi-output switch according to the invention of claim 1, since the wiring lengths from the input terminal to each unit switch are equal to each other, the inductors equivalently connected to the input side of each unit switch Since the inductance values are equal, deviations in the high frequency characteristics such as insertion loss and return loss of the unit switches are less likely to occur between the unit switches. Therefore, a one-input multi-output switch having excellent high-frequency characteristics and a small deviation can be easily realized, and its practical value is very large.

According to the one-input multi-output switch of the second aspect of the present invention, since the inductance values of the inductors equivalently connected to the input side of each unit switch are surely equal to each other, the unit between each unit switch is surely equal. Since deviations in high frequency characteristics such as switch insertion loss and return loss are less likely to occur, it is possible to easily realize a 1-input multi-output switch having excellent high frequency characteristics and small deviations.

According to the one-input multi-output switch of the third aspect of the present invention, the inductance values of the inductors equivalently connected to the input sides of the respective unit switches are surely equal to each other. Since deviations in high frequency characteristics such as switch insertion loss and return loss are less likely to occur, it is possible to easily realize a 1-input multi-output switch having excellent high frequency characteristics and small deviations.

According to the 1-input multi-output switch according to the fourth aspect of the present invention, the isolation in the unit switch is ensured, so that the isolation function in the 1-input multi-output switch is improved.

According to the one-input multi-output switch of the fifth aspect of the present invention, the distance between the output terminals can be secured and the distance between the high frequency signal lines can be widened. It is possible to suppress deterioration of the isolation.

According to the one-input multi-output switch of the sixth aspect of the present invention, the ground terminal exerts the shield function and the interval between the high frequency signal lines can be increased.
It is possible to suppress deterioration of isolation between high frequency signal lines in the input / output switch.

According to the multi-input single-output switch of the seventh aspect of the present invention, since the wiring lengths from each unit switch to the output terminal are equal to each other, the inductance value of the inductor equivalently connected to the output side of each unit switch. Are equal to each other, it is difficult for deviations in high-frequency characteristics such as insertion loss and return loss of the unit switches to occur between the unit switches. Therefore, a multi-input single-output switch having excellent high frequency characteristics and a small deviation can be easily realized, and its practical value is very large.

According to the multi-input one-output switch of the eighth aspect of the present invention, the high frequency characteristics such as the insertion loss and the return loss of the unit switches between the unit switches hardly occur, so that the high frequency characteristics are excellent. It is possible to easily realize a multi-input one-output switch having a small size.

According to the multi-input / single-output switch of the ninth aspect of the present invention, the high frequency characteristics such as the insertion loss and the return loss of the unit switches between the unit switches hardly occur, so that the high frequency characteristics are excellent. It is possible to easily realize a multi-input one-output switch having a small size.

According to the multi-input one-output switch of the tenth aspect of the invention, the isolation in the unit switch is ensured, so that the isolation function in the multi-input one-output switch is improved.

According to the multi-input / single-output switch of the eleventh aspect of the present invention, the distance between the input terminals can be secured and the distance between the high frequency signal lines can be increased.
It is possible to suppress deterioration of isolation between high frequency signal lines in the output switch.

According to the multi-input one-output switch of the twelfth aspect of the invention, since the ground terminal exerts the shield function and the high-frequency signal lines can be spaced widely,
It is possible to suppress deterioration of isolation between high frequency signal lines in the multi-input single-output switch.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an SP8T switch according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of an SP8T switch according to a second embodiment of the present invention.

FIG. 3 is a diagram illustrating high frequency characteristics of the SP8T switches according to the first and second embodiments.

FIG. 4 is a configuration diagram of an SP12T switch according to a third embodiment of the present invention.

FIG. 5 is a configuration diagram of an SP16T switch according to a fourth embodiment of the present invention.

FIG. 6 is a configuration diagram of an SP32T switch according to a fifth embodiment of the present invention.

FIG. 7 is a circuit diagram of a unit switch that constitutes an SPnT switch according to the related art and each embodiment of the present invention.

FIG. 8 is a configuration diagram of a conventional SP4T switch.

[Explanation of symbols]

 11 semiconductor substrate 12 input terminal 13 unit switch 14 wiring 15 output terminal 16 ground terminal 17 control terminal 18 through FET 19 shunt FET

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication location H01L 21/338 29/812 27/095 H01L 27/04 D 7376-4M 29/80 B 7376-4M E

Claims (12)

[Claims] 1. A 1 formed on a semiconductor substrate, respectively.
One input terminal, a plurality of output terminals, and a plurality of unit switches connected in parallel to the input terminals and having the same function, wherein the plurality of unit switches are wirings from the input terminals to the respective unit switches. A 1-input multi-output switch, wherein the switches are arranged so that their lengths are equal to each other. 2. A 1 formed on a semiconductor substrate, respectively.
One input terminal, a plurality of output terminals, and a unit switch group composed of four unit switches connected in parallel to the input terminals and having the same function, the unit switch group being provided in a rectangular shape, The unit switches forming the unit switch group are arranged so as to be point-symmetric with respect to the center of the unit switch group, and the wiring from the input terminal to each unit switch is from the input terminal to the unit switch. A one-input multi-output switch, wherein the one-input multi-output switch is characterized in that after extending to the central portion of the group, it is branched from the central portion and extends so as to be equidistant to each unit switch. 3. 1 formed on a semiconductor substrate, respectively
One input terminal, a plurality of output terminals, and a plurality of unit switch groups composed of a plurality of unit switches connected in parallel to the input terminals and having the same function, the plurality of unit switch groups being the semiconductor substrate. Are arranged so as to be point-symmetric with respect to the center of the wiring, and the wiring from the input terminal to each of the unit switches extends from the input terminal to the central portion of the semiconductor substrate and then branches from the central portion. A 1-input multi-output switch, which is extended to each unit switch so as to be equidistant from each other. 4. The unit switch comprises a through FET functioning as a transfer gate, and a source-grounded or drain-grounded shunt FET connected in series with the through FET. The one-input multi-output switch according to any one of items. 5. The plurality of output terminals are arranged so as not to be adjacent to each other and are respectively provided between the control terminal and the ground terminal of the unit switch. Or the one-input multi-output switch described in the item 1. 6. The one-input multi-output switch according to claim 1, wherein a ground terminal is provided between the output terminals adjacent to each other on the semiconductor substrate. 7. A plurality of input terminals, one output terminal, and a plurality of unit switches having the same function connected in parallel to the output terminals, each of which is formed on a semiconductor substrate. The multi-input one-output switch is characterized in that the unit switches are arranged such that the wiring lengths from the unit switches to the output terminals are equal to each other. 8. A unit switch group formed of a plurality of input terminals, one output terminal, and four unit switches having the same function connected in parallel to the output terminals, each formed on a semiconductor substrate. The unit switch group is provided in a rectangular shape, and the unit switches forming the unit switch group are arranged so as to be point-symmetric with respect to the center of the unit switch group. The wiring to the output terminal extends from each of the unit switches to a central portion of the unit switch group so as to be equidistant from each other, and then gathers from the central portion and extends to the output terminal. Multi-input, 1-output switch. 9. A plurality of unit switches each having a plurality of input terminals, one output terminal, and a plurality of unit switches having the same function connected in parallel to the output terminals, each formed on a semiconductor substrate. A plurality of unit switches are arranged so as to be point-symmetric with respect to the center of the semiconductor substrate, and wiring from each unit switch to the output terminal is connected from each unit switch to the semiconductor. A multi-input / single-output switch, characterized in that they extend equidistantly from each other to the center of the substrate, and then extend from the center to the output terminals. 10. The unit switch includes a through FET that functions as a transfer gate, and the through FET.
10. The multi-input single-output switch according to claim 7, comprising a source-grounded or drain-grounded shunt FET connected in series with the shunt FET. 11. The input terminal according to claim 7, wherein the plurality of input terminals are arranged so as not to be adjacent to each other and are respectively provided between the control terminal and the ground terminal of the unit switch. Or a multi-input single-output switch described in the item 1. 12. The multi-input single-output switch according to claim 7, wherein a ground terminal is provided between the input terminals adjacent to each other on the semiconductor substrate.