JPH08160463A - Reflection type liquid crystal display device - Google Patents

Abstract

PURPOSE: To improve the display grade of a reflection type liquid crystal display device for which p-SiTFTs are used by flattening the reflection layer of the device. CONSTITUTION: Flattening of a second interlayer insulating layer 16 which is the ground surface of pixel electrodes 17 is executed, by which the pixel electrodes 17 in canon use as the reflection layer are flattened. The scattering of reflected light to the outside of prescribed optical paths is lessened and luminance is improved when the device is built as a light valve of a projection system; in addition, the degradation in the luminance and contrast ratio by the interference of modulation light between pixels or a change in the chromaticity distribution by the deviation of additive method color mixing are prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a liquid crystal display device (LC
D: Liquid Crystal Display), which is a thin film field effect transistor (T) of polycrystalline silicon (p-Si).
The present invention relates to an active matrix type liquid crystal display device using an FT (Thin Film Transistor).

[0002]

2. Description of the Related Art LCDs have advantages such as small size, thin shape and low power consumption, and are being put to practical use in fields such as OA equipment and AV equipment. In particular, an active matrix LCD that uses TFTs as switching elements and can be driven by line-sequential scanning can theoretically perform static driving with a duty ratio of 100% in a multiplexed manner, and has a large screen and high contrast ratio. Used in video displays.

An active matrix LCD is a substrate (TFF) in which TFTs are connected to pixel electrodes arranged in a matrix.
A substrate) and a substrate having a common electrode (counter substrate) are attached to each other with a liquid crystal interposed therebetween, and a voltage is applied to each pixel capacitance forming each display pixel. The TFTs are simultaneously turned on for each scanning line to select the data signal input to the pixel electrode and to hold the voltage applied to the pixel capacitance by the OFF resistance until rewriting in the next field. are doing. The liquid crystal has electro-optical anisotropy and modulates the transmitted light according to the electric field formed by each pixel capacitance to produce a display image.

In recent years, as a TFT, p- has been formed on the channel layer.
There is one that uses Si, and high mobility is achieved,
The miniaturization of the size and the integrated mounting of the drive circuit have been realized. Due to the miniaturization of the TFT, the module itself is miniaturized and the definition is increased, and other optical parts such as lenses and reflecting mirrors can be miniaturized and increased in accuracy, and the entire optical system is miniaturized. Is often used as. In particular, the reflective type having a reflective layer in the cell also uses the TFT region for display, and thus has a high aperture ratio,
Since the utilization efficiency of light is increased, it is possible to obtain a high-luminance screen, which is a problem of the projection method.

Regarding such a liquid crystal display device,
There is a device in which the aperture ratio is further improved by devising the overlapping portion with the scanning line and the signal line. FIG. 6 is a plan view of the conventional structure,
7 is a cross-sectional view of the TFT portion corresponding to the line D-D in FIG. 6, and FIG. 8 is a cross-sectional view of the drain line (55) portion corresponding to the line E-E in FIG. An active layer (5) made of p-Si is formed on a substrate (50) made of heat-resistant quartz glass or the like.
1) is formed, and the non-doped channel layer (51
n), the heavily doped source and drain regions (51s, 51d) are included. In addition, the first auxiliary capacitance electrode (51C) for holding charge is the source region (51C).
s) is integrally formed. C on the whole surface that covers these
Gate insulating layer formed by VD or thermal oxidation (5
2) and a gate line (5) made of doped p-Si or polycide on the gate insulating layer (52).
3) and the second auxiliary capacitance electrode (53C) are formed, and a part of the gate line (53) is arranged on the channel layer (51n) to serve as the gate electrode (53G). A first interlayer insulating layer (54) is coated on the entire surface covering these by CVD, an Al drain line (55) is formed on the first interlayer insulating layer (54), and a gate insulating layer (52).
And the drain region (51d) through the contact hole (CT3) opened in the first interlayer insulating layer (54). CVD on the drain line (55)
The second interlayer insulating layer (56) is covered with, and Al or Mo, Ti, Cr is formed on the second interlayer insulating layer (56).
A pixel electrode (57) having light reflectivity such as
Also serves as a reflective layer. The pixel electrode (57) has a contact hole (CT) formed in the gate insulating layer (52), the first interlayer insulating layer (54) and the second interlayer insulating layer (56).
4) and is connected to the source region (51s). Further, the pixel electrode (57) is connected to the gate line (53).
Is located in the area surrounded by the drain line (55),
It is formed even on both lines (53, 55), and the display area is expanded.

A liquid crystal layer, a common electrode, and a substrate supporting the common electrode are further arranged on the substrate having such a structure to complete a reflection type liquid crystal display device. The pixel electrode (57), which also serves as a reflective layer, is configured to reflect incident light from above, modulate it while reciprocating the liquid crystal layer, and re-emit it. The liquid crystal display device having the above configuration is used by being incorporated in a projection system as a reflection type light valve.

As shown in FIG. 8, adjacent pixel electrodes (5
Between 7), the minimum separation distance (L) is required to prevent crosstalk due to the lateral electric field between the source and the source, and the drain line (55) having a predetermined line width.
, With a width (L1). But,
Such a superposed portion immediately becomes a parasitic capacitance between the source and the drain, which causes distortion of the drain signal.

[0008]

Conventionally, the pixel electrode (5
7) to the gate line (53) and the drain line (5
The display area was expanded and the aperture ratio was improved by expanding the display area until it overlapped with 5). In this case, particularly on the drain line (55) side, as shown in FIG. 8, a film of the drain line (55) is formed on the second interlayer insulating layer (56) formed by CVD so as to cover the drain line (55). A step due to the thickness is generated, and the pixel electrode (57) based on the second interlayer insulating layer (56) is also in a state of being raised at the peripheral edge portion. That is, the drain line (55) has a film thickness of 5 as a measure for preventing disconnection in order to deal with unevenness of the base.
The thickness is formed to be 000 to 8000Å, and the peripheral edge of the pixel electrode (57) is raised. In the p-SiTFT LCD with a pixel pitch of 50 μm or less, it is possible to reduce the size to 2-3 inches with 300,000 pixels.
Even if the thickness is less than or equal to μm, if the reflecting surface has irregularities, the following effects of scattering of reflected light become remarkable.

First, in the peripheral portion of the pixel electrode (57), the reflection angle of the reflected light with respect to the incident light is different from that in the central portion, so that for the predetermined optical path set in the optical system,
Light scattered in different directions is generated, the light utilization efficiency is reduced, and as a result, the pixel electrode (57) is enlarged to increase the reflectance, which is ineffective. No improvement has been achieved. Further, when the direction of the reflected light is deviated, interference with the reflected light modulated by other pixels occurs, leading to a decrease in luminance or contrast ratio and a change in chromaticity distribution due to defective additive color mixture.

Further, the unevenness of the pixel electrode (57) disturbs the electric field formed in the liquid crystal layer, thereby destabilizing the alignment of the liquid crystal, and when the abnormal modulation light in this portion is visually recognized, the contrast ratio is increased. Leading to a decrease in

[0011]

In order to solve this problem, in the present invention, firstly, an electrode wiring substrate having a reflective layer and a transparent electrode substrate having a common electrode are laminated with a liquid crystal layer interposed therebetween. While applying a signal voltage to the liquid crystal driving pixel capacitor formed for each display pixel to change the orientation of the liquid crystal, the light incident from the transparent electrode substrate side is reflected by the reflective layer to reciprocate the liquid crystal layer. In the reflective liquid crystal display device in which each display pixel is modulated and re-emitted from the transparent electrode substrate side, the electrode wiring substrate is formed on an insulating substrate, and a channel layer containing no impurities and both ends of the channel layer are provided. An island-shaped polycrystalline semiconductor layer including a source region and a drain region each containing an impurity, a first insulating layer formed on the polycrystalline semiconductor layer, and a first insulating layer are formed. Said insulation A gate line formed on the substrate including the gate electrode disposed above the channel layer,
A second insulating layer formed on the gate line;
Drain line formed on the insulating substrate on which the insulating layer is formed and having a connection portion with the drain region, and a third insulating layer that is formed entirely over the drain line and has a flat surface And a pixel electrode which is formed on the third insulating layer and which has a connection portion with the source region and which defines the pixel capacitance by standardizing the common electrode and the liquid crystal layer and also serves as the reflection layer. It was configured.

Secondly, in the first structure, the third insulating layer is composed of an SOG film formed by spin coating and baking of a liquid material, or a multilayer film including the SOG film. Thirdly, in the second configuration, the SOG
The film was formed by performing spin coating and baking of the liquid material a plurality of times.

Fourthly, in the first structure, the third insulating layer is flattened by a CMP method utilizing a combined action of a chemical reaction by a polishing liquid and mechanical friction polishing. . Fifth, in the first to fourth configurations, the drain line is arranged at a peripheral position of the pixel electrode, and the pixel electrode is partially overlapped with the drain line with the third insulating layer sandwiched therebetween. Moreover, the drain line is configured to have a thin film thickness in a portion overlapping the pixel electrode.

Sixth, in the first to fifth configurations, the gate line is arranged so as to intersect the drain line at a peripheral position of the pixel electrode, and the pixel electrode includes at least the third insulating layer. The gate line is partially overlapped with the gate line.

[0015]

In the first structure, the flatness of the pixel electrode is improved by flattening the base layer of the pixel electrode.
As a result, it is possible to prevent the contrast ratio from being lowered due to the disordered alignment of the liquid crystal and to improve the display quality. Further, by flattening the pixel electrode that also serves as the reflective layer, the direction of the reflected light is made uniform in the entire pixel region, so that the luminance is reduced due to the scattered portion of the reflected light and the reflected light between the pixels is reduced. A decrease in contrast ratio or a change in chromaticity distribution due to interference can be prevented.

In the second structure, the SOG formed by spin coating as the third insulating layer covering the drain line.
By using the film, the steps of the drain line layer and other wiring layers are alleviated or eliminated, and the base layer of the pixel electrode becomes flat. This improves the flatness of the pixel electrode. In the third configuration, the SOG film is formed in a plurality of times, so that the flatness and film quality of the third insulating layer are improved.

In the fourth structure, a polishing liquid and mechanical friction polishing are applied to the third insulating layer that covers the drain line, and the surface is formed by the CMP method which eliminates unevenness by the combined action of chemical and mechanical. By planarizing, the steps of the drain line layer and other wiring layers are relaxed or eliminated, and the base layer of the pixel electrode is planarized. This allows
The flatness of the pixel electrode is improved.

In the fifth structure, the display region is expanded by bringing the pixel electrode to the region overlapping the drain line, and the aperture ratio is improved. In addition, since the pixel electrode is flat, scattering of reflected light is eliminated, and a decrease in brightness or contrast ratio or a change in chromaticity distribution can be prevented. Further, by reducing the film thickness of the drain line in the overlapping portion with the pixel electrode, the step with the thick film portion produces the film thickness of the flattened third insulating layer, In addition, the parasitic capacitance between the source and drain is reduced.

In the sixth structure, the display area is enlarged by bringing the pixel electrode to the area overlapping the gate line, and the aperture ratio is improved. Further, since the pixel electrode is made flat, scattering of reflected light is eliminated, and deterioration of brightness and contrast ratio can be prevented.

[0020]

Next, examples of the present invention will be described. 1 is a plan view of a pixel portion, FIG. 2 is a sectional view taken along line AA of FIG. 1, FIG. 3 is a sectional view taken along line BB of FIG. 1, and FIG. It is sectional drawing along the -C line. First, at 640 ° C. on a transparent substrate (10) such as high heat resistant quartz glass,
SiH4 or Si2H6 under the condition of 0.3 Torr
By stacking p-Si with a thickness of about 600Å by low pressure CVD using as a material gas and patterning this by photoetching, the active layer (11) of the TFT and the first auxiliary capacitance electrode (11C) are formed. Has been done. An HTO (High Temperture Oxide) film, that is, 880, is formed on the entire surface of the active layer (11) and the first auxiliary capacitance electrode (11C).
Depressurized CV using a mixed gas of SiH2Cl2 and N2O as a material gas under high temperature and low pressure conditions of ℃ and 0.8 Torr.
The gate insulating layer (12) is covered with a 1000 Å thick SiO2 film formed by D. The first auxiliary capacitance electrode (11C) is doped with N + type and has a low resistance by performing ion implantation of N type impurities such as phosphorus using the resist formed covering the active layer (11) as a mask. There is.

On the gate insulating layer (12), the active layer (1
Similar to 1), p-S of about 3000Å by low pressure CVD
i (13P) is formed into a film, and N + type is doped by low pressure CVD using POCl3 (phosphoryl trichloride) as a diffusion source. Then, tungsten (W) or molybdenum (Mo) silicide (13) is formed by sputtering.
S) is formed to form a polycide structure, and this is patterned by photoetching to form a pattern of the gate line (13), the gate electrode (13G) and the second auxiliary capacitance electrode (13C). Furthermore, 900 ° C
The film is prepared by carrying out some degree of activation annealing. The second auxiliary capacitance electrode (13C) is connected between the pixels along the gate line (13) direction, and the common electrode voltage is applied. The second auxiliary capacitance electrode (13C) includes a gate insulating layer (1C) and a first auxiliary capacitance electrode (11C) to which a source voltage is applied.
2) is sandwiched in between and constitutes an auxiliary capacitance for holding charges. Source / drain regions (11s, 11d) are formed in the active layer (11) by ion implantation of N-type impurities such as phosphorus using the gate electrode (13G) as a mask, and a non-doped channel region ( 1
1n) has been formed.

Gate line (13), gate electrode (13
G) and the second auxiliary capacitance electrode (13C) are entirely covered with SiO2 by thermal CVD to form a first interlayer insulating layer (14). After opening a contact hole (CT1) in the gate insulating layer (12) and the first interlayer insulating layer (14) on the drain region (11d), Al is laminated to a thickness of 6000 to 7000Å by sputtering or the like, The main line (15M) of the drain line (15) is formed by etching, and is connected to the drain region (11d) through the contact hole (CT1). Furthermore, by sputtering, Cr or T
Heat-resistant metals such as i and Mo are laminated to a thickness of about 1500Å, and the main line (15
The main line (15M) is covered with a pattern larger than M), and the sub line (15S) which also serves as BM is formed.

Here, the structure of the drain line (15) is not limited to this, and a structure in which a large pattern sub-line (15S) is on the lower side and a small pattern main line (15M) is on the upper side, or a simple structure. 2 layers with different masks
It is possible to use a structure in which the etching is performed in steps, or a structure in which a step is formed by positively using side etching.

On the substrate (10) on which the drain line (15) is formed, as shown in FIG.
After the two films (1) are laminated to a thickness of about 1000 to 2000Å, SOG (spin-on-glass) solution is spin-coated and fired several times to form a film containing SiO2 as a main component, that is, an SOG film. (2) is formed. The SOG film is formed by spin coating a SOG solution in which a silicon compound RnSi (OH) 4-n and additives are dissolved in an organic solvent using a spinner, and performing heat treatment at 700 to 900 ° C.
Inorganic SiO that promotes solvent evaporation, dehydration and polymerization reactions
2 is generated. The SOG film has excellent surface flatness, and also in this embodiment, the drain line (15) is completely covered and the step is eliminated. Particularly, as in the present embodiment, the flatness and the film quality are further improved by performing the spin coating and the baking in a plurality of times. A SiNX film (3) is further formed on the SOG film (2) by CVD, and these SiO2 film (1), SOG film (2) and Si are formed.
The NX film (3) is used as the second interlayer insulating layer (16).

The structure requiring such a high temperature process can be realized only in a liquid crystal display device using a highly heat-resistant quartz glass substrate and p-SiTFT. Also, S
Considering the heat resistance of the drain line (15) already formed of Al when firing the OG, the quality of the SOG film (2) deteriorates if the temperature is not raised. As a result, the SOG film (2) having poor film quality is used only for planarization, and the SiO2 film (1) and Si
Interlayer insulation is formed by the NX film (3), and insulation failure due to defects in the SOG film (2) is prevented.

Further, in the structure of FIG. 3, the sub line (15
When Cr is used as S), the SOG film (2) is baked at a high temperature to eliminate the need for the SiO2 film (1).
An oxide film of r is formed, and reflection is suppressed. That is, by using Cr, which has relatively high reactivity, and performing firing at a high temperature to actively promote surface oxide contamination, reflection by the drain line (15) can be prevented. In addition,
The sub-line (15S) also plays a role of suppressing the generation of hillocks due to the thermal history of the main line (15M) made of Al, and here again, Al is protected during the firing of SOG.

After forming contact holes (CT2) in the gate insulating layer (12), the first interlayer insulating layer (14) and the second interlayer insulating layer (16) on the source region (11s), sputtering of Al is performed. Then, a pixel electrode (17) which also serves as a reflection layer is formed by performing photoetching, and the source region (11) is formed through the contact hole (CT2).
s) is also connected. Since the pixel electrode (17) is formed on the flattened second interlayer insulating layer (16), high flatness is obtained.

As shown in FIGS. 1 and 3, the pixel electrode (1
7) is superimposed on the sub line (15S),
Close to the main line (15M). That is, the drain line (15) is a thick main line (15).
The main line (15M) has a narrower line width than the conventional one, and the sub line (15S) has a thin film thickness.
In addition, the pixel electrode (17) is larger than the conventional one, and the display area is expanded by expanding to the limit of the minimum separation distance (L) for preventing crosstalk with the adjacent pixel electrode (17). Further, the sub-line (15S) suppresses an increase in resistance due to the reduced line width of the may line (15M), compensates for conductivity, and is formed to have a thin film thickness, so that the sub-line (15S) and A step is obtained, which increases the distance from the pixel electrode (17) on the second interlayer insulating layer (16) that is flattened to cover the drain line (15) and reduce the parasitic capacitance. ing.

The positional relationship between the pixel electrode (17) and the may line (15M) and the sub line (15S) is improved in alignment accuracy by improving the flatness of the second interlayer insulating layer (16). It has been improved and control is possible within a range of misalignment of 1 μm or less, and the adjacent pixel electrodes (17) are all drain lines (15).
On the other hand, the display area is overlapped with the optimum overlap portion width (L1) adjusted to enlarge the display area and reduce the parasitic capacitance. For this reason, the positional relationship between the adjacent pixel electrodes (17) and the May line (15M) between them is deviated, and one of the pixel electrodes (1
It is possible to prevent that 7) and Mayline (15M) are overlapped with each other and the parasitic capacitance is increased to cause crosstalk between the source and the drain and signal delay.

Similarly, as shown in FIG. 4, even on the side of the gate line (13), the positional relationship between the adjacent pixel electrodes (17) and the gate line (13) between them is controlled with high accuracy, and the minimum separation distance is obtained. (L) and overlapping portion width (L2),
The display area is expanded by expanding the pixel electrode (17), and the overlapping area of the two pixel electrodes (17) and the gate line (13) is changed to increase the parasitic capacitance on one side and crosstalk or The signal delay is prevented.

In the present invention, by flattening the second interlayer insulating layer (16) which is the base of the pixel electrode (17),
Light is reflected uniformly over the entire area of the pixel electrode (17) that also serves as a reflective layer. Therefore, it is possible to prevent light modulated for each pixel from interfering with each other to lower the contrast ratio and prevent the chromaticity distribution from changing due to the shift of the additive color mixture. Further, when used in a light valve of a projector, reflected light is prevented from being scattered outside a predetermined optical path set in the optical system, so that the light utilization efficiency is improved and a bright display with high brightness can be obtained. .

Further, as shown in FIGS. 3 and 4, since the pixel electrode (17) is expanded while maintaining the flatness,
The aperture ratio is increased, the light use efficiency is further increased, and the brightness is improved. Further, by expanding the pixel electrode (17) and reducing the non-display area, the amount of unmodulated light between pixels is reduced, and the contrast ratio is improved. Further, the firing of the SOG film (2) is positively utilized to make a sub line (15S).
By promoting the surface oxidation contamination of the above, reflection by the drain line (15) is prevented, and the contrast ratio is further improved.

As the planarization of the second interlayer insulating layer (16), in addition to the use of the SOG film (2) described above, CMP (chem
ical mechanical polishing) method. That is, on the substrate on which the drain line (15) is formed, E
A SiO2 film is formed by CR-CVD, and mechanical polishing removal using a weak alkaline polishing liquid enhances polishing efficiency due to the combined effect of chemical reaction and mechanical friction, and planarizes. As a result, highly accurate flatness is obtained, and the unevenness of the pixel electrode (17) is eliminated.

[0034]

As is apparent from the above description, in the reflective liquid crystal display device used in a projector or the like according to the present invention, the underlying layer of the pixel electrode is flattened to prevent scattering of reflected light. As a result, deterioration of luminance and contrast ratio, or change of chromaticity distribution was prevented, and display quality was improved.

Further, by expanding the pixel electrode onto the gate line and the drain line, the aperture ratio was improved, the brightness and the contrast ratio were further increased, and a bright screen was obtained.

[Brief description of drawings]

FIG. 1 is a plan view of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a sectional view taken along line AA of FIG.

FIG. 3 is a sectional view taken along line BB of FIG. 1;

FIG. 4 is a cross-sectional view taken along the line CC of FIG.

FIG. 5 is a cross-sectional view of a second interlayer insulating layer.

FIG. 6 is a plan view of a conventional liquid crystal display device.

7 is a cross-sectional view taken along the line DD of FIG.

FIG. 8 is a cross-sectional view taken along the line EE of FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 SiO2 film 2 SOG film 3 SiNX film 10 Transparent substrate 11 p-Si active layer 12 Gate insulating layer 13 Gate line 14 First interlayer insulating layer 15 Drain line 15M main line 15S Subline 16 Second interlayer insulating layer 17 Pixel electrode CT contact hole L Minimum separation distance L1, L2 Overlap width

Claims (6)

[Claims] 1. An electrode wiring substrate having a reflective layer and a transparent electrode substrate having a common electrode are bonded together with a liquid crystal layer interposed therebetween.
While a signal voltage is applied to the liquid crystal driving pixel capacitance formed for each display pixel to change the orientation of the liquid crystal, the light incident from the transparent electrode substrate side is reflected by the reflective layer and the liquid crystal layer is reciprocated. In the reflective liquid crystal display device in which each display pixel is modulated and re-emitted from the transparent electrode substrate side, the electrode wiring substrate is provided on an insulating substrate, and a channel layer containing no impurities and both side edges of the channel layer. An island-shaped polycrystalline semiconductor layer including a source region and a drain region each containing an impurity, a first insulating layer formed on the polycrystalline semiconductor layer, and a first insulating layer are formed. A gate line including a gate electrode formed on the insulated substrate and arranged above the channel layer, a second insulating layer formed on the gate line, and a second insulating layer formed on the gate line. The said A drain line formed on an insulating substrate and having a connection portion with the drain region, a third insulating layer which is formed entirely over the drain line and has a flat surface, and the third insulating layer A reflection type liquid crystal, which is formed on the common electrode and the liquid crystal layer and has a connection portion with the source region formed above to form the pixel capacitance and also serves as the reflection layer. Display device. 2. The third insulating layer is an SOG film formed by spin coating and baking a liquid material, or the SOG film.
The reflective liquid crystal display device according to claim 1, wherein the reflective liquid crystal display device comprises a multi-layer film including a G film. 3. The reflective liquid crystal display device according to claim 2, wherein the SOG film is formed by performing spin coating and baking of a liquid material a plurality of times. 4. The CMP utilizing the combined action of a chemical reaction by a polishing liquid and mechanical friction polishing for the third insulating layer.
The reflective liquid crystal display device according to claim 1, wherein the reflective liquid crystal display device is flattened by a method. 5. The drain line is arranged at a peripheral position of the pixel electrode, the pixel electrode is partially overlapped with the drain line with the third insulating layer interposed therebetween, and
The film thickness of the drain line is thin in a portion overlapping the pixel electrode.
5. The reflective liquid crystal display device according to claim 4. 6. The gate line is arranged so as to intersect the drain line at a peripheral position of the pixel electrode, and the pixel electrode is partially overlapped with the gate line with at least the third insulating layer sandwiched therebetween. The reflective liquid crystal display device according to claim 1, wherein the reflective liquid crystal display device is provided.