JPH08130161A - Chip rc network - Google Patents

Abstract

PURPOSE: To provide a chip RC network which is very easy to handle, facilitates the simplification of the wiring conductor films of a printed circuit board and facilitates the size reduction by a method wherein a plurality of T-type circuits composed of R's and C's which are waveform forming circuits and power supply noise filtering circuits which are frequently employed in an electronic circuit are provided in a block. CONSTITUTION: A plurality of pairs of terminal electrodes 2a-2e and 3a-3e are provided between a pair of the counter end surfaces of an insulating substrate 1. Lower capacitance electrodes 5a-5d are provided between the pairs of the terminal electrodes 2a-3a, 2b-3b, 2c-3c and 2d-3d. Thick film resistor films 4a-4d are formed so as to cross over a plurality of pairs of the terminal electrodes and the lower capacitance electrodes 2a-5a, 3a-5a, 2b-5b, 3b-5b.... Further, dielectric films 6a-6d and an upper capacitance electrode 7 are provided on the lower capacitance electrodes 5a-5d.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip RC network used for waveform shaping and noise removal in electronic circuits.

[0002]

2. Description of the Related Art Generally, as a circuit for shaping a signal waveform or removing noise on a power supply line in an electronic circuit, two resistors and one capacitor are connected in a T-type circuit, for example, a voltage dividing resistor, A circuit that shorts to the ground potential via a component is often used. Such a circuit generally has a resistance component
It is configured by using a chip resistor or a thick film resistor film formed on a circuit board, and using a chip capacitor as a capacitance component, and connecting the wiring conductor film so as to form a predetermined circuit.

[0003]

However, in the case where it is necessary to use a plurality of circuits in the complicated electronic circuit,
It is necessary to form a plurality of thick film resistor films and to mount a plurality of chip capacitors, which complicates the wiring conductor film on the circuit board, and is very troublesome. The occupying area required to mount the chiff component increases, which is an obstacle to circuit miniaturization.

The present invention has been devised in view of the above-mentioned problems, and an object thereof is to make a circuit used for waveform shaping, noise removal and the like into a block so as to facilitate the handling and wiring of a circuit board. (EN) Provided is a chip RC network capable of simplifying and downsizing a conductor film.

[0005]

According to the present invention, a large number of a pair of terminal electrodes are formed on opposite edges of an insulating substrate, and a lower capacitor electrode is formed between the plurality of pairs of terminal electrodes. A chip RC in which a thick film resistor film is formed between the plurality of pairs of terminal electrodes and the lower capacitance electrode, and a dielectric film and an upper capacitance electrode are arranged on the lower capacitance electrode.
It is a network.

[0006]

According to the present invention, the lower capacitor electrode is arranged between the pair of terminal electrodes, and the thick film resistor film is arranged between the both terminal electrodes and the lower capacitor electrode. Therefore, the two thick film resistor films serve as a voltage dividing resistor, and the lower capacitor electrode serves as a voltage dividing point of the voltage dividing resistor.

Further, since the dielectric film is formed on the lower capacitance electrode which is the voltage dividing point, and the upper capacitance electrode is further formed on the dielectric film, the dielectric film is formed between the lower conductor electrode and the upper capacitance electrode. A predetermined capacity component will be generated.

Therefore, if this upper capacitance electrode is commonly or individually connected to the ground terminal electrode, the two potential-dividing resistors and the potential-dividing resistance point portion of the voltage-dividing resistors are connected to the ground potential via the capacitance component. One T-network shorted to will be achieved.

Since this circuit network is formed as one electronic component by forming only the number of pairs of terminal electrodes on the insulating substrate, by mounting one electronic component on the printed wiring board, a plurality of terminals can be simultaneously formed. Waveform shaping and noise removal can be performed.

Further, since a plurality of circuit networks are divided into blocks, it is easy to handle and there is no need to mount a necessary number of thick film resistor films, chip resistors, chip capacitors and the like as in the conventional case. The circuit wiring conductor film on the printed wiring board can be simplified, and further, the printed wiring board can be miniaturized.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The chip RC network of the present invention will be described below in detail with reference to the drawings. 1 is a plan view of a chip RC network of the present invention, FIG. 2 is a sectional view taken along the line AA in FIG. 1, and FIG. 3 is an equivalent circuit diagram of FIG.

The chip RC network comprises an insulating substrate 1,
First terminal electrodes 2a to 2e, second terminal electrodes 3a to 3
e, thick film resistor films 4a to 4d, lower capacitance electrodes 5a to 5
d, the dielectric films 6a to 6d, and the upper capacitor electrode 7 as main components.

The insulating substrate 1 is made of, for example, alumina ceramic, and a plurality of insulating substrates 1 are provided on the end faces of the pair of end sides.
For example, five projecting portions 11a to 11e are formed, and five projecting portions 12a to 12e are also formed on the other end surface facing the projecting portions 11a to 11e. The protrusions 11a to 11e and 12a to
Reference numeral 12e designates the adjacent protruding portions 11a to 11e, 12
Semicircular cutouts between a to 12e and 1/4 of the protrusions 11a, 12a, 11e, 12e at the four corners on the outer side.
This is achieved by a circular cutout.

The protrusions 11a to 11e and 12a to 12
The insulating substrate 1 having e is formed by forming vertical and horizontal dividing grooves into which a plurality of insulating substrates 1 can be extracted on a large green sheet that can be extracted from a plurality of insulating substrates 1 and on which the dividing grooves intersect. It is formed by forming a circular through hole in the portion.

The first terminal electrodes 2a to 2e and the second terminal electrodes 3a to 3e are composed of an underlying conductor film containing an Ag-based conductor (Ag simple substance, Ag alloy) or the like as a main component and, if necessary, one of the surfaces thereof. A plating film such as Ni plating or solder plating is formed on the portion.

The first terminal electrodes 2a to 2e are the insulating substrate 1
Of the projecting portions 11a to 11e of the insulating substrate 1 and the second terminal electrodes 3a to 3e extend over the surface, end surfaces and back surfaces of the projecting portions 12a to 12e of the insulating substrate 1. Is formed.

The thick film resistors 4a to 4d are made of a metal oxide film having a predetermined resistivity, such as ruthenium oxide.
A part of the terminal electrodes 2a to 2d and the second terminal electrodes 3a to 3
It is formed so as to overlap with a part of d.

Further, lower capacitor electrodes 5a to 5d are formed so as to overlap in the vicinity of the substantially central portion of the thick film resistor films 4a to 4d. Thereby, one thick film resistor film of the thick film resistor films 4a to 4d, for example, 4a, is the first resistance component 41a between the terminal electrode 2a and the lower capacitance electrode 5a, the terminal electrode 3a, and the lower capacitance electrode. 5a and the second resistance component 42a. The same applies to the other thick film resistor films 4b to 4d.

The lower capacitor electrodes 5a to 5d are made of a conductor film containing an Ag-based conductor (Ag simple substance, Ag alloy) or the like as a main component, and have a substantially rectangular shape near the central portion of the thick film resistor films 4a to 4d. The islands are formed independently.

The dielectric films 6a to 6d are made of a dielectric material containing titanium oxide or the like, and are formed so as to cover the lower capacitance electrodes 5a to 5d. In addition, the dielectric films 6a to 6d
May be continuously formed so as to cover the lower capacitor electrodes 5a to 5d.

The upper capacitor electrode 7 is arranged, for example, on the dielectric films 6a to 6d formed on the lower capacitor electrodes 5a to 5d so as to face at least the lower capacitor electrodes 5a to 5d in a predetermined area. ing. This upper capacitance electrode 7 is
As shown in the figure, the entire structure is generally L-shaped so as to be commonly connected to the dielectric films 6a to 6d and connected to the terminal electrode 2e formed on the protrusion 11e.

In the figure, 8 is a glass protective film, and the glass protective film 8 is formed on the entire surface of the substrate 1 so as to expose a part of the terminal electrodes 2a to 2e, 3a to 3e.

The above-mentioned plating film is coated on part of the terminal electrodes 2a to 2e, 3a to 3e exposed from the glass protective film 8.

The second terminal electrode 3e formed on the protrusion 12e is a dummy electrode that does not operate in a circuit manner, and is formed to improve the bonding strength when mounted on a printed wiring board, for example. However, the circuit may be omitted.

With the above configuration, for example, the lower capacitance electrode 5 is provided between the first terminal electrode 2a and the second terminal electrode 3a.
via the first resistance component 41a and the second resistance component 4
2a will be connected in series. Further, the lower capacitance electrode 5a is provided between the lower capacitance electrode 5a and the upper capacitance electrode 7.
A predetermined capacitance component defined by the opposing area between the upper capacitance electrode 7 and the upper capacitance electrode 7 and the dielectric constant and thickness of the dielectric film 6a disposed between them is generated.

Similarly, the first terminal electrodes 2b to 2d and the second terminal electrodes
The same applies to the terminal electrodes 3b to 3d and the lower capacitance electrodes 5b to 5d.

As a result, the equivalent circuit shown in FIG. 3 is achieved. By mounting such a chip RC network on a predetermined circuit of a printed wiring board, for example, four circuits for performing waveform shaping and noise removal can be achieved. In forming a circuit for removing noise and noise, it becomes unnecessary to form two thick film resistor films, mount two chip resistors, mount one chip capacitor, etc. It is only necessary to mount it in the same way as above, and the handling is very easy.With this, the wiring conductor film on the printed wiring board is greatly simplified, and the occupying area required to mount each element is reduced. Therefore, miniaturization can be achieved.

In forming an actual chip RC network, it should be formed based on a large green sheet from which a plurality of elements can be extracted, and further, a resistance component and a capacitance component formed by a thick film method, etc. Need to be adjusted.

First, in order to stably adjust the resistance component, the capacitance component, etc. formed by the thick film method, the glass layer forming the glass protective layer 8 is formed during each manufacturing process and shown in FIG. As a whole, it may have a two-layer or three-layer structure. For example, from the insulating substrate 1 side to the first glass layer 81,
The thick film resistor films 4a to 4d and the lower capacitor electrodes 5a to 5d are formed subsequently, and the film thickness is 1
It is very thin, 0 μm or less. The first glass layer 81 exposes the lower capacitance electrodes 5a to 5d,
Moreover, the thick film resistor films 4a to 4d are formed so as to cover at least only the adjusted portions. That is, after forming the first glass layer 81, for example, a probe for measuring a resistance value is brought into contact between the first terminal electrode 2a and the lower capacitance electrode 5a to make the resistance value of the first resistance component 41a. While measuring
Laser irradiation is performed on a part of the thick film resistor film 4a between the first terminal electrode 2a and the lower capacitor electrode 5a, so that the thick film resistor film 4a.
By removing a part of a and the first glass layer 81, the first resistance component 41a is adjusted to a predetermined resistance value. Similarly, the resistance value of the second resistance component 42a between the second terminal electrode 3a and the lower capacitance electrode 5a is adjusted in the same manner. Further, the resistance values of the thick film resistor films 4b to 4d are similarly adjusted. Since the first glass layer 81 does not directly irradiate the thick film resistor films 4a to 4d with the laser beam, the thick film resistor films 4a to 4d are adversely affected by the laser beam irradiation, for example, cracks are generated. Never.

The second glass layer 82 is a very thin layer covering at least the upper capacitor electrode 7. The capacitance is adjusted by the upper capacitance electrode 7 facing the lower capacitance electrodes 5a to 5d.
Is adjusted by laser irradiation or the like so as to have a predetermined capacity. If the upper capacity electrode 7 is partly removed via the glass layer 82 as described above,
It is possible to very stably remove a part of the upper capacitance electrode 7 and adjust the facing area between the lower capacitance electrodes 5a to 5d and the upper capacitance electrode 7 to a predetermined amount.

At this time, the terminal used for measuring the capacitance value is, for example, the first terminal electrode 2e to which the first terminal electrode 2a and the upper capacitance electrode 7 are connected, and the adjusted resistor is used. The capacitance component connected in series with is measured in a combined state, and the upper capacitance electrode 7 above the lower capacitance electrode 5a is removed so that this characteristic has a predetermined characteristic.

The glass layer 82 may be omitted. This is because even if a crack or the like occurs in the upper capacitive electrode 7 due to laser irradiation, the variation in the characteristic value is very small compared to the variation in the characteristic of the resistance component described above. Further, when forming the first glass layer 81, it is possible to substantially limit the area of the exposed portion of the lower capacitance electrodes 5a to 5d to a predetermined area, thereby regulating the value of the capacitance component. .

The third glass layer 83 substantially covers the first glass layer 81 and the second glass layer 82, whereby the above-mentioned protective glass 8 is obtained. By forming the third glass layer 83, the portions exposed on the surface of the element may be coated with the plating layer on the surface of the first terminal electrodes 2a to 2e and the second terminal as described above. The electrodes 3a to 3e and the like.

Next, a method of manufacturing the chip RC network of the present invention will be described.

First, one large ceramic green sheet is prepared, and V-shaped dividing grooves are formed vertically and horizontally according to the shape of each element. Then, after the division, the protrusion 11a
To 11e and 12a to 12e, through holes are formed so as to straddle the dividing grooves. Such a green sheet is sintered to obtain a large-sized fired substrate.

Protruding portions 11a to 11 in respective regions which become respective elements
e, A on the front side and the back side of the positions 12a to 12e
First terminal electrodes 2a to 2 using g-based conductive paste
e, a coating film serving as a base conductor film for the second terminal electrodes 3a to 3e is formed, and dried and baked.

Next, a thick film resistor is provided between the underlying conductor film serving as the first terminal electrodes 2a to 2d and the underlying conductor film serving as the second terminal electrodes 3a to 3d on the surface side of each region to be an element. Body membrane 4
A to 4d are formed by printing / baking process using a resistor paste containing ruthenium oxide as a main component.

Next, a coating film to be the lower capacitance electrodes 5a to 5d is formed by using an Ag-based conductive paste in the vicinity of the central portion of the thick film resistor films 4a to 4d in the respective regions to be the respective elements. After drying, baking treatment is performed.

Next, if necessary, a first glass layer 81 is formed on a portion of the thick film resistor films 4a to 4d on the surface side of each element region, for example, a portion to be trimmed by laser irradiation. It is formed by printing and baking glass paste.

Next, if necessary, a part of the thick film resistor films 4a to 4d on the surface side of each region to be an element, that is, the first
Laser irradiation and scanning are performed while measuring the resistance value of the first resistance components 41a to 41d between the terminal electrodes 2a to 2d and the lower capacitance electrodes 5a to 5d to correct the resistance value.
At the same time, the first terminal electrodes 2a to 2d and the lower capacitance electrode 5a
To 5d, laser irradiation and scanning are performed while measuring the resistance values of the first resistance components 41a to 41d to correct the resistance values.

Next, the dielectric films 6a to 6d are formed on the lower capacitance electrodes 5a to 5d on the surface side of each region to be an element, and the dielectric material such as titanium oxide or the dielectric material containing a glass material having a predetermined dielectric constant is used. It is formed by printing and baking using body paste.

Next, the upper capacitor electrode 7 is formed by printing / baking using an Ag-based conductive paste on the dielectric films 6a to 6d on the surface side of each region to be an element.

Next, if necessary, the second glass layer 82 is formed on the upper capacitive electrode 7 on the surface side of each region to be an element, for example, at a portion to be trimmed by laser irradiation.
Are formed by printing and baking glass paste.

Next, if necessary, the first terminal electrode 2a is formed on a part of the upper capacitance electrode 7 on the surface side of each region to be an element.
Between 2d and the first terminal electrode 2e, laser irradiation and scanning are performed while measuring the characteristic value, and a part of the upper capacitor electrode 7 is removed to correct it so that the predetermined characteristic value is obtained.

Next, the third glass layer 83 is formed so as to expose only a part of the first terminal electrodes 2a to 2e and the second terminal electrodes 3a to 3e on the front surface side of each region to be an element. It is formed by printing and baking glass paste. Incidentally, FIG.
The protective glass 8 shown in FIG. 2 is the third glass layer 83.
Refers to.

Next, a primary break is made in one side of the dividing grooves (the dividing grooves on the side of the first terminal electrodes 2a to 2e and the second terminal electrodes 3a to 3e) which partition each region to be an element, and a large size is obtained. The substrate is a strip substrate.

Next, the strip-shaped substrates are aligned so that the divided end faces are exposed, and the protrusions 11a to 11e and 12a to 12e are arranged.
The base conductor film on the end face portions of the first terminal electrodes 2a to 2e and the second terminal electrodes 3a to 3e is printed and printed on the end face of the substrate using Ag-based conductive paste.

Next, a secondary break is made in the dividing groove on the other side for partitioning each region to be an element, and the strip substrate is used as an individual insulating substrate 1.

Finally, if necessary, the surface of the first terminal electrodes 2a to 2e and the second terminal electrodes 3a to 3e exposed from the glass layer 83 (protective glass 8) is plated with Ni or solder. Are formed by barrel plating or the like.

In the above embodiments, the dielectric films 6a-6d.
Are individually formed so as to completely cover the respective lower capacitance electrodes 5a to 5d.
Like the upper capacitance electrode 7, a plurality of lower capacitance electrodes 5a
It may be formed continuously for up to 5d.

The first resistance components 41a to 41d and the second resistance components 42a to 42 of the thick film resistor films 4a to 4d are also included.
When it is not necessary to adjust the resistance value of e, the dielectric films 6a to 6a
d is the entire substrate surface side of the device (first terminal electrodes 2a to
2e and the second terminal electrodes 3a to 3e are partially exposed).

Further, in the above-described embodiment, after forming the thick film resistor films 4a to 4d, the lower capacitor electrodes 5a to 5b are formed in the vicinity of the central portion thereof in an overlapping manner. 5a to 5d are formed, and then, for example, the first
Of the first thick film resistor film so as to straddle the terminal electrode 2a and a portion of the lower capacitance electrode 5a, and the second thick film of the second terminal electrode 3a so as to straddle a portion of the lower capacitance electrode 5a. A thick film resistor film may be formed. In this case, the lower capacitance electrodes 5a to 5d
Can be formed at the same time as the steps of forming the first and second terminal electrodes 2a to 2e and 3a to 3e, the number of steps can be reduced.

In the figure, the upper capacitor electrode 7 is formed in a substantially L-shape, is commonly formed for the four R and C T-shaped networks, and is connected to the first terminal electrode 2e. However, this may be formed into an individual upper capacitance electrode and an individual terminal electrode. In this case, for example, it can be as shown in FIG. That is, the first terminal electrode 20a is provided on the leftmost protrusion 11a of the pair of end faces of the insulating substrate 1, and the protrusion 1
2a, a second terminal electrode 30a is formed, a thick film resistor film 40a is formed between the first terminal electrode 20a and the second terminal electrode 30a, and a thick film resistor film 40a is formed on the thick film resistor film 40a. The capacitor electrode 50a and the dielectric film 60a are formed, and then the upper capacitor electrode 70a formed on the dielectric film 60a is replaced with the first terminal electrode 20 of the second protruding portion 11b from the left of the insulating substrate.
It is formed so as to be connected to b. Similarly, the insulating substrate 1
Of the thick film resistor film 4 between the first terminal electrode 20c and the second terminal electrode 30c of the third protrusions 11c and 12c from the left of FIG.
0b, the upper capacitance electrode 70b formed via the lower capacitance electrode 50b and the dielectric film 60b is the second terminal electrode 3 formed on the second protrusion 120b from the left of the insulating substrate 1.
Connect to 0b.

In the above embodiment, one chip RC is used.
Although four R and C T-type road networks are formed in the network, the number is not limited to four, and the number of the network may be increased or decreased depending on the circuit on the printed wiring board. .

[0055]

As described above, according to the chip RC network of the present invention, a plurality of waveform shaping circuits and R-C T-type circuits which are power supply noise eliminating circuits, which are often used in electronic circuits, are divided into blocks. The handling is very easy, the wiring conductor film on the printed circuit board can be simplified, and the size can be greatly reduced.

[Brief description of drawings]

FIG. 1 is a plan view of a chip RC network of the present invention.

FIG. 2 is a sectional view taken along the line AA of FIG.

FIG. 3 is an equivalent circuit diagram of the chip RC network of the present invention.

FIG. 4 is a partial cross-sectional view of the chip RC network of the present invention.

FIG. 5 is a plan view showing another embodiment of the chip RC network of the present invention.

[Explanation of symbols]

1 ... Insulating substrate 11a-11e, 12a-12e 2a-2e, 20a, 20b, 20c ... 1st terminal electrode 3a-3e, 30a, 30b, 30c ... 2nd terminal electrode 4a- 4d, 40a, 40b ..... Thick film resistor film 5a to 5d, 50a, 50b ..... Lower capacitance electrode 6a to 6d, 60a, 60b ..... Dielectric Membrane 7, 70a, 70b ..... upper capacitance electrode

Claims (1)

[Claims] 1. A plurality of pairs of terminal electrodes are formed on opposite edges of an insulating substrate, and lower capacitance electrodes are formed between the pairs of terminal electrodes, and the plurality of pairs of terminal electrodes and the lower capacitance electrodes are formed. A chip RC network characterized in that a thick film resistor film is formed between the first and second electrodes, and a dielectric film and an upper capacitor electrode are arranged on the lower capacitor electrode.