JPH08125309A - Ceramic printed wiring board - Google Patents

Abstract

PURPOSE: To prevent adhesion between a conductor circuit layer and a ceramic substrate from deteriorating due to diffusion of a tin component of solder even at a high use temperature of a conductor circuit layer after mounted when a part is mounted by using solder comprised of tin and lead on a conductor circuit layer. CONSTITUTION: In a ceramic printed wiring board wherein a conductor circuit layer 6 is formed of a foundation layer 2 constituted of an electroless plating layer on a surface of a ceramic substrate 1, a second intermediate layer 4 constituted of a palladium layer 4p on an upper surface of the foundation layer 2 and a surface layer 5 constituted of a gold layer 5k on an upper surface of the second intermediate layer 4, a first intermediate layer 3 constituted of an electrolytic plating copper layer 3d is formed between the foundation layer 2 and the second intermediate layer 4, a film thickness of the first intermediate layer 3 is 1 to 10μm and a film thickness of the foundation layer 2 is 0.1 to 10μm.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic printed wiring board used in electronic equipment such as mobile phones and tape recorders.

[0002]

2. Description of the Related Art Conventionally, powders of silver, palladium, platinum, gold, etc., glass powders called frit, additives for controlling the state of crystal grains during sintering, and A resin called a binder is mixed, an appropriate amount of solvent is added to form a paste, and this is printed as a wiring circuit by screen printing, and then baked to form a circuit. A thin film method has been used in which a predetermined circuit is formed by etching, patterning by photolithography, and etching. The thick film method can inexpensively form a circuit, but the circuit method is 100 μm because the screen method is used.
It was difficult to form a fine circuit of m or less. On the other hand, the thin film method uses a photographic method to form a circuit, so
Although it is possible to form a fine circuit to some extent, the cost for forming the conductor film and forming the circuit is high, which is expensive. In recent years, a method for manufacturing a ceramic printed wiring board by a plating method has been proposed as a method for achieving both the low cost of the thick film method and the high accuracy of the thin film method. An example of the manufacturing method will be described.

First, the surface of the ceramic substrate is chemically roughened, and then palladium is nucleated. Next, the substrate is immersed in an electroless copper plating solution to form a conductor metal layer of copper on the surface of the substrate. The conductor circuit is formed by etching the conductor metal layer according to a desired wiring pattern.

In addition to recent miniaturization of conductor circuits, demands for higher packaging density include die-bonding ability for directly mounting an IC chip on a substrate and wire-bonding ability for connecting an IC chip to a circuit. It has been demanded. In order to satisfy these requirements, the connection part needs to be formed of pure gold. In addition, with the increasing density of information, higher frequencies have come to be used. However, in such a high frequency circuit board, in order to keep the surface state of the conductor circuit clean and uniform, the surface metal is also used. A finish is desired.

Regarding the gold finish, in the case of the thick film method,
It is possible to print and form a necessary portion with gold paste, but it is costly because the conductor thickness cannot be reduced. In the case of the thin film method, it is possible to collect gold on the entire surface of the substrate with gold, and to recover the gold that does not require gold finishing to form the circuit by etching, or to recover the gold, but the gold in the etched area is wasted and The cost was high due to various problems. On the other hand, in the case of the plating method, a thin conductive layer is formed by electroless plating, a resist for a negative pattern of a conductor circuit is provided, and after forming a conductor circuit by electroplating,
A less expensive gold finish can be achieved by a so-called semi-additive method in which a resist is removed and etching is performed to form a conductor circuit. However, for a ceramic wiring board by a semi-amidative method capable of forming a fine conductor circuit portion, and the surface of the conductor circuit portion is a gold layer, a ceramic wiring board with a base layer of copper or nickel is used. When the gold layer is arranged directly on the metal, there is a problem that the semiconductor chip cannot be firmly bonded by die bonding because the copper of the underlayer diffuses to the surface of the gold layer by heating at around 450 ° C. Therefore, in order to solve this problem, for example, a method disclosed in Japanese Patent Publication No. 60-34257 is proposed. That is, in an electronic component having a nickel layer and a gold conductive layer as a base layer on the metal surface, a metal layer made of silver, palladium or an alloy thereof is provided between the nickel layer and the gold conductive layer. An electronic component having a conductive layer of gold characterized by being provided is disclosed. However, with this method, the die bonding characteristics and wire bonding characteristics are secured,
When components are mounted on the conductor circuit layer using solder consisting of tin and lead, and when the temperature of the conductor circuit layer after mounting is high, tin and lead cause mutual diffusion with the conductor circuit layer, and the coating film The formation of the brittle copper-tin intermetallic compound has a problem in that the adhesion strength is lowered and the mounted parts are missing.

[0006]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and it is an object of the present invention to mount a component on a conductor circuit layer using solder made of tin or lead. An object of the present invention is to provide a ceramic printed wiring board capable of preventing a decrease in the adhesive force between the conductor circuit layer and the ceramic substrate due to the diffusion of the tin component of the solder even when the temperature of the conductor circuit layer after mounting is high.

[0007]

According to a first aspect of the present invention, there is provided a ceramic printed wiring board in which a base layer 2 formed on the surface of a ceramic substrate 1 by an electroless plating layer and an upper surface of the base layer 2. Second palladium layer 4p
In the ceramic printed wiring board in which the conductor circuit layer 6 is formed by the intermediate layer 4 and the surface layer 5 composed of the gold layer 5k on the upper surface of the second intermediate layer 4, the base layer 2 and the second layer 2 A first intermediate layer 3 composed of an electroplated copper layer 3d is formed between the intermediate layer 4 and the intermediate layer 4, and the first intermediate layer 3 is formed.
Is 1 to 10 μm, and the thickness of the underlayer 2 is
It is characterized by being 0.1 to 10 μm.

A ceramic printed wiring board according to a second aspect of the present invention is characterized in that the underlayer 2 is composed of an electroless plated copper layer 2c.

In the ceramic printed wiring board according to claim 3 of the present invention, the underlayer 2 is an electroless plated nickel layer 2.
n or electroless plated nickel alloy layer 2a.

A ceramic printed wiring board according to a fourth aspect of the present invention is characterized in that the electroplated copper layer 3d is a bright plated layer using a brightening agent.

The present invention will be described in detail below. As the ceramic substrate 1 shown in FIG. 1A used in the present invention, an ordinary wiring substrate such as an alumina substrate, an aluminum nitride substrate, a beryllia substrate, a mullite substrate, barium titanate, a silicon carbide substrate, a glass substrate, etc. An insulating substrate made of various ceramic materials similar to the above is used. Although it is possible to form the conductor circuit layer 6 on the ceramic substrate 1 as it is, preferably, the surface of the ceramic substrate 1 is roughened chemically or physically in order to increase the adhesion of the plated conductor. Suitable ceramic substrate 1 is
When the conductor circuit layer 6 is formed on the roughened ceramic substrate 1, the adhesion between the ceramic substrate 1 and the conductor circuit layer 6 can be improved. That is, since this roughening process causes a kind of anchor effect between the conductor circuit layer 6 and the ceramic substrate 1, the mutual adhesive force is increased, and the occurrence of defects such as blister and peeling can be prevented. As a specific example of the roughening treatment, for example, two ceramic substrates 1 such as an alumina-based substrate are placed in phosphoric acid heated to 250 to 330 ° C.
The method of immersing for 20 minutes is mentioned.

As shown in FIG. 1B, an electroless plated copper layer 2c, an electroless plated nickel layer 2n or an electroless plated nickel alloy layer 2a is provided as a base layer 2 on the entire upper surface of the ceramic substrate 1. Has been formed. This underlayer 2
The film thickness of is required to be 0.1 μm or more in order to make the entire surface of the substrate equipotential in the subsequent electroplating, and is preferably 0.5 μm or more. Further, since the unnecessary portion is removed by etching after the gold layer 40 is formed, the film thickness of the underlayer 2 needs to be 10 μm or less from the viewpoint of side etching, and is preferably 5 μm or less. That is, when the film thickness of the underlayer 2 exceeds 10 μm, the side surface portion of the underlayer 2 is removed by etching, so-called side etching occurs, and the adhesion area of the underlayer 2 becomes small, so the ceramic substrate 1 Adhesion with is reduced. By using the electroless plating nickel layer 2n using nickel as the power supply metal which is the base layer 2, the adhesion to the ceramic substrate 1 is further improved as compared with the case of copper. In place of the electroless plated nickel layer 2n, nickel alloys such as nickel / phosphorus, nickel / boron, nickel / cobalt, etc. are not used from the viewpoints of etching in later steps, plating rate, cost and plating throwing power. The electrolytically plated nickel alloy layer 2a can also be used.

As shown in FIG. 1C, a plating resist 7 is applied to a required portion of the upper surface of the underlayer 2, and the underlying layer of the upper surface of the underlayer 2 where the plating resist 7 is not applied. 2 has an electroplated copper layer 3d on the upper surface of the first intermediate layer 3
Is formed as. The electroplated copper layer 3d has a function of preventing embrittlement of a connecting portion between a conductor and a substrate due to diffusion of tin after soldering (a solder aging resistance), which is a problem in the prior art. Although it is possible to form the copper layer of the electroplated copper layer 3d by an electroless plating method, the electroplating method can form a denser film than the electroless plating method, so that tin diffusion High prevention effect. The thickness of the electroplated copper layer 3d needs to be 1 to 10 μm. That is, when the thickness of the electroplated copper layer 3d is less than 1 μm, the effect of the solder aging resistance cannot be obtained, and when it exceeds 10 μm, the plating time becomes long and it is not practical. Further, since the electroplated copper layer 3d is a bright plated layer using a brightening agent, a higher tin diffusion preventing effect can be obtained. The brightening agent used in the bright plating may be a commercially available product, and is not particularly limited.

As shown in FIG. 1D, a palladium layer 4p is formed as a second intermediate layer 4 on the upper surface of the first intermediate layer 3. A gold layer 5k is formed as a surface layer 5 on the upper surface of the second intermediate layer 4.

As shown in FIG. 1 (e), after removing the plating resist 7, the exposed underlayer 2 is etched to obtain a gold-plated ceramic wiring board having excellent solder resistance.

[0016]

In the ceramic printed wiring board according to the first and second aspects of the present invention, the electroless-plated copper layer 2c is formed as the underlayer 2 on the surface of the ceramic substrate 1, and the upper surface of the underlayer 2 is densely packed. Since the electroplated copper layer 3d, which is a different film, is formed as the first intermediate layer 3, it prevents bridging of the connection between the conductor and the substrate due to the diffusion of tin after soldering.

In the ceramic printed wiring board according to the third aspect of the present invention, since the electroless plated nickel layer 2n or the electroless plated nickel alloy layer 2a is formed as the base layer 2 on the surface of the ceramic substrate 1, the solder is used. Further, the brittleness of the connecting portion between the conductor and the substrate due to the later diffusion of tin is further prevented.

In the ceramic printed wiring board according to claim 4 of the present invention, since the electroplated copper layer 3d is a bright plated layer using a brightening agent, and a dense film is formed,
The tin diffusion prevention effect is further enhanced.

[0019]

EXAMPLES Hereinafter, the present invention will be described with reference to Examples and Comparative Examples.
This will be specifically described.

(Examples 1 to 10) 96% alumina white ceramic substrate 1 (100 mm x 100 mm) whose surface was roughened by immersing in phosphoric acid heated to 300 ° C, as shown in FIG. X0.635 mm: manufactured by Matsushita Electric Works, Ltd.), and after undergoing a nucleation step (OPC process AC: manufactured by Okuno Chemical Industries Co., Ltd.) by an alkali catalyst method, electroless copper plating is performed for Examples 1 to 5. Thus, the electroless plated copper layer 2c is formed on the entire upper surface of the ceramic substrate 1 and, in Examples 6 to 10, the electroless plated nickel alloy layer 2a is formed on the entire upper surface of the ceramic substrate 1 by electroless nickel / boron plating. The ground layer 2 was formed, and the film thickness of the underlayer 2 was measured by a fluorescent X-ray film thickness meter and is shown in Table 1.

Then, a dry film resist (Liston 4620: trade name of DuPont Japan Limited) was laminated as the plating resist 7, and a resist pattern was formed by using a mask through which the non-conductor circuit portion was transparent.

An electroplated copper layer 3d is formed on the upper surface of the base layer 2.
Was formed as the first intermediate layer 3, and the film thickness of the first intermediate layer 3 was measured by a fluorescent X-ray film thickness meter and is shown in Table 1. However, the composition of the electrolytic copper plating bath is CuSO ₄ , 5H ₂ O; 7
5 g / liter, H ₂ SO ₄ ; 190 g / liter, C
l ⁻ : 60 ppm, and electrolytic copper plating was performed at room temperature (about 25 ° C.). In addition, brightener (Sulcap AC
-90: Uemura Kogyo Co., Ltd.) was added at 5 ml / liter, and the presence or absence of use is shown in Table 1.

Next, a commercially available electroplating bath (Paradex Strike: trade name of EEJA) and a secondary electroplating bath (Paradex 110: E) are formed on the upper surface of the first intermediate layer 3.
The palladium layer 4p is formed as the second intermediate layer 4 by EJA's trade name), and then a commercially available electro-gold plating bath (O-
Lobond TN: trade name of EEJA company) and electroplating with a secondary electroplating bath (Templex 401: trade name of EEJA company) to form a gold layer 5k as a surface layer 5 on the upper surface of the second intermediate layer 4. . As a result of measurement with a fluorescent X-ray film thickness meter, the film thickness of the palladium layer 4p is 3 μm.
The thickness of the gold layer 5k was 2 μm. After that, the plating resist 7 is peeled off by immersing in an aqueous solution of 3% sodium hydroxide, and then the electroless plating copper layer 2c or the electroless plating nickel alloy layer 2a is treated with sodium persulfate or sulfuric acid (125 g, 40 ml / liter). 2) soft etching is performed to remove the electroless plated copper layer 2c or the electroless plated nickel alloy layer 2a in the non-conductor circuit portion, followed by washing with water and drying, and a ceramic print on which the desired conductor circuit layer 6 is formed. The wiring board was obtained. The side etching is evaluated by a tape test by sticking a tape on the conductor circuit layer 6 having a conductor width of 200 μm and peeling off vigorously, and the case where the conductor circuit layer 6 does not peel off is evaluated as good and the case where the conductor circuit layer 6 does not peel off The results are shown in Table 1. Regarding the adhesive strength after soldering, the obtained ceramic printed wiring board is soldered and the solder is pulled to obtain an adhesion strength of each layer of 2 cm ×
The L-shaped peel strength before and after aging in a pattern of 2 cm was measured, and these values are shown in Table 1. Aging was performed under the conditions of 150 ° C. and 100 hours. A peel strength of 2 kgf / 4 mm ² or more was regarded as acceptable.

[0024]

[Table 1]

Comparative Examples 1 to 6 In Comparative Examples 1 to 3, the ceramic substrate 1 was formed by electroless copper plating.
Of the electroless plated copper layer 2c is formed on the entire upper surface of the ceramic substrate 1 and the electroless plated nickel alloy layer 2a is formed on the entire upper surface of the ceramic substrate 1 by electroless nickel / boron plating as the underlayer 2. Then, a ceramic printed wiring board was obtained and evaluated in the same manner as in Example 1, and the results are shown in Table 1.

As a result of Table 1, in the example, compared to the comparative example, when the component was mounted on the conductor circuit layer by using solder made of tin and lead, and the operating temperature of the conductor circuit layer after mounting was high, However, it has been confirmed that it is possible to prevent a decrease in the adhesive force between the conductor circuit layer 6 and the ceramic substrate 1 due to the diffusion of the tin component of the solder.

[0027]

According to the ceramic printed wiring board of the first and second aspects of the present invention, tin is provided on the conductor circuit layer.
When mounting components using lead solder, even when the operating temperature of the conductor circuit layer after mounting is high, prevent the adhesive force between the conductor circuit layer and the ceramic substrate from decreasing due to diffusion of the tin component of the solder. You can

According to the ceramic printed wiring board of the third aspect of the present invention, it is possible to further prevent a decrease in the adhesive force between the conductor circuit layer and the ceramic substrate due to the diffusion of the tin component of the solder.

According to the ceramic printed wiring board of the fourth aspect of the present invention, the effect of preventing tin diffusion is further enhanced, so that the adhesion force between the conductor circuit layer and the ceramic substrate can be further prevented from decreasing.

[Brief description of drawings]

FIG. 1 is an explanatory cross-sectional view of a method for manufacturing a ceramic printed wiring board according to an example of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Ceramic substrate 2 Underlayer 2a Electroless plating nickel alloy layer 2c Electroless plating copper layer 2n Electroless plating nickel layer 3 First intermediate layer 3d Electroplating copper layer 4 Second intermediate layer 4p Palladium layer 5 Surface layer 5k Gold layer 6 Conductor circuit layer

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Naohito Fukuya 1048 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works Co., Ltd.

Claims (4)

[Claims] 1. A base layer (2) formed of an electroless plating layer on the surface of a ceramic substrate (1), and a palladium layer (4p) formed on the upper surface of the base layer (2). 2 A ceramic print in which a conductor circuit layer (6) is formed by an intermediate layer (4) and a surface layer (5) composed of a gold layer (5k) on the upper surface of the second intermediate layer (4). In the wiring board, a first electroplated copper layer (3d) is formed between the base layer (2) and the second intermediate layer (4).
An intermediate layer (3) is formed, the thickness of the first intermediate layer (3) is 1 to 10 μm, and the thickness of the underlayer (2) is
A ceramic printed wiring board having a thickness of 0.1 to 10 μm. 2. The ceramic printed wiring board according to claim 1, wherein the underlayer (2) is composed of an electroless plated copper layer (2c). 3. The electroless plating nickel layer (2n) or the electroless plating nickel alloy layer (2a) is used as the underlayer (2).
The ceramic printed wiring board according to claim 1, wherein the ceramic printed wiring board is formed of: 4. The ceramic printed wiring board according to claim 1, wherein the electroplated copper layer (3d) is a bright plated layer using a brightening agent.