JPH08111649A - Receiver - Google Patents

Receiver

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Publication number
JPH08111649A
JPH08111649A JP24768194A JP24768194A JPH08111649A JP H08111649 A JPH08111649 A JP H08111649A JP 24768194 A JP24768194 A JP 24768194A JP 24768194 A JP24768194 A JP 24768194A JP H08111649 A JPH08111649 A JP H08111649A
Authority
JP
Japan
Prior art keywords
frequency
oscillation
oscillating
frequencies
reception
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24768194A
Other languages
Japanese (ja)
Inventor
Teruya Katanosaka
輝也 片野坂
Takaaki Furuta
敬明 古田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP24768194A priority Critical patent/JPH08111649A/en
Publication of JPH08111649A publication Critical patent/JPH08111649A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To receive a high quality reception signal by a constitution which is excellent in handling convenience and simple by forming a second oscillation means and automatically switching the frequency of a clock signal. CONSTITUTION: Under the control of a control means 13, the oscillation frequency of a second oscillation means 2 switched by a frequency switch means 5 is counted by a counting means 3 by defining the oscillation frequency of a first oscillation means 1 as a reference. Of the high frequency components of the counted frequencies, the nth order harmonic component of the value which is the nearest to the reception frequency of a reception means 6 is specified. The high frequency component which is farthest from the reception frequency of this specified nth order harmonic component is specified by a comparison arithmetic means 4. The oscillation frequency of the second oscillation means 2 is switched to the frequency corresponding to this specified high frequency component by a switch means 5. By this operation, the oscillation frequency of the second oscillation means 2 oscillating a clock signal for a microcomputer 13 can be automatically switched to the frequency which does not interfere with a reception signal.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はラジオの受信機能を有
し、マイクロコンピュータによりシステム制御される受
信装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiver having a radio receiving function and system-controlled by a microcomputer.

【0002】[0002]

【従来の技術】近年、ラジオ受信装置、磁気記録装置、
時計機能等複数の機能を備えるオーディオ機器のシステ
ム制御には、所定の周波数のクロックで駆動されるマイ
クロコンピュータが一般に用いられている。
2. Description of the Related Art In recent years, radio receivers, magnetic recording devices,
A microcomputer driven by a clock having a predetermined frequency is generally used for system control of an audio device having a plurality of functions such as a clock function.

【0003】この様に、FM,AM放送、TV放送等の
受信手段や、時計機能、磁気記録再生手段、コンパクト
ディスクの再生装置等複数の機能を備えた機器のシステ
ム制御を行うマイクロコンピュータに供給されるクロッ
ク信号やその高調波成分が受信周波数の近傍にあると上
記AM放送等の受信に妨害を与える。
In this way, it is supplied to a microcomputer for system control of a device having a plurality of functions such as a receiving means for FM, AM broadcasting, TV broadcasting, etc., a clock function, a magnetic recording / reproducing means, a compact disc reproducing device and the like. If the clock signal to be generated and its harmonic components are in the vicinity of the reception frequency, the reception of the AM broadcast or the like is disturbed.

【0004】そこで従来の受信装置はこのような受信妨
害を防ぐため、金属板などを用いてそれらの素子を囲む
ことにより妨害電波が洩れないようにシールドしたり、
それでも妨害が防ぎきれない場合は、例えば特開昭63
−73728号公報に記載されているように、機械的ス
イッチを設け、受信時に妨害が出るとそのスイッチを切
換えることによりクロック発振の周波数を変化させ、妨
害を防ぐという方式が取られていた。
Therefore, in order to prevent such reception interference, conventional receivers use metal plates or the like to surround these elements so as to shield jamming radio waves from leaking,
If the interference still cannot be prevented, for example, Japanese Patent Application Laid-Open No. 63-63
As described in JP-A-73728, there has been adopted a system in which a mechanical switch is provided, and when interference occurs during reception, the frequency of clock oscillation is changed by switching the switch to prevent interference.

【0005】[0005]

【発明が解決しようとする課題】しかしながら上記のよ
うな従来の受信装置は、シールド板やクロック周波数を
変化させるためのスイッチを設ける必要があり、受信時
に妨害があればそのスイッチを切り換えるという操作が
必要であり、装置が高価になると共に非常に使い勝手の
悪いものになっていた。
However, in the conventional receiving apparatus as described above, it is necessary to provide a shield plate and a switch for changing the clock frequency, and if there is interference during reception, the operation of switching the switch is required. It was necessary, the device was expensive and very inconvenient.

【0006】本発明は上記従来の問題点に鑑み、マイク
ロコンピュータにクロック発振する発振手段により受信
妨害を受けることのない受信装置の提供を目的とする。
In view of the above conventional problems, it is an object of the present invention to provide a receiving device which is free from reception interference by the oscillating means for oscillating the clock in the microcomputer.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
に本発明の受信装置は、マイクロコンピュータによりシ
ステム制御される受信装置であって、ラジオ信号等を受
信する受信手段と、一定の周波数の信号を発振する第1
の発振手段と、前記マイクロコンピュータのクロック信
号を発振する第2の発振手段と、前記第2の発振手段の
発振周波数を複数の周波数に切り換える周波数切換手段
と、前記第1の発振手段の発振周波数を基準として前記
周波数切換手段により切り換えられる前記第2の発振手
段の複数の発振周波数をそれぞれ計数する計数手段と、
前記第2の発振手段の複数の発振周波数について前記受
信手段の受信周波数に最も近くなる第n次高調波成分を
それぞれ計算し、前記複数の発振周波数の第n次高調波
成分のうち前記受信周波数との差が最も大きくなる高調
波成分を特定する比較演算手段とを有し、この特定され
た高調波成分に対応する周波数に前記周波数切り換え手
段が前記第2の発振手段の発振周波数を切り換えること
を特徴とする。
In order to solve the above-mentioned problems, a receiving device of the present invention is a receiving device system-controlled by a microcomputer, which is a receiving device for receiving radio signals and the like, and a receiving device of a constant frequency. First to oscillate a signal
Oscillating means, second oscillating means for oscillating the clock signal of the microcomputer, frequency switching means for switching the oscillating frequency of the second oscillating means to a plurality of frequencies, and oscillating frequency of the first oscillating means. Counting means for respectively counting a plurality of oscillation frequencies of the second oscillating means switched by the frequency switching means with reference to
For each of the plurality of oscillation frequencies of the second oscillating means, the nth order harmonic component closest to the receiving frequency of the receiving means is calculated, and the receiving frequency among the nth order harmonic components of the plurality of oscillation frequencies is calculated. Comparing operation means for specifying the harmonic component having the largest difference with the frequency change means for switching the oscillation frequency of the second oscillating means to the frequency corresponding to the specified harmonic component. Is characterized by.

【0008】例えば、周波数切換手段は、第2の発振手
段の発振周波数をf1(Low),f2(Cente
r),f3(High)の3つに切り換える機能を有
し、計数手段は第1の発振手段の発振周波数を基準とし
てこのf1乃至f3の周波数を計数し、比較演算手段が
受信周波数に最も近くなるf1乃至f3の第n次高調波
成分を計算すると共に、この第n次高調波成分f1′,
f2′,f3′のうち受信周波数との差が最も大きくな
る高調波成分を特定し、周波数切換手段がこの高調波成
分に対応するf1乃至f3のいずれかの周波数に前記第
2の発振手段の発振周波数を切り換えることとする。
For example, the frequency switching means sets the oscillation frequencies of the second oscillating means to f1 (Low) and f2 (Center).
r) and f3 (High), the counting means counts the frequencies f1 to f3 with the oscillation frequency of the first oscillation means as a reference, and the comparison operation means is closest to the reception frequency. While calculating the n-th harmonic component of f1 to f3, the n-th harmonic component f1 ′,
Of the f2 'and f3', the harmonic component having the largest difference from the received frequency is identified, and the frequency switching means sets the frequency of any one of f1 to f3 corresponding to this harmonic component to the second oscillating means. The oscillation frequency will be switched.

【0009】更に、受信装置が時計機能を有するもので
ある場合は、この時計機能に基準クロックを出力する発
振手段を、一定の周波数の信号を発振する前記第1の発
振手段と共有する。
Further, when the receiving device has a clock function, the oscillating means for outputting the reference clock to the clock function is shared with the first oscillating means for oscillating a signal of a constant frequency.

【0010】[0010]

【作用】本発明は上記した構成によって、まず第1の発
振手段の発振周波数を基準として、周波数切換手段によ
って切り換えられる第2の発振手段の発振周波数を計数
手段がそれぞれ計数し、かつ計数されたそれぞれの周波
数の高調波成分のうち、受信周波数から最も近い値とな
る第n次高調波成分を特定し、この特定された第n次高
調波成分のうち受信周波数に最も遠い第n次高調波成分
を有する周波数に第2の発振手段の発振周波数を切り換
える。
According to the present invention, the counting means counts and counts the oscillation frequency of the second oscillation means switched by the frequency switching means with reference to the oscillation frequency of the first oscillation means. Of the harmonic components of each frequency, the nth harmonic component having the closest value to the reception frequency is specified, and the nth harmonic component farthest from the reception frequency among the specified nth harmonic components. The oscillation frequency of the second oscillation means is switched to the frequency having the component.

【0011】このような動作によって、マイクロコンピ
ュータにクロック信号を発振する第2の発振手段の発振
周波数を、受信信号を妨害しない周波数に自動的に切り
換えることにより、受信装置の使用者が周波数の切り換
えを行う手間がなく、かつ簡易な構成で高品質な受信を
行うことができる。
By such an operation, the oscillation frequency of the second oscillating means for oscillating the clock signal to the microcomputer is automatically switched to a frequency that does not interfere with the received signal, so that the user of the receiving device can switch the frequency. It is possible to perform high-quality reception with a simple configuration without the trouble of performing.

【0012】特に、第1の発振手段の発振周波数を基準
として第2の発振手段の発振周波数を正確に計数するこ
とにより、第n次高調波が受信信号を妨害しない最適な
周波数に第2の発振手段を切り換えることができる。
In particular, by accurately counting the oscillation frequency of the second oscillating means with reference to the oscillation frequency of the first oscillating means, the second frequency is set to the optimum frequency at which the nth harmonic does not interfere with the received signal. The oscillation means can be switched.

【0013】また、周波数切換手段が第2の発振手段の
発振周波数をf1(Low),f2(Center),
f3(High)の3つに切り換えるものである場合
は、計数手段が第1の発振手段の発振周波数を基準とし
てこのf1乃至f3の周波数を計数し、比較演算手段が
受信周波数に最も近くなるf1乃至f3の第n次高調波
成分を計算すると共に、この第n次高調波成分f1′,
f2′,f3′のうち受信周波数との差が最も大きくな
る高調波成分を特定し、周波数切換手段がこの高調波成
分に対応するf1乃至f3のいずれかの周波数に前記第
2の発振手段の発振周波数を切り換えることにより、3
つの周波数のうち受信妨害のない最適な周波数に第2の
発振手段を切り換え、受信妨害なくマイクロコンピュー
タにクロック信号を発振することができる。
The frequency switching means sets the oscillation frequencies of the second oscillation means to f1 (Low), f2 (Center),
In the case of switching to three of f3 (High), the counting means counts the frequencies f1 to f3 with the oscillation frequency of the first oscillating means as a reference, and the comparison operation means is closest to the reception frequency f1. Through f3, the nth harmonic component f1 ′,
Of the f2 'and f3', the harmonic component having the largest difference from the received frequency is identified, and the frequency switching means sets the frequency of any one of f1 to f3 corresponding to this harmonic component to the second oscillating means. By switching the oscillation frequency, 3
It is possible to switch the second oscillating means to an optimum frequency of the two frequencies that does not cause reception interference and oscillate the clock signal to the microcomputer without reception interference.

【0014】更に、受信装置が時計機能を備えるもので
ある場合は、この時計機能に基準クロックを出力する発
振手段と、一定の周波数の信号を発振する前記第1の発
振手段とを共有することにより、受信装置の部品点数や
製造コストを増加させず、受信妨害のない高品質な受信
が可能となる。
Further, when the receiving device has a clock function, the oscillating means for outputting a reference clock to the clock function and the first oscillating means for oscillating a signal of a constant frequency should be shared. As a result, it is possible to perform high-quality reception without reception interference without increasing the number of parts of the receiving device or the manufacturing cost.

【0015】[0015]

【実施例】以下、本発明の実施例の受信装置について、
図面を参照しながら説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Below, the receiver of the embodiment of the present invention will be explained.
This will be described with reference to the drawings.

【0016】第1図は第1の実施例における受信装置の
構成を示すブロック図である。第1図に於て、1は時計
用などの高精度の発振をする水晶発振子を用いた第1の
発振手段、2はシステムを制御するための第2の発振手
段、3は第2の発振手段の発振周波数を第1の発振手段
の出力を用いて計数するための計数手段、4は計数手段
3の出力に基づき第2の発振手段2の発振周波数と受信
手段の受信周波数を比較して、第2の発振手段2の発振
周波数について受信周波数に最も近くなる第n次高調波
成分を計算する比較演算手段、5は第2の発振手段の発
振周波数を切り換えるための発振周波数切換手段、6は
受信手段、7は磁気テープ記録再生手段、8は前記6〜
7の各手段の出力信号を選択し増幅する信号選択増幅
部、9は信号選択増幅部8の信号出力を拡声するスピー
カ、10は前記複数個の機能手段及び前記発振周波数切
換手段及び前記比較演算手段及び前記表示手段を相互に
制御するための制御手段、11は前記6〜7の複数個の
機能を表示するための表示手段、12は操作部であり、
前記6〜7の各手段を選択するためのSW等から構成さ
れている。
FIG. 1 is a block diagram showing the configuration of the receiving apparatus according to the first embodiment. In FIG. 1, reference numeral 1 is a first oscillating means using a crystal oscillator that oscillates with high precision for a watch or the like, 2 is a second oscillating means for controlling a system, and 3 is a second oscillating means. The counting means 4 for counting the oscillation frequency of the oscillation means using the output of the first oscillation means 4 compares the oscillation frequency of the second oscillation means 2 with the reception frequency of the reception means based on the output of the counting means 3. Then, the comparison calculation means 5 for calculating the nth harmonic component which is the closest to the reception frequency with respect to the oscillation frequency of the second oscillation means 2 is an oscillation frequency switching means for switching the oscillation frequency of the second oscillation means, 6 is a receiving means, 7 is a magnetic tape recording / reproducing means, and 8 is the above 6-
7. A signal selection / amplification unit for selecting and amplifying the output signal of each unit, 9 a speaker for amplifying the signal output of the signal selection / amplification unit 8, 10 a plurality of the functional units, the oscillation frequency switching unit, and the comparison calculation. Means for mutually controlling the display means and the display means, 11 is a display means for displaying the plurality of functions 6 to 7, and 12 is an operation unit,
It is composed of SW and the like for selecting each of the means 6 to 7.

【0017】第2図は、受信手段6の内部詳細ブロック
図で、6aはアンテナ、6bはPLL周波数制御部、6
cはフロントエンド回路部、6dはIF検波回路部で、
6eにはPLL制御データが入力され、6fからは検波
された低周波信号が出力される。
FIG. 2 is a detailed block diagram of the inside of the receiving means 6, in which 6a is an antenna, 6b is a PLL frequency controller, and 6 is a PLL frequency controller.
c is a front end circuit section, 6d is an IF detection circuit section,
PLL control data is input to 6e, and the detected low frequency signal is output from 6f.

【0018】図3は、第2の発振手段2のクロック発振
回路と、発振周波数切換手段5の内部詳細回路図で、I
C1は発振用インバータ回路、IC2,IC3は切換え
用インバータ回路、CR1はセラミック発振子、C1,
C2,C3,C4、はコンデンサで、5a,5bから発
振周波数切換信号が入力される。
FIG. 3 is an internal detailed circuit diagram of the clock oscillation circuit of the second oscillation means 2 and the oscillation frequency switching means 5, and I
C1 is an inverter circuit for oscillation, IC2, IC3 are inverter circuits for switching, CR1 is a ceramic oscillator, C1,
C2, C3 and C4 are capacitors, and the oscillation frequency switching signals are input from 5a and 5b.

【0019】すなわち、5a,5bよりそれぞれHih
g,Lowの信号を入力することにより、第2の発振手
段の発振周波数(クロック発振周波数)はf1(5a・
HIGH,5b・HIGH)、f2(5a・HIGH,
5b・LOW)、f3(5a・LOW,5b・LOW)
に切り換えられる。
That is, from 5a and 5b, respectively, Hih
By inputting signals of g and Low, the oscillation frequency (clock oscillation frequency) of the second oscillation means is f1 (5a.
HIGH, 5b ・ HIGH), f2 (5a ・ HIGH,
5b ・ LOW), f3 (5a ・ LOW, 5b ・ LOW)
Is switched to.

【0020】発振周波数切り換え手段は第2の発振手段
の発振周波数を、マイクロコンピュータの駆動に影響を
与えない範囲で微小間隔で複数に切り換えるものであれ
ばよいが、図3に示すように、C1,C2,C3によっ
て決定されるf1(Low),f2(Center),
f3(High)の3つに第2の発振手段の周波数を切
り換えることにより、最適な周波数を選択できる。
The oscillating frequency switching means may switch the oscillating frequency of the second oscillating means to a plurality of frequencies at minute intervals within a range that does not affect the driving of the microcomputer. As shown in FIG. , C2, C3, f1 (Low), f2 (Center),
The optimum frequency can be selected by switching the frequency of the second oscillating means to three of f3 (High).

【0021】図4は、本発明の受信装置の、第1の発振
手段1、第2の発振手段2、計数手段3、比較演算手段
4、制御手段10の機能をマイクロコンピュータ13で
構成した場合のマイクロコンピュータの処理動作の要部
を示すフローチャートであり、これらに基づいて、本発
明の動作を説明する。
FIG. 4 shows a case where the functions of the first oscillating means 1, the second oscillating means 2, the counting means 3, the comparing and calculating means 4 and the control means 10 of the receiving apparatus of the present invention are constituted by the microcomputer 13. 3 is a flowchart showing a main part of the processing operation of the microcomputer of FIG. 3, and the operation of the present invention will be described based on these.

【0022】まず、装置の電源は投入されており、マイ
クロコンピュータ内部にある記憶装置等も初期化されて
いるものとする。
First, it is assumed that the power supply of the device is turned on and the storage device and the like inside the microcomputer are initialized.

【0023】21と29は結合子であり、メインプログ
ラムの中に組み込まれているものとする。また、5aの
信号はHIGHでクロック発振の周波数はセラミック発
振子CRIとコンデンサC1,C2,C3で決定されて
いる。
21 and 29 are connectors, which are incorporated in the main program. The signal 5a is HIGH, and the frequency of clock oscillation is determined by the ceramic oscillator CRI and the capacitors C1, C2 and C3.

【0024】まず、ステップ22ではPLL周波数制御
部6bにPLL制御データを送り、受信手段6が動作状
態になるようにする。ステップ23では受信周波数Fを
表示手段12に表示する。
First, in step 22, the PLL control data is sent to the PLL frequency control section 6b so that the receiving means 6 is in the operating state. In step 23, the reception frequency F is displayed on the display means 12.

【0025】ステップ24では第2の発振手段の発振周
波数(クロック発振周波数)f1(Low),f2(C
enter),f3(High)を一定の周波数で発振
する第1の発振手段1の高精度な発振(例えば水晶発
振)を基本に、マイコン13のカウンターを用いて計数
する。
In step 24, the oscillation frequency (clock oscillation frequency) f1 (Low), f2 (C) of the second oscillation means.
center), f3 (High) is oscillated at a constant frequency, and counting is performed using a counter of the microcomputer 13 based on high-precision oscillation (for example, crystal oscillation) of the first oscillating means 1.

【0026】まず、第2の発振手段の発振周波数をf1
に切り換えるためにマイコン13の制御手段より発振周
波数切り換え手段(第3図)の5aにHIGH、5bに
HIGHの信号が送られる。
First, the oscillation frequency of the second oscillation means is set to f1.
In order to switch to, the control means of the microcomputer 13 sends a HIGH signal to 5a and a HIGH signal to 5b of the oscillation frequency switching means (FIG. 3).

【0027】この時の第2の発振手段の発振周波数f1
を第1の発振手段の発振周波数を基本に、マイコン13
のカウンターで1秒間程度カウントする。
Oscillation frequency f1 of the second oscillating means at this time
Based on the oscillation frequency of the first oscillation means, the microcomputer 13
Count for about 1 second at the counter.

【0028】同時に第2の発振手段2の発振周波数f2
もカウントする。このときのクロックの数で第2の発振
手段の発振周波数を計数することができる。
At the same time, the oscillation frequency f2 of the second oscillation means 2
Also counts. The oscillation frequency of the second oscillating means can be counted by the number of clocks at this time.

【0029】次に、f2(5a・HIGH,5b・LO
W)、f3(5a・LOW,5b・LOW)を第1の発
振手段1の高精度な発振を用いて同様に計数する。
Next, f2 (5a.HIGH, 5b.LO
W) and f3 (5a.LOW, 5b.LOW) are similarly counted using the highly accurate oscillation of the first oscillating means 1.

【0030】ステップ25では現在受信している受信周
波数Fのデータを入力する。ここで受信手段が80.2
MHzを受信していると仮定し、マイクロコンピュータ
を駆動する第2の発振手段での発振周波数f2(Cen
ter)を4MHzとしてf1,f2,f3はそれぞれ
0.5%変化するものとする。
In step 25, the data of the reception frequency F currently received is input. Here, the receiving means is 80.2
Assuming that MHz is being received, the oscillation frequency f2 (Cen
ter) is set to 4 MHz, and f1, f2, and f3 are each changed by 0.5%.

【0031】次に、ステップ26では受信周波数F(8
0.2MHz)に最も近くなる第2の発振手段の発振周
波数f1乃至f3の高調波成分f1′,f2′,f3′
をマイコン13が計数する。
Next, at step 26, the reception frequency F (8
Harmonic components f1 ', f2', f3 'of the oscillating frequencies f1 to f3 of the second oscillating means closest to 0.2 MHz).
Is counted by the microcomputer 13.

【0032】ここではf1乃至f3の第20次の高調波
成分が受信周波数F(80.2MHz)に最も近く、f
1′(79.6MHz),f2′(80.0MHz),
f3′(80.4MHz)と仮定する。
Here, the twentieth harmonic component of f1 to f3 is closest to the reception frequency F (80.2 MHz), and f
1 '(79.6 MHz), f2' (80.0 MHz),
Assume f3 '(80.4 MHz).

【0033】ステップ27では受信周波数Fと、第2の
発振手段2の発振周波f1乃至f3の第20次高調波成
分との差が最も大きくなるように、発振周波数切換手段
に信号を送る。
In step 27, a signal is sent to the oscillation frequency switching means so that the difference between the reception frequency F and the twentieth harmonic component of the oscillation frequencies f1 to f3 of the second oscillation means 2 becomes maximum.

【0034】ここではf1の第20次高調波成分(7
9.6MHz)と受信周波数F(80.2MHz)との
差が最も大きいため、第2の発振手段にf1を発振させ
る5a・HIGH,5b・HIGHの信号が発振周波数
切換手段に送られる。
Here, the 20th harmonic component of f1 (7
Since the difference between 9.6 MHz) and the reception frequency F (80.2 MHz) is the largest, the signals 5a.HIGH and 5b.HIGH that cause the second oscillating means to oscillate f1 are sent to the oscillating frequency switching means.

【0035】以上のように本発明の実施例によれば、マ
イクロコンピュータにクロック信号を発振する第2の発
振手段の発振周波数を、受信信号を妨害しない周波数に
自動的に切り換えることにより、受信装置の使用者が周
波数の切り換えを行う手間がなく、かつ簡易な構成で高
品質な受信を行うことができる。
As described above, according to the embodiment of the present invention, by automatically switching the oscillating frequency of the second oscillating means for oscillating the clock signal to the microcomputer to a frequency that does not interfere with the received signal, the receiving device It is not necessary for the user to switch the frequency, and high-quality reception can be performed with a simple configuration.

【0036】特に、第1の発振手段の発振周波数を基準
として第2の発振手段の発振周波数を正確に計数するこ
とにより、第n次高調波が受信信号を妨害しない最適な
周波数に第2の発振手段を切り換えることができる。
In particular, by accurately counting the oscillation frequency of the second oscillating means with reference to the oscillation frequency of the first oscillating means, the second frequency is set to the optimum frequency at which the nth harmonic does not interfere with the received signal. The oscillation means can be switched.

【0037】更に、受信装置がタイマー機能を備えるも
のである場合は、このタイマー機能に基準クロックを出
力する発振手段と、一定の周波数の信号を発振する前記
第1の発振手段とを共有することにより、受信装置の部
品点数や製造コストを増加させず、受信妨害のない高品
質な受信が可能となる。
Further, when the receiving device has a timer function, the oscillating means for outputting a reference clock to the timer function and the first oscillating means for oscillating a signal of a constant frequency should be shared. As a result, it is possible to perform high-quality reception without reception interference without increasing the number of parts of the receiving device or the manufacturing cost.

【0038】[0038]

【発明の効果】以上のように本発明によれば、受信周波
数に応じてマイクロコンピュータにクロック信号を発振
する第2の発振手段の発振周波数を最適な周波数に正確
に切り換えることができるため、使用者がクロック周波
数を変化させるためのスイッチを設けることなく、簡易
な構成できわめて高品質な受信を行う受信装置の実現が
可能となる。
As described above, according to the present invention, the oscillating frequency of the second oscillating means for oscillating the clock signal to the microcomputer can be accurately switched to the optimum frequency in accordance with the receiving frequency. It becomes possible to realize a receiving device that performs extremely high quality reception with a simple configuration without a person having to provide a switch for changing the clock frequency.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例の構成を示すブロック図FIG. 1 is a block diagram showing a configuration of a first embodiment of the present invention.

【図2】同実施例における受信手段の内部詳細ブロック
FIG. 2 is an internal detailed block diagram of a receiving means in the embodiment.

【図3】同実施例における第2の発振手段のクロック発
振回路及び発振周波数切換手段5の内部詳細回路図
FIG. 3 is an internal detailed circuit diagram of a clock oscillation circuit and oscillation frequency switching means 5 of a second oscillation means in the embodiment.

【図4】本発明の実施例の動作を説明するためのマイク
ロコンピュータ13の処理動作を示すフローチャート
FIG. 4 is a flowchart showing the processing operation of the microcomputer 13 for explaining the operation of the embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 第1の発振手段 2 第2の発振手段 3 計数手段 4 比較演算手段 5 発振周波数切換手段 6 受信手段 6a アンテナ 6b PLL周波数制御部 6c フロントエンド回路部 6d IF検波回路部 7 磁気テープ記録再生手段 8 信号選択増幅部 9 スピーカ 10 制御手段 11 表示手段 12 操作部 13 マイクロコンピュータ IC1,IC2,IC3 インバータ回路 CR1 セラミック発振子 C1,C2,C3,C4 コンデンサ DESCRIPTION OF SYMBOLS 1 1st oscillation means 2 2nd oscillation means 3 Counting means 4 Comparison calculation means 5 Oscillation frequency switching means 6 Receiving means 6a Antenna 6b PLL frequency control section 6c Front end circuit section 6d IF detection circuit section 7 Magnetic tape recording / reproducing means 8 signal selection amplification section 9 speaker 10 control means 11 display means 12 operation section 13 microcomputer IC1, IC2, IC3 inverter circuit CR1 ceramic oscillator C1, C2, C3, C4 capacitor

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 マイクロコンピュータによりシステム制
御される受信装置において、受信手段と、一定の周波数
の信号を発振する第1の発振手段と、前記マイクロコン
ピュータのクロック信号を発振する第2の発振手段と、
前記第2の発振手段の発振周波数を複数の周波数に切り
換える周波数切換手段と、前記第1の発振手段の発振周
波数を基準として前記周波数切換手段により切り換えら
れる前記第2の発振手段の複数の発振周波数をそれぞれ
計数する計数手段と、前記第2の発振手段の複数の発振
周波数について前記受信手段の受信周波数に最も近くな
る第n次高調波成分をそれぞれ計算し、前記複数の発振
周波数の第n次高調波成分のうち前記受信周波数との差
が最も大きくなる高調波成分を特定する比較演算手段と
を有し、この特定された高調波成分に対応する周波数に
前記周波数切換手段が前記第2の発振手段の発振周波数
を切り換えることを特徴とした受信装置。
1. A receiving device system-controlled by a microcomputer, comprising: receiving means, first oscillating means for oscillating a signal of a constant frequency, and second oscillating means for oscillating a clock signal of the microcomputer. ,
Frequency switching means for switching the oscillation frequency of the second oscillation means to a plurality of frequencies, and a plurality of oscillation frequencies of the second oscillation means that are switched by the frequency switching means on the basis of the oscillation frequency of the first oscillation means. And n-th harmonic component that is closest to the reception frequency of the receiving means for the plurality of oscillation frequencies of the second oscillating means, and calculates the n-th order of the plurality of oscillation frequencies. Comparing and calculating means for specifying a harmonic component having the largest difference from the received frequency among the harmonic components, and the frequency switching means sets the frequency switching means to the frequency corresponding to the specified harmonic component. A receiving device characterized by switching the oscillation frequency of an oscillation means.
【請求項2】 前記周波数切換手段は、第2の発振手段
の発振周波数をf1(Low),f2(Cente
r),f3(High)の3つに切り換える機能を有
し、前記計数手段は前記第1の発振手段の発振周波数を
基準として前記f1乃至f3の周波数を計数し、前記比
較演算手段が前記受信周波数に最も近くなる前記f1乃
至f3の第n次高調波成分を計算すると共に、この第n
次高調波成分f1′,f2′,f3′のうち前記受信周
波数との差が最も大きくなる高調波成分を特定し、前記
周波数切換手段がこの高調波成分に対応するf1乃至f
3のいずれかの周波数に前記第2の発振手段の発振周波
数を切り換えることを特徴とする請求項1記載の受信装
置。
2. The frequency switching means sets the oscillation frequencies of the second oscillation means to f1 (Low) and f2 (Center).
r) and f3 (High), the counting means counts the frequencies f1 to f3 with the oscillation frequency of the first oscillation means as a reference, and the comparison calculation means receives the received signals. The nth harmonic component of f1 to f3 that is closest to the frequency is calculated, and
Among the next harmonic components f1 ', f2', f3 ', the harmonic component having the largest difference from the received frequency is specified, and the frequency switching means corresponds to these harmonic components f1 to f.
3. The receiving apparatus according to claim 1, wherein the oscillation frequency of the second oscillating means is switched to any one of the frequencies of 3.
【請求項3】 受信装置が時計機能を有し、この時計機
能に基準クロックを出力する発振手段と、一定の周波数
の信号を発振する前記第1の発振手段とを共有したこと
を特徴とする請求項1又は2記載の受信装置。
3. The receiving device has a clock function, and an oscillating means for outputting a reference clock to the clock function and the first oscillating means for oscillating a signal of a constant frequency are shared. The receiving device according to claim 1 or 2.
JP24768194A 1994-10-13 1994-10-13 Receiver Pending JPH08111649A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24768194A JPH08111649A (en) 1994-10-13 1994-10-13 Receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24768194A JPH08111649A (en) 1994-10-13 1994-10-13 Receiver

Publications (1)

Publication Number Publication Date
JPH08111649A true JPH08111649A (en) 1996-04-30

Family

ID=17167073

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24768194A Pending JPH08111649A (en) 1994-10-13 1994-10-13 Receiver

Country Status (1)

Country Link
JP (1) JPH08111649A (en)

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