JP2006295483A - Receiving device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain exact tracking between frequencies of frequency-converting local oscillation signals by making a tuning circuit exactly synchronized with signals to be received even in transition. <P>SOLUTION: The receiving device is equipped with a second oscillator 12 which oscillates at a receiving signal frequency, a switching means 2 which inputs receiving signals or the oscillation signals outputted from the second oscillator 12 to a tuning circuit 4, an up/down counter 8, a detection means 26 which detects the signals outputted from the tuning circuit 4, and a controller 9 which detects the peak value of the output of the detection means 26. The second oscillator 12 is operated until the controller 9 detects the peak value, the oscillation signals of the second oscillator 12 are inputted into the tuning circuit 4, counting signals are fed to the up/down counter 8, the second oscillator 12 is stopped from operating after the peak value is detected, receiving signals are inputted into the tuning circuit 4, and the counting signals are stopped from being supplied. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a superheterodyne receiver such as a television tuner.

  The main part of a superheterodyne receiver is shown in FIG. An RF varicap D1 is connected in series to the primary side of the RF coil L1 of the reception tuning circuit 30. Further, a bypass capacitor C5 is connected to the RF varicap D1, and a voltage application resistor R4 is further connected between the adder circuit 38 and the RF varicap D1. A padding capacitor C2 is connected in parallel to the primary side of the OSC coil L2 of the oscillation tuning circuit 32A of the local oscillation circuit 32. Further, a bypass capacitor C3 is connected to the OSC varicap D2, and a voltage application resistor R5 is connected to the PLL circuit 14.

  The secondary side of the RF coil L1 of the reception tuning circuit 30 is connected to the high frequency amplifier circuit 16, and the secondary side of the OSC coil L2 of the oscillation tuning circuit 32A is connected to the OSC coil 32B. The output side of the OSC 32B is connected to the PLL circuit 14 and the mixer circuit 18, respectively. The output side of the intermediate frequency amplifier circuit 20 is connected to the detection circuit 22 and the carrier level detection circuit 34. The output side of the carrier level detection circuit 34 is connected to the A / D conversion input side of the microcomputer 36. ing.

  The pulse train output side of the microcomputer 36 is connected to resistors R6 and R7 via a capacitor C6. The resistor R6 is connected to the collector side of the NPN transistor Q1 and the anode side of the diode D3, and the resistor R7 is connected to the collector side of the NPN transistor Q2 and the cathode side of the diode D4. . The bases of the transistors Q1 and Q2 are both connected to the control output side of the macro computer 36, and their emitters are both grounded.

  Furthermore, the cathode side of the diode D3 is grounded via the capacitor C7 on the one hand, and is connected to one input side of the adder circuit 38 via the resistor r8 on the other hand. On the other hand, the anode side of the diode D4 is grounded via the capacitor C8, and on the other hand, it is similarly connected to one input side of the adder circuit 38 via the resistor R9. The other input side of the adder circuit 38 is connected to the tuning voltage output side of the PLL circuit 14 described above.

  In the above configuration, the level of the reception signal that has been subjected to the reception tuning circuit is detected, and the capacity in the reception tuning circuit is controlled by the microcomputer so that the level becomes maximum (for example, see Patent Document 1). .)

Japanese Patent Laid-Open No. 06-021767 (FIG. 1)

  When the above-described receiving apparatus is used for in-vehicle use, the level of the received signal constantly changes depending on the position and direction of the vehicle, so that the exact capacitance value required by the reception tuning circuit cannot be obtained. There is.

  It is an object of the present invention to obtain an accurate tracking characteristic with respect to the frequency of a local oscillation signal for frequency conversion by accurately tuning a tuning circuit to a signal to be received even during movement.

  According to a first aspect of the present invention, there is provided a tuning circuit including an inductance element, a plurality of capacitive elements, and a switch element that connects each capacitive element to the inductance element in parallel, a mixer that converts the frequency of the received signal, A first oscillator that supplies a local oscillation signal to the mixer, a second oscillator that oscillates at the frequency of the received signal, and a switch that inputs the received signal or the oscillation signal of the second oscillator to the tuning circuit Means, an up / down counter for controlling on / off of each switch element by a plurality of bits of output data, a carrier detection circuit for detecting a signal output from the tuning circuit, and an operating state of the second oscillator And a controller for controlling the switching of the switching means and detecting a peak value of the detection output output from the carrier detection circuit. The controller operates the second oscillator at the start of a reception operation and inputs the oscillation signal to the tuning circuit, and supplies a count signal to the up / down counter, and after detecting the peak value, The operation of the second oscillator was stopped, and the received signal was input to the tuning circuit to stop the supply of the count signal.

Further, the second solution means that the number of the capacitive elements is N and the capacitance values of the capacitive elements are different from each other, and the capacitance values of the Nth capacitive elements other than the capacitive element having the smallest capacitance value. Was 2 ^N times the minimum capacitance value.

  In the third solution, the controller outputs an up-count signal for counting up the up / down counter or a down-count signal for counting down.

  According to a fourth solution, the tuning circuit is configured by a double tuning circuit, and the primary side tuning circuit and the secondary side tuning circuit are provided with the inductance element, the capacitive element, and the switch element, respectively, and have the same capacitance value. Both the switch element of the primary side tuning circuit and the switch element of the secondary side tuning circuit connected to the capacitive element having the capacitance element are turned on or off.

  According to the first solving means, the second oscillator that oscillates at the frequency of the reception signal, the switching means that inputs the reception signal or the oscillation signal of the second oscillator to the tuning circuit, and each of the output data of a plurality of bits. An up / down counter for controlling on / off of the switch element, a carrier detection circuit for detecting a signal output from the tuning circuit, a switching state of the operating state of the second oscillator and switching means, and a carrier detection circuit And a controller for detecting the peak value of the detection output outputted from the controller, the controller operates the second oscillator at the start of the receiving operation and inputs the oscillation signal to the tuning circuit, and count signal to the up / down counter After the peak value is detected, the operation of the second oscillator is stopped, the received signal is input to the tuning circuit, and the count signal is output. Since was stopped, the level of the oscillation signal so is always constant without changing even during movement of the vehicle, it is possible to correct the peak value to match the received signal the tuning frequency can be detected. And accurate tracking between the local oscillation frequency and the tuning frequency is obtained.

Further, according to the second solving means, the number of capacitive elements is N, and the capacitance values of the capacitive elements are made different from each other, so that the capacitance values of the Nth capacitive elements other than the capacitive element having the smallest capacitance value. Since ^2N times the minimum capacitance value, the tuning frequency can be changed using the minimum capacitance value as a step at the stage where the tuning frequency matches the reception frequency.

Further, according to the third solution, since the controller outputs an up-count signal for counting up or a down-count signal for counting down, the controller detects a peak value of the detection output. Detection becomes easier and the detection speed can be increased.

  Further, according to the fourth solution, the tuning circuit is constituted by a double tuning circuit, and an inductance element, a capacitive element, and a switching element are provided in the primary side tuning circuit and the secondary side tuning circuit, respectively, and capacitors having the same capacitance value are provided. Since both the switching element of the primary side tuning circuit connected to the element and the switching element of the secondary side tuning circuit are turned on or off, the tuning frequency of the primary side tuning circuit and the secondary side tuning circuit is simultaneously set to the reception frequency. Can be matched.

  FIG. 1 shows the configuration of the receiving apparatus of the present invention. A high frequency amplifier 3 is connected to the antenna 1 via a switching means 2 and a tuning circuit 4 connected to the output side of the high frequency amplifier 3 is provided. The tuning circuit 4 is composed of a double tuning circuit having a primary side tuning circuit 5 and a secondary side tuning circuit 6. The primary side tuning circuit 5 is connected in series to the inductance element 5a, a plurality of capacitance elements 5b (5b1, 5b2, 5b3, 5b4,...), And these capacitance elements 5b, and each capacitance element 5b is parallel to the inductance element 5a. And a plurality of switch elements 5c (5c1, 5c2, 5c3, 5c4,...) Connected to. Each switch element 5c is configured by a three-terminal switch element such as an FET (field effect transistor).

  One end of the inductance element 5a is connected to the output end of the high-frequency amplifier 3, and the other end is grounded. One end of each capacitive element 5b is connected to one end of the inductance element 5a, and each other end thereof is grounded via each switch element 5c. That is, as shown, the other end of each capacitive element 5b is connected to the current inflow end (drain) of the switch element 5c, and the current outflow end (source) is grounded.

  The secondary side tuning circuit 6 is connected in series to the inductance element 6a, a plurality of capacitance elements 6b (6b1, 6b2, 6b3, 6b4,...), And these capacitance elements 6b, and each capacitance element 6b is connected to the inductance element 6a. A plurality of switch elements 6c (6c1, 6c2, 6c3, 6c4,...) Connected in parallel are included. Each switch element 6c is also configured by a three-terminal switch element such as an FET (field effect transistor). One end of the inductance element 6a is connected to the input end of the mixer 7 for frequency conversion, and the other end is grounded. One end of each capacitive element 6b is connected to one end of the inductance element 6a, and each other end thereof is grounded via each switch element 6c. That is, as illustrated, the other end of each capacitive element 6b is connected to the current inflow end (drain) of the switch element 6c, and the current outflow end (source) is grounded.

Here, one of the capacitive elements 5b of the primary side tuning circuit 5 and one of the capacitive elements 6b of the secondary side tuning circuit 6 have the same capacitance value, but the smallest capacitance value among the capacitive elements 5b and 6b. The capacitance value of other capacitive elements is different from the capacitive element having (C) in a ^2N relationship. N is a positive integer. That is, the capacitive element 5b1 and the capacitive element 6b1 have the same capacitance value (C), the capacitive element 5b2 and the capacitive element 6b2 have the same capacitance value (2 × C), and the capacitive element 5b3 and the capacitive element 6b3 Capacitance element 5b3 and capacitance element 6b3 have the same capacitance value (8 × c). The same applies hereinafter.

  The control terminals (gates) are connected to each other so that the switch elements 5c and 6c connected to the capacitive elements 5b and 6b having the same capacitance value can be turned on or off. That is, the control end of the switch element 5c1 and the control end of the switch element 6c1 are connected to each other, the control end of the switch element 5c2 and the control end of the switch element 6c2 are connected to each other, and the control end of the switch element 5c3 and the switch The control end of the element 6c3 is connected to each other, and the control end of the switch element 5c4 and the control end of the switch element 6c4 are connected to each other. The same applies hereinafter.

  The switch elements 5c and 6c are controlled by the up / down counter 8. The up / down counter 8 performs a counting operation by an up count signal (Up) or a down count signal (Down) given from the controller 9, and the switch elements 5c and 6c are switched on or off by the output. The up / down counter 8 has the same number (number of bits) of output terminals 8a to 8d as the number of switch elements 5c and 6c. The control terminals of the switch elements 5c1 and 6c1 are connected to the output terminal 8a. Are connected to the control terminals of the switch elements 5c2 and 6c2, the output terminal 8c is connected to the control terminals of the switch elements 5c3 and 6c3, and the output terminal 8d is connected to the control terminals of the switch elements 5c4 and 6c4.

  The mixer 7 is supplied with a local oscillation signal corresponding to the frequency of the signal to be received from the first oscillator 10. The first oscillator 8 is controlled by the first PLL circuit 11. In addition, a second oscillator 12 is provided separately from the first oscillator 10, and the second oscillator 12 is controlled by the second PLL circuit 13 so as to oscillate at the same frequency as the signal to be received. The oscillation signal of the second oscillator is input to the high frequency amplifier 2 via the switching means 2. The switching operation of the switching means 2 and the operation of the second oscillator 12 are controlled by the controller 9. Further, channel selection data is given from the controller 9 to the first PLL circuit 11 and the second PLL circuit 13.

  The intermediate frequency signal output from the mixer 7 is supplied to a demodulator (not shown) at the subsequent stage via the band pass filter 25. The intermediate frequency signal output from the bandpass filter 25 is detected by the carrier detection circuit 26, and the detection output is input to the controller 9.

  Here, the configuration of the switching means 2 will be described with reference to FIG. The switching means 2 includes first to fourth switch elements 2a to 2d, and a first input terminal In1 connected to the antenna 1 and a first output terminal Out connected to the high frequency amplifier 3 are connected to the first switch terminal 2a to 2d. Switch element 2a is inserted. A second switch element 2b is interposed between the first input terminal In1 and the ground. A third switch element 2c is interposed between the second input terminal In2 connected to the second oscillator 12 and the output terminal Out, and between the second input terminal In2 and the ground. A fourth switch element 2d is inserted.

  The first to fourth switch elements 2a to 2d are composed of, for example, FETs, and the source of the first switch element 2a and the drain of the second switch element 2b are connected to the first input terminal In1, The drain of the switch element 2a is connected to the output terminal Out, and the source of the second switch element 2b is grounded. The source of the third switch element 2c and the drain of the fourth switch element 2d are connected to the second input terminal In2, the drain of the third switch element 2c is connected to the output terminal Out, The source of the switch element 2d is grounded. The gates of the first and fourth switch elements 2a and 2d are connected to the first control terminal c1, and the gates of the second and third switch elements 2b and 2c are connected to the second control terminal c2. .

  Returning to FIG. 1 again, the operation of the receiving apparatus of the present invention will be described. When a channel selection operation is performed by a channel selection operation unit (not shown), the controller 9 first switches the second oscillator 12 to the operating state, and at the same time the low switching voltage and the first voltage are applied to the first control terminal c1 of the switching means 2. 2 outputs the high switching voltage of the control terminal c2, and simultaneously supplies the first PLL circuit 11 and the second PLL circuit 13 with the channel selection data of the signals to be received (which are different from each other). . Then, in the switching means 2, the first and fourth switch elements 2a and 2d are turned off, and the second and third switch elements 2b and 2c are turned on. The first oscillator 10 oscillates at a frequency corresponding to the frequency of the signal to be received (for example, higher than the reception frequency by an intermediate frequency), and the second oscillator 12 oscillates at the same frequency as the reception frequency.

  The oscillation signal of the second oscillator 12 is input to the switching means 2 and input to the tuning circuit 4 via the high frequency amplifier 3. Since the first switch element 2a is off and the second switch element 2b is on, the oscillation signal does not leak to the antenna 1 side. At this time, the tuning circuit 4 is not necessarily tuned to the frequency of the oscillation signal, but the intermediate frequency signal converted by the mixer 7 is detected by the carrier detection circuit 26, and the detection output is input to the controller 9. The controller 9 is configured to detect the peak value of the detection output, but outputs an up-count signal or a down-count signal in synchronization with the up / down counter 8 until the peak value is detected. .

  The output data of the up / down counter 8 changes according to the count signal, and the switch elements 5c and 6c are turned on or off according to the data, and the capacitive elements 5b and 6b connected to the turned on switch elements are respectively inductance elements 5a. 6a are connected in parallel. The minimum change value of the capacitance value is C. As a result, the tuning frequency of the tuning circuit 4 changes, and when the tuning frequency matches the oscillation signal frequency in the course of the change, the level of the oscillation signal output from the tuning circuit 4 becomes maximum, and therefore the controller 9 detects the peak value. To do. At this time, by outputting an up-count signal for counting up or a down-count signal for counting down to the up / down counter, the peak value can be easily detected and the detection speed can be increased.

When the controller 9 detects the peak value of the oscillation signal, the controller 9 stops the output of the up-count signal and the down-count signal and the oscillation operation of the second oscillator 12, and further, the controller 9 is switched to the first control terminal C1 of the switching means 2. And a low switching voltage is output to the second control terminal C2. Then, since the up / down counter 8 holds the output data, the capacitive elements 5b and 6b corresponding to the switch elements 5c and 6c which are turned on at that time are connected in parallel to the inductance elements 5a and 6a, respectively, and the tuning frequency is increased. The state matches the oscillation signal frequency. Note that the number of capacitive elements increases as the minimum capacitance value (C) in the capacitive elements 5b and 6b decreases, but the tuning frequency can be finely adjusted. Further, by setting the minimum capacitance value to (C) and the other capacitance value to 2 ^N , the tuning frequency can be changed using the minimum capacitance value (C) as a step.

  In the switching means 2, the first switch element 2a and the fourth switch element 2d are turned on, and the second switch element 2b and the third switch element 2c are turned off. The signal is output to the output terminal Out without leaking to the second input terminal In2, and the received signal is input to the tuning circuit via the high-frequency amplifier 3 to enable normal reception. When changing the frequency of the signal to be received, the same operation is repeated again.

  As described above, when the second oscillator 12 is provided and the tuning frequency of the tuning circuit 4 is adjusted and set using the oscillation signal, the signal level is always constant without changing even while the vehicle is moving. Therefore, the peak value can be detected and the tuning frequency can be matched with the received signal. And accurate tracking between the local oscillation frequency and the tuning frequency is obtained.

  In the above description, the tuning circuit 4 has been described as a double-tuned circuit, but it is needless to say that it can be configured as a single-tuned circuit. The switch elements 2a, 2b, 2c, and 2d in the switching unit 2 and the switch elements 5c and 6c in the tuning circuit 4 can be configured not only by FETs but also by bipolar transistors.

  FIG. 3 shows a circuit diagram of a signal system when the receiving apparatus of the present invention is applied to a television tuner for mounting on a portable device (such as a mobile phone). In FIG. 3, the antenna 41 receives a television signal in the UHF band (470 MHz to 770 MHz). The television signal of 620 MHz or less divided by the branching filter (or changeover switch) 42 is input to the mixer 46 through the high frequency stage on the low band side including the high frequency amplifier 43a, the tuning circuit 44a, and the high frequency amplifier 45a. The television signal is input to the mixer 46 through a high-frequency stage on the high band side including a high-frequency amplifier 43b, a tuning circuit 44b, and a high-frequency amplifier 45b. The tuning circuits 44a and 44b have the same configuration as the tuning circuit 4 shown in FIG. The mixer 46 is supplied with a local oscillation signal from an oscillator 47. The intermediate frequency signal output from the mixer 46 is input to the intermediate frequency amplifier 50 via the image signal removal filter 48 and the intermediate frequency filter 49, demodulated by the demodulator 51 provided in the next stage, and the video and audio signals. Is output. The tuner is provided with the switching means 2, the up / down counter 8, the second oscillator 12, the controller 9 and the like shown in FIG. 1 which are necessary for setting the tuning frequency of the tuning circuits 44a and 44b. is there.

It is a circuit diagram which shows the structure of the receiver of this invention. It is a circuit diagram which shows the structure of the switching means used for the receiver of this invention. It is a circuit diagram which shows the structure of the television tuner to which the receiver of this invention is applied. It is a circuit diagram which shows the structure of the conventional receiver.

Explanation of symbols

1: antenna 2: switching means 2a: first switch element 2b: second switch element 2c: third switch element 2d: fourth switch element 3: high frequency amplifier 4: tuning circuit 5: primary side tuning circuit 5a : Inductance element 5b: Capacitance element 5c: Switch element 6: Secondary side tuning circuit 6a: Inductance element 6b: Capacitance element 6c: Switch element 7: Mixer 8: Up / down counter 9: Controller 10: First oscillator 11: First PLL circuit 12: Second oscillator 13: Second PLL circuit 25: Band pass filter 26: Carrier detection circuit

Claims (4)

A tuning circuit having an inductance element, a plurality of capacitive elements, and a switching element that connects each capacitive element to the inductance element in parallel, a mixer that converts the frequency of the received signal, and a first oscillator that supplies a local oscillation signal to the mixer A second oscillator that oscillates at the frequency of the received signal, a switching unit that inputs the received signal or the oscillation signal of the second oscillator to the tuning circuit, and a plurality of bits of output data to output the oscillator An up / down counter for controlling on / off of each switch element, a carrier detection circuit for detecting a signal output from the tuning circuit, an operating state of the second oscillator, and switching of the switching means are controlled. And a controller for detecting a peak value of the detection output outputted from the carrier detection circuit. The second oscillator is operated at the start of operation and the oscillation signal is input to the tuning circuit, and the count signal is supplied to the up / down counter, and the operation of the second oscillator is performed after the peak value is detected. And the reception signal is input to the tuning circuit to stop the supply of the count signal. The volume number of the elements varied from each other the capacitance value of the capacitance elements as N, 2 ^N of the capacitance values of the other N-th the capacitors other than the capacitor element having a minimum capacitance value of each minimum capacitance value The receiving apparatus according to claim 1, wherein the receiving apparatus is doubled. 3. The receiving apparatus according to claim 1, wherein the controller outputs an up count signal for counting up the up / down counter or a down count signal for counting down. The tuning circuit is composed of a double tuning circuit, and the primary side tuning circuit and the secondary side tuning circuit are provided with the inductance element, the capacitive element, and the switch element, respectively, and the primary connected to the capacitive element having the same capacitance value 4. The receiving apparatus according to claim 2, wherein both the switch element of the side tuning circuit and the switch element of the secondary side tuning circuit are turned on or off.

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