JPS6246358Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a SSB/CW/FM (or AM) receiver that eliminates various reception disturbances caused by the influence of BFO when receiving FM (or AM). It is.

Conventionally, an SSB/CW/FM (or AM) receiver is configured as shown in Figure 1, where 11 is an RF amplifier RA, mixer _M3 , IF filter IF, and IF amplifier.
IA, detector D, AF amplifier AA and speaker SP
This shows a receiving circuit consisting of a general circuit, but the frequency control system of the PLL system is as follows.

First, the output of the variable frequency oscillator VFO and BFO1
2 are mixed in mixer _M1 , and the output is input to mixer _M2 . On the other hand, Mixa M ₂
The output signal of the voltage controlled oscillator VCO is input to , and after being mixed with the input from mixer _M1 ,
It is input to a programmable divider PD whose frequency division ratio is controlled by a frequency division controller 15. Output frequency from programmable divider PD and
The phase is compared with the reference frequency of the PLL reference oscillator SG by the phase comparator PC, the comparison output is input to the voltage controlled oscillator VCO, and the oscillation output is input to the mixer.
The output of the voltage controlled oscillator VCO is inputted to the mixer _M3 of the reception system circuit 11 as a local _oscillation output to control the reception frequency.

As is clear from the figure, the output of the BFO 12 is also input to the detector D, but this is based on the received signal passing through the detector D, for example, ±
This is to demodulate signals such as SSB by generating a carrier with a deviation of 1.5KHz. However, in the conventional receiver described above, the BFO 12 must be kept operating regardless of the reception mode due to its circuit configuration, so when receiving FM (or AM), the carrier is It had drawbacks such as reception interference, the generation of audible beat sounds, inability to receive weak signals, and inappropriate squelch operation.

In addition, BFO1 is only used when receiving FM (or AM).
Even if you prevent it from being input to detector D from 2.
It is clear that a similar problem will occur if the BFO 12 wraps around.

Another way to avoid the above problem is to add a local oscillator that is not included in the mixer and PLL loop to the receiving circuit 11, but adding mixers makes the signal system configuration more complicated. In addition to this, there are drawbacks such as errors in frequency display and deterioration of multi-signal characteristics.

The purpose of this invention is to eliminate the above-mentioned conventional drawbacks,
It is an object of the present invention to provide a receiver that does not cause reception interference as described above even when receiving FM (or AM).

Hereinafter, an embodiment of the present invention will be described based on FIG. 2.

1 in the figure is a receiving system circuit, and also includes a mixer M ₂ and a programmable divider that constitute the PLL.
The PD, phase comparator PC, reference oscillator SG, voltage controlled oscillator VCO, etc. are the same as in the conventional example.

2 is BFO, 3 is the oscillation frequency _BFO of BFO2
The oscillation frequency (
It is a local oscillator with _BFO ±n _SG ). _S1 is
This is a switch for switching between BFO2 and oscillator 3, and _S2 is a switch for turning on and off the power supply Vcc of BFO2 in conjunction with switch _S1 .

The frequency division controller 5, which determines the frequency division ratio of the programmable divider PD, can change its frequency division ratio N using the FM (or AM) data setter 4. The circumferential ratio is set to be larger or smaller by n. S ₃
is a switch which inputs a change control signal from the setting device 4 to the frequency division controller 5 in conjunction with the switches S ₁ and S ₂ .

To explain an example of the operation in the above configuration, first, when receiving SSB or CW, BFO2 is connected to mixer _M1 via switch _S1 . In this reception mode, the switch _S2 is on and the switch _S3 is off, so the setting state of the frequency division controller 5 is not changed at all.

Therefore, the frequency division ratio of the programmable divider PD is set to N (positive integer) by the frequency division controller 5, and the oscillation frequency _VCO of the voltage controlled oscillator VCO is set to N (positive integer).
is set as shown below.

_VCO = N _SG + _VFO + _BFO ... (1) However, _VFO is the oscillation frequency of the variable frequency oscillator VFO. Furthermore, when the receiving frequency is _S , the following equation holds true.

_S = _VCO − _C ...(2) Next, when receiving FM (or AM), switch S ₁ , S ₂ , and S ₃ connect oscillator 3 to mixer M 1 by switch S ₁ , and connect BFO 2 to mixer M ₁ . The power supply is turned off by switch S ₂ , the oscillation of BFO 2 is stopped, and the setting device 4 is connected to the frequency division controller 5 by switch S ₃ , so the frequency division ratio of the programmable divider PD becomes smaller or larger by n. , (N〓n).

Here, the oscillation frequency ₃ of the oscillator 3 is ( _BFO
±n _SG ), so if n _SG is selected higher than the audible frequency, the frequency of the received signal passing through the detector D and the oscillation frequency of the oscillator 3 will be more than the audible frequency apart, and the audible beat will be No reception interference occurs, such as generation of sound, inability to receive weak signals, or inappropriate squelch operation.

On the other hand, the frequency division ratio of the programmable divider PD is operated by the frequency division controller 5 to become smaller or larger by an integer multiple of the reference frequency oscillator SG, so the oscillation frequency of the PLL does not fluctuate in the end, of course, and the receiving frequency does not fluctuate. Nor.

That is, in this case, the oscillation frequency _VCO of the voltage controlled oscillator VCO is _VCO = (N〓n) _SG + _VFO + ( _BFO ±n _SG ) ...(3), and when you calculate the right side of equation (3), you end up with ( 1) is equal to Eq.

It goes without saying that the same effect can be obtained even if the above-mentioned frequency relationship is reversed.
In addition, in the illustrated example, the oscillator 3 is provided separately from the BFO2, but it is also possible to switch between them by using the BFO2, which has two crystal oscillators with the oscillation frequency _BFO and ( _BFO ± _SG ), without providing the oscillator 3. Of course it's a good thing.

As described above, according to the receiver according to the present invention, SSB, CW, and
In FM (or AM) receivers, SSB and CW
When receiving, the frequency output _BFO of BFO is supplied to the loop of the PLL, and when receiving FM (or AM), the frequency output _BFO of the BFO is supplied to the loop of the PLL.
a first means for supplying a frequency output ( _BFO ±n _SG ) higher or lower by n (positive integer) times the reference frequency _SG of the PLL, and a frequency division of a programmable frequency divider of the PLL when receiving SSB and CW; The ratio is set to N (positive integer), and when receiving FM (or AM), the frequency division ratio is set to (N〓n). Reception disturbances such as inability to receive signals and uncertain squelch operation can be removed.

Further, it has excellent features such as no need to change the configuration of a conventional reception system and no risk of deterioration of reception characteristics.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing a conventional receiver, Figure 2 is a block diagram showing a conventional receiver.
The figure is a block diagram showing an embodiment of a receiver according to the present invention. 1... Receiving system circuit, 2... BFO, 3... Oscillator, 4... Setting device, 5... Frequency division controller, S ₁ , S ₂ ,
S ₃ ...Switch.

Claims (1)

[Scope of utility model registration request] SSB, CW, using PLL as a local oscillator
In FM (or AM) receivers, SSB and CW
When receiving, the frequency output _BFO of BFO is supplied to the loop of the PLL, and when receiving FM (or AM), the frequency output _BFO of the BFO is supplied to the loop of the PLL.
a first means for supplying a frequency output ( _BFO ±n _SG ) higher or lower by n (positive integer) times the reference frequency _SG of the PLL; and a frequency division of a programmable frequency divider of the PLL when receiving SSB and CW; a second means for setting the ratio to N (a positive integer) and setting the frequency division ratio to (N≓n) when receiving FM (or AM).