JPH08106107A - Production of thin-film transistor matrix and thin-film transistor matrix - Google Patents

Abstract

PURPOSE: To prevent the yield of a liquid crystal display panel from lowering by forming grooves in protective insulating films in regions which are separating regions between adjacent pixel electrodes, then forming a transparent conductive film over the entire surface and selectively etching away this transparent conductive film. CONSTITUTION: An SiN film 10 which is a protective film is formed over the entire surface and thereafter, a photoresist is applied on the film and a resist mask 11 is formed in such a manner that openings are formed on a drain electrodes 8A and a storage capacitor 201A. Next, the SiN film 10 is etched away via the resist mask 11 to form contact holes 12, 13 and slit-like grooves 10A, 10B are formed at the SiN film 10 on both sides of a drain bus line 202 which is the separating region between the pixel electrodes. Next, a photoresist is formed over the entire surface and is exposed and developed to selectively form the resist mask in the regions where the pixel electrodes are to be formed. An ITO film 14 is then etched away via the resist mask, by which the pixel electrodes 14A, 14B are selectively formed in the adjacent pixel regions.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor matrix and a thin film transistor matrix, and more particularly to a method of manufacturing a thin film transistor matrix used for a liquid crystal display and the like and a thin film transistor matrix. In recent years, it has been desired to use a liquid crystal display as a display device of an information processing device or a display device of a TV, and to increase the area and definition.
Development of a method for manufacturing the thin film transistor matrix used for these with a high yield is required.

[0002]

2. Description of the Related Art A conventional method of manufacturing a thin film transistor matrix will be described below with reference to the drawings. 7 to 9 are cross-sectional views showing a method of manufacturing a thin film transistor matrix used in a liquid crystal display device and the like, and FIG. 10 is a top view of the thin film transistor matrix. Note that FIG. 9C is a cross-sectional view taken along the line AA of FIG. 10.

First, as shown in FIG. 7A, after forming an Al / Ti film on a glass substrate 21, patterning is performed to form a gate electrode 22A and a storage capacitor bus line (storage capacitor bus line) 22B. Are formed at the same time.
Next, as shown in FIG.
-CVD method) is used to form the SiN film 23 serving as a gate insulating film
Is formed to a thickness of 400 nm, an amorphous silicon film (hereinafter referred to as a-Si film) 24 is formed to a thickness of 10 nm, and a SiN film 25 to be a channel protective film is formed to a thickness of 1 nm.
It is formed to a thickness of 0 nm.

Next, as shown in FIG. 1C, a resist film is formed on the surface, and in order to form a channel protective film, the resist film on the storage capacitor bus line 22B is surface-exposed by a photomask and the gate electrode is formed. Self-alignment is performed by backside exposure using 22A as a mask to form a resist mask 26 in the channel formation region. Next, as shown in FIG. 3D, the SiN film 25 is etched and removed by the resist mask 26 to form a channel protective film 25A. Then, the resist pattern 26 is peeled off and lightly etched with hydrofluoric acid for about 10 seconds in order to remove the natural oxide film on the surface.

Next, as shown in FIG.⁺Type
Amorphous silicon layer (hereinafter n ⁺Called a-Si layer
27) and a Cr film 28 are sequentially formed. Then, the whole surface
By forming a resist film on the substrate, exposing and developing,
As shown in FIG. 8 (a), a resist mask 2 is formed in a necessary area.
9 is formed. Next, as shown in FIG.
The strike mask 29 allows the Cr film 28, n⁺a-Si film 2
7, a-Si film 24 is sequentially formed by plasma etching.
Etching / removing.

As a result, the operating semiconductor layer 24A made of an a-Si film, the drain contact layer 27A / drain electrode 28A, the source contact layer 27B / source electrode 28B are formed, and the a-Si film 24D / a-Si is formed. Membrane 2
Drain bus line 102 made of 7D / Cr film 28D
And a-Si film 24C / a-Si film 27C / Cr film 28
A-Si in the pixel region adjacent to the storage capacitor 101A made of C
The storage capacitor 101B composed of the film 24E / a-Si film 27E / Cr film 28E is simultaneously formed.

Next, as shown in FIG.
A SiN film 30 serving as a protective film is formed on the entire surface by the D method so as to have a thickness of 200 nm. Next, after applying photoresist on the entire surface, it is exposed and developed to form a resist mask 31 having openings on the source electrode 28B and the storage capacitor 101A as shown in FIG.

Next, the SiN film 30 is etched and removed through the resist mask 31 by plasma etching to form contact holes 30A and 30B. Thereafter, as shown in FIG. 9A, an ITO (Indium Tin Oxide) film 32 is formed to a thickness of 80 nm on the entire surface by a sputtering method. Next, as shown in FIG. 3B, a photoresist is applied on the entire surface and patterned to form a resist mask 33.

Then, as shown in FIG. 3C, the ITO film 32 is etched and removed through the resist mask 33 by wet etching using ferric chloride or the like as an etchant to separate the ITO film 32 into pixel regions. Pixel electrode 3
2A and 32B are formed.

[0010]

However, if foreign matter or the like adheres to the surface of the ITO film 32 in the step of etching the ITO film 32 when forming the pixel electrodes 32A and 32B, this foreign matter will not be etched. Since it behaves like a mask, a residue of the ITO film may be generated under the foreign matter.

When such a residue of the ITO film is generated between the adjacent pixel electrodes, the pixel electrodes are electrically short-circuited. Therefore, when such a thin film transistor matrix is used in a liquid crystal display panel, a screen display is displayed. Since connected point defects are generated, the display surface becomes defective enough to be a fatal defect. This causes a problem that the yield of the liquid crystal display panel is reduced. It suffices if such a defect can be found in advance, but it is very difficult to detect the occurrence of the defect because all the pixel electrodes are transparent.

The present invention has been made in view of the above problems, and provides a method of manufacturing a thin film transistor matrix capable of preventing a reduction in the yield of a liquid crystal display panel due to a short circuit between pixel electrodes. The purpose is to provide.

[0013]

[Means for Solving the Problems]
In a method of manufacturing a thin film transistor matrix including a plurality of thin film transistors each connected to a pixel electrode, a step of forming a protective insulating film on a substrate on which a plurality of thin film transistors are formed and a separation region between adjacent pixel electrodes are formed. Forming a groove in the protective insulating film in a region and simultaneously forming an opening in the protective insulating film on the source electrode of the thin film transistor; forming a transparent conductive film on the entire surface; and selecting the transparent conductive film. Etching, and forming a pixel electrode that is connected to the source electrode of the thin film transistor through the opening while being separated for each pixel region by the groove, and a method of manufacturing a thin film transistor matrix. Is solved by
Secondly, in a method of manufacturing a thin film transistor matrix including a plurality of thin film transistors each connected to a pixel electrode, a step of forming a protective insulating film on a transparent substrate on which a plurality of thin film transistors, storage capacitors and drain bus lines are formed, A step of forming a groove in the protective insulating film in a region to be an isolation region between adjacent pixel electrodes, and simultaneously forming an opening in the protective insulating film on the source electrode of the thin film transistor and the storage capacitor, and a transparent conductive film over the entire surface. A step of forming a film, and a step of selectively etching the transparent conductive film to separate the pixel region by the groove and connecting the source electrode and the storage capacitor of the thin film transistor through the opening to the pixel electrode. And a step of forming the thin film transistor matrix. , The cross-sectional shape of the groove is achieved by the method of manufacturing a thin film transistor matrix according to the first or second invention is characterized in that it is a rectangular shape, a fourth
In the method of manufacturing a thin film transistor matrix according to the first or second aspect of the present invention, the groove has a V-shaped cross section. Fifth, the groove has a reverse tapered shape. Which is solved by the method for manufacturing a thin film transistor matrix according to the first or second invention, and sixthly, the method for manufacturing a thin film transistor matrix according to the present invention. Solve by.

[0014]

[Operation] In the method of manufacturing a thin film transistor matrix of the present invention, after forming a groove in a protective insulating film in a region which becomes an isolation region between adjacent pixel electrodes, a transparent conductive film is formed on the entire surface to form a transparent conductive film. A pixel electrode is formed by selectively etching and removing.

When a transparent conductive film is formed by covering the groove,
The film thickness of the transparent conductive film formed on the sidewall of the groove is smaller than the film thickness of the transparent conductive film formed on the flat surface. Therefore, after that, when the transparent conductive film was etched to form the pixel electrode, the film thickness of the transparent conductive film on the side wall of the groove was smaller than the film thickness on the flat surface. Therefore, the transparent conductive film on the flat surface was removed. At this time, the transparent conductive film on the side wall of the groove is surely removed. Even if the foreign matter blocks the groove, the wet etching causes the etching solution to flow through the groove connected to the lower side of the foreign matter, and the transparent conductive film below the foreign matter is also removed. As a result, the pixel electrode can be reliably separated for each pixel region.

Therefore, it is possible to prevent a short circuit between adjacent pixel electrodes and improve the yield of a liquid crystal display panel using a thin film transistor matrix. Also,
A groove is formed in the protective insulating film in a region which becomes a separation region between adjacent pixel electrodes, and at the same time, an opening is formed in the protective insulating film above the source electrode and the storage capacitor of the thin film transistor.

Therefore, the formation of the opening for making contact with the source electrode of the thin film transistor and the storage capacitor and the formation of the groove can be carried out in one step, so that they are formed in separate steps. Therefore, the number of masking steps and etching steps can be reduced, and labor can be saved. Furthermore,
By making the cross section of the groove rectangular or V-shaped, the film thickness of the transparent conductive film can be reduced on the side wall of the groove.

Further, since the cross-sectional shape of the groove is inversely tapered, almost no transparent conductive film is formed on the side wall of the groove and so-called step breakage occurs, so the transparent conductive film sandwiching the groove in the film forming process. Are almost electrically separated. Therefore, after passing through the etching process for forming the pixel electrode thereafter, it is possible to almost completely prevent an electrical short circuit between the pixel electrodes adjacent to each other across the groove.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a thin film transistor matrix according to an embodiment of the present invention will be described below with reference to the drawings. (First Embodiment) FIGS. 1 to 3 are sectional views showing a method of manufacturing a thin film transistor matrix used in a liquid crystal display device and the like, and FIG. 4 is a top view of the thin film transistor matrix. FIG. 3C is a sectional view taken along the line BB of FIG.

First, as shown in FIG. 1A, an Al / Ti film is formed on a glass substrate 1 by a sputtering method and patterned to form a gate electrode 2A and a storage capacitor bus line (storage capacitor bus line) 2B. To form. Next, as shown in FIG. 4B, a SiN film 3 having a film thickness of about 400 nm, which is a gate insulating film, an a-Si film 4 having a film thickness of about 10 nm, and a channel protective film are formed by a P-CVD method. The SiN film 5 having a film thickness of about 10 nm is formed.

Next, as shown in FIG. 3C, after applying a photoresist on the entire surface, the resist film on the storage capacitor bus line 2B is surface-exposed using a photomask PM, and the gate electrode 2A is masked. As the back exposure, it is developed. As a result, the resist mask 6 is selectively formed in the channel formation region of the thin film transistor by self-alignment.

Next, as shown in FIG. 3D, the SiN film 5 is etched and removed by the resist mask 6 to selectively form the channel protection film 5A. Then, after removing and removing the resist mask 6, etching is performed with dilute hydrofluoric acid for about 10 seconds to remove the natural oxide film on the surface. Then, as shown in FIG. 7E, n ^{+ a} − with a film thickness of about 60 nm is formed.
A Si layer 7 and a Cr film 8 having a film thickness of about 100 nm are sequentially laminated.

After that, a photoresist is applied to the entire surface, exposed and developed to selectively form a resist mask 9 at a required portion as shown in FIG. 2 (a). Next, as shown in FIG. 3B, the Cr film 8 and the n ⁺ a-Si are etched through the resist mask 9 by plasma etching.
The film 7 and the a-Si film 4 are sequentially etched and removed.

As a result, the operating semiconductor layer 4A made of an a-Si film, the drain contact layer 7A / drain electrode 8A, the source contact layer 7B / source electrode 8B are formed, and the a-Si film 4D / a-Si is formed. Film 7D / Cr film 8
Drain bus line 202 made of D and a-Si film 4
Storage capacitor 201A consisting of C / a-Si film 7C / Cr film 8C
A-Si film 4E / a-Si film 7E in the pixel region adjacent to
The storage capacitor 201B made of the / Cr film 8E is formed at the same time.

Then, as shown in FIG.
Approximately 200 nm thick SiN film 1 to be a protective film by VD method
0 is formed on the entire surface. Next, as shown in FIG.
A photoresist is applied and a resist mask 1 is formed so that openings are formed on the drain electrode 8A and the storage capacitor 201A.
1 is formed. At this time, when the pixel electrode is formed later, strip-shaped openings are formed in advance on both sides of the drain bus line 202 in a region which becomes a separation region between adjacent pixel electrodes.

Then, as shown in FIG.
By plasma etching using a gas such as F ₆ and O ₂ , the SiN film 10 is etched and removed through the resist mask 11 under the conditions of pressure 6.0 Pa and RF power 600 W, and the contact holes 12 and 13 are formed. The slit-shaped groove 10A is formed in the SiN film 10 on both sides of the drain bus line 202 which is to be formed and serves as a separation region between the pixel electrodes.
Form 10B.

Next, after removing the resist mask 11 with a removing solution, as shown in FIG. 3A, an ITO film 14 having a film thickness of about 80 nm is formed on the entire surface by a sputtering method. Next, as shown in FIG. 3B, a photoresist is applied on the entire surface, exposed and developed to selectively form a resist mask 15 in a region where a pixel electrode is to be formed. Then, as shown in FIG. 3C, the ITO film 14 is etched and removed through the resist mask 15 to form pixel electrodes 14 in adjacent pixel regions.
A and 14B are selectively formed.

At this time, since the grooves 10A and 10B are formed in the separation region between the pixel electrodes 14A and 14B, the groove 10
The film thickness of the ITO film 14 on the side walls of A and 10B is smaller than the film thickness of the ITO film 14 in other flat regions. Therefore, when the ITO film 14 is etched under normal etching conditions, if the ITO film 14 in the flat region is completely removed, the IT on the sidewalls of the trenches 10A and 10B is removed.
The O film 14 can be reliably removed. Further, even if the foreign matter blocks the grooves 10A and 10B, the grooves 10A and 10B connected under the foreign matter are wet-etched by the wet etching.
The etching solution circulates through and the ITO film 14 under the foreign matter is also removed.

As a result, the pixel electrode 14 is provided for each pixel area.
A, 14B can be reliably separated, and the groove portions 10A,
It is possible to prevent the pixel electrodes 14A and 14B adjacent to each other with 10B interposed therebetween from being electrically short-circuited. (Second Embodiment) A method of manufacturing a thin film transistor matrix according to a second embodiment of the present invention will be described below with reference to FIG.
A description will be given with reference to (a) to (d). The description of the steps common to the first embodiment will be omitted to avoid duplication.

The second embodiment differs from the first embodiment in that the groove formed in the separation region between the pixel electrodes 14A and 14B has a V-shaped cross section. FIG.
After the steps similar to those of the first embodiment shown in FIGS. 2A to 2C, first, as shown in FIG. 5A, a photoresist is applied to the entire surface to form a resist film 11. .

Subsequently, after exposing and developing the resist film 11 to form openings on the source electrode and the storage capacitor, another photomask is used to form a separation region between pixel electrodes for forming a groove. V-shaped grooves 11A and 11B are formed in the resist film 11 on both sides of the drain bus line 202.
At this time, the areas where the grooves 11A and 11B are to be formed are selectively exposed by a method such as exposing so that the focus is slightly shifted.

Next, the resist film 11 and the underlying SiN
By etching back the film 10, contact holes 12 and 13 and trenches 10C and 10D having a V-shaped cross section as shown in FIG. 3B are formed in the SiN film 10.
Next, as shown in FIG. 6C, an ITO film 14 having a film thickness of about 80 nm is formed on the entire surface by a sputtering method, and then a resist film 15 is selectively formed in a region where a pixel electrode is to be formed.

Next, using the resist film 15 as a mask, I
The TO film 14 is etched and removed to remove the pixel electrodes 14A, 1
4B is formed. In this embodiment, unlike the first embodiment, the grooves 10C and 10D have a V-shaped cross section.
The film thickness of the ITO film 14 formed inside is thinner on the side wall than on the flat surface.

As a result, like the first embodiment,
Since the ITO film 14 in the isolation region can be reliably removed, it is possible to prevent a short circuit between the adjacent pixel electrodes 14A and 14B. (Third Embodiment) A method of manufacturing a thin film transistor matrix according to a third embodiment of the present invention will be described below with reference to FIG.
A description will be given with reference to (a) to (d). Note that the first
Descriptions of steps common to the second embodiment will be omitted to avoid duplication.

The third embodiment differs from the first and second embodiments in that the cross-sectional shape of the groove formed in the isolation region between the pixel electrodes is an inverse taper shape. First, FIG.
After the steps similar to those of the first embodiment shown in FIGS. 2A to 2B, the SiN film 10 is formed on the entire surface as shown in FIG. 2C.
To form a film. At this time, Si is formed by the plasma CVD method.
SiN film 1 using a mixed gas such as H ₄ + NH ₃ + H ₂
Although 0 is grown, the concentration of H ₂ is set high at the beginning of growth and the film is formed while the concentration of H ₂ is lowered as the film growth progresses.

As a result, the formed SiN film 10 becomes denser as it gets closer to the surface and becomes less dense as it gets closer to the bottom, so that the etching rate becomes higher as it goes downward. After that, as shown in FIG. 6A, a photoresist is applied to the entire surface to form a resist film 11, which is exposed and developed to form an opening for a contact hole and an opening for forming a groove.

Next, using the resist film 11 as a mask, S
By etching and removing the iN film 10, contact holes 12 and 13 and trenches 10E and 10F as shown in FIG. 3B are formed in the SiN film 10. At this time,
As described above, since the etching rate of the SiN film 10 becomes lower as it goes downward, the cross-sectional shapes of the grooves 10E and 10F have an inverse tapered shape as shown in FIG.

Thereafter, as shown in FIG. 7C, an ITO film 14 having a thickness of about 80 nm is formed on the entire surface by the sputtering method. At this point, the cross-sectional shapes of the grooves 10E and 10F are inversely tapered, so that the ITO film 14 is hardly formed on the side walls thereof. Next, after the resist film 15 is selectively formed in the region where the pixel electrode is formed, the ITO film 14 is etched and removed using the resist film 15 as a mask to form the pixel electrodes 14A and 14B in the adjacent pixel region. At this time, unlike the first and second embodiments, the groove 1 in the isolation region is
Since the ITO film 14 is hardly formed on the sidewalls of 0E and 10F, the pixel electrodes 14A and 14B can be reliably separated.

[0039]

As described above, in the method of manufacturing the thin film transistor matrix of the present invention, after forming the groove in the protective insulating film in the area which becomes the separation area between the adjacent pixel electrodes, the transparent conductive film is formed on the entire surface. Is forming. Therefore, the film thickness of the transparent conductive film on the side wall of the groove is smaller than that of the flat surface. Therefore, when the transparent conductive film on the flat surface is removed by etching, the transparent conductive film on the side wall of the groove is surely removed. It Even if the foreign matter blocks the groove, the wet etching causes the etching solution to flow through the groove connected to the underside of the foreign matter, and the transparent electrode under the foreign matter is also removed. As a result, the pixel electrode can be completely separated for each pixel region.

Therefore, it is possible to prevent a short circuit between adjacent pixel electrodes and improve the yield of a liquid crystal display panel using a thin film transistor matrix. Also,
A groove is formed in the protective insulating film in a region which becomes a separation region between adjacent pixel electrodes, and at the same time, an opening is formed in the protective insulating film above the source electrode and the storage capacitor of the thin film transistor.

Therefore, the formation of the opening for making contact with the source electrode of the thin film transistor and the storage capacitor and the formation of the groove can be carried out in one step, so that they are formed in separate steps. Therefore, the number of masking steps and etching steps can be reduced, and labor can be saved.

[Brief description of drawings]

FIG. 1 is a sectional view (No. 1) for explaining a method of manufacturing a thin film transistor matrix according to a first embodiment of the present invention.

FIG. 2 is a sectional view (No. 2) for explaining the method of manufacturing the thin film transistor matrix according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view (3) explaining the method of manufacturing the thin film transistor matrix according to the first embodiment of the present invention.

FIG. 4 is a top view of a thin film transistor matrix according to a first embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating the method of manufacturing the thin film transistor matrix according to the second embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating the method of manufacturing the thin film transistor matrix according to the third embodiment of the present invention.

FIG. 7 is a cross-sectional view (1) for explaining the method of manufacturing the thin film transistor matrix according to the conventional example.

FIG. 8 is a sectional view (No. 2) for explaining the method of manufacturing the thin film transistor matrix according to the conventional example.

FIG. 9 is a cross-sectional view (3) explaining the method of manufacturing the thin film transistor matrix according to the conventional example.

FIG. 10 is a top view illustrating a thin film transistor matrix according to a conventional example.

[Explanation of symbols]

1 glass substrate (transparent substrate), 2A gate electrode, 2B storage capacitor bus line (storage capacitance bus line), 3,5 SiN film, 4,4C, 4D, 4E a-Si film, 4A operating semiconductor layer, 5A channel protection Film, 6,9,11,15 resist mask, 7,7C, 7D, 7E n ⁺ a-Si layer, 7A drain contact layer, 7B source contact layer, 8,8C, 8D, 8E Cr film, 8A drain electrode, 8B source electrode, 10 SiN film (protective insulating film), 10A, 10B, 10C, 10D, 10E, 10F groove part, 11A, 11B, 12, 13 opening, 14 ITO film, 14A, 14B pixel electrode, 201A, 201B storage capacity , 202 Drain bus line.

Front page continuation (72) Inventor Yoshio Dejima 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited

Claims (6)

[Claims] 1. A method of manufacturing a thin film transistor matrix comprising a plurality of thin film transistors each connected to a pixel electrode, wherein a step of forming a protective insulating film on a substrate on which the plurality of thin film transistors are formed, and separation between adjacent pixel electrodes. Forming a groove in the protective insulating film in a region to be a region and simultaneously forming an opening in the protective insulating film on the source electrode of the thin film transistor; forming a transparent conductive film on the entire surface; And a step of selectively etching a film to form a pixel electrode which is separated by the groove for each pixel region and is connected to the source electrode of the thin film transistor through the opening. Manufacturing method. 2. A method of manufacturing a thin film transistor matrix comprising a plurality of thin film transistors each connected to a pixel electrode, the method comprising forming a protective insulating film on a transparent substrate on which a plurality of thin film transistors, storage capacitors and drain bus lines are formed. A step of forming a groove in the protective insulating film in a region serving as a separation region between adjacent pixel electrodes and simultaneously forming an opening in the protective insulating film on the source electrode of the thin film transistor and the storage capacitor, and A step of forming a conductive film, and a pixel electrode which selectively etches the transparent conductive film and is separated for each pixel region by the groove, and which is connected to the source electrode and the storage capacitor of the thin film transistor through the opening. And a step of forming a thin film transistor matrix. 3. The method of manufacturing a thin film transistor matrix according to claim 1, wherein the groove has a rectangular cross-sectional shape. 4. The method of manufacturing a thin film transistor matrix according to claim 1, wherein the groove has a V-shaped cross section. 5. The method of manufacturing a thin film transistor matrix according to claim 1, wherein the cross-sectional shape of the groove is an inverse taper shape. 6. A thin film transistor matrix manufactured by the method for manufacturing a thin film transistor matrix according to claim 1, claim 2, claim 3, claim 4 or claim 5.