JPH0792734B2 - Memory device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a large capacity memory device connected to a so-called microcomputer.

[0002]

2. Description of the Related Art A so-called microcomputer is constructed as follows. In FIG. 2, reference numeral 1 denotes a central processing unit (CPU) from which a data bus line 2, a control bus line 3 and an address bus line 4 are derived. Each of the lines 2 to 4 is connected to a read only memory (ROM) 5 in which a program for the operation of the CPU 1 is written and a random access memory (RAM) 6 for storing data. Further, each of these lines 2 to 4 is connected to the input / output circuit 7. Reference numeral 10 is an oscillator for timing the operation of the CPU 1.

In this apparatus, data from the outside is read into the CPU 1 through the input / output circuit 7, and further RA
Written to M6. Then, data processing is performed according to the program of the ROM 5, and the resulting data is taken out through the input / output circuit 7.

However, in such a device, the RAM
Since the storage capacity of 6 is limited, it is not possible to handle a large amount of data, and processing such as compiler, editing and sorting cannot be performed. Therefore, a large-capacity memory device is provided externally to input / output data by a predetermined amount to substantially increase the storage capacity of the RAM 6.

An example of such a memory device is called a floppy disk. As shown in FIG. 3, the floppy disk is, for example, a magnetic disk having a diameter of 8 inches, is provided with 77 concentric tracks (0 to 76), and each track is divided into 26 sectors (1 to 26). 128 bytes of data can be stored in each sector. The signals of the lines 2 to 4 from the input / output circuit 7 of FIG. 2 are supplied to the floppy disk controller (FDC) 8, and the floppy disk 9 is driven by the FDC 8 to input / output data.

That is, a signal from the CPU 1 indicating whether to use the floppy disk 9 is supplied to the FDC 8 through the address bus line 4. Also floppy disk 9
A signal designating the track and sector numbers of the above is supplied to the FDC 8 through the data bus line 2. Further, a write or read control signal is supplied to the FDC 8 through the control bus line 3. Then, the floppy disk 9 is rotated, the position of the magnetic head is moved, and writing and reading of the sector of the designated number are performed through the data bus line 2. An identification signal indicating whether the signal on the data bus line 2 is the track number, the sector number, or the input / output data is supplied to the FDC 8 through the address bus line 4.

In this way, the data of the floppy disk 9 is input / output. However, in the case of such a floppy disk 9, the time required to reach the designated sector, that is, the so-called access time is required for mechanical driving, and input / output cannot be performed efficiently.

By the way, the price of a memory device such as a random access memory is much lower than that at the beginning of development.
Providing a large number of memory devices is no longer a cost problem. Therefore, for example, it was considered to increase the capacity of the RAM 6 itself, but such a large capacity is not necessary for normal use, and increasing the capacity of the RAM 6 requires software or hardware such as an address setting program. The design of the ware needs to be changed, and there are many problems in using the general-purpose CPU 1 that has already been put to practical use.

[0009]

The problem to be solved is that when a large number of memory elements are provided and the existing memory elements themselves have a large capacity, it is necessary to change the design of software such as programs or hardware. However, there are many problems in using the general-purpose CPU 1 that has already been put to practical use.

[0010]

SUMMARY OF THE INVENTION The present invention is a memory device which is connected as an external device to at least a computer in which a program for writing and reading a magnetic disk is built, and a plurality of sectors each. A read-only memory and a random access memory, and a sector number for writing and reading the magnetic disk is transmitted from the computer, and the transmitted sector number and writing and reading control from the computer are controlled. An address signal is formed based on a continuous count value related to the signal, the read-only memory is read in the sector unit, and the random access memory is written and read in the sector unit by the formed address signal. Do as Together, the read-only memory is adapted to store a program corresponding to the non-rewritable operation system program of the magnetic disk for the random access memory, and the random access memory at least the operation of the magnetic disk. A memory device having a storage capacity equal to that of a system program.

[0011]

According to this, it is possible to form a memory device which can be handled in the same manner as a magnetic disk and has a short access time.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, 20 is a dynamic random access memory. The memory 20 has a storage capacity of about 190 Kbytes, which is equal to the storage capacity of the data area of one floppy disk, and is formed by arranging three memory units of 64 Kbytes in parallel. Reference numeral 21 is a read-only memory, and this memory 21 corresponds to an area in which programs necessary for operating a computer such as a floppy disk operation system (OS) are written.
It is formed by a K-byte mask ROM.

ROM from the address bus line 4
5, a signal indicating which one of the RAM 6 and the external memory device is used is supplied to the address decoder 19 to form a signal corresponding to each used memory device. These signals are ROM5 and R, respectively.
It is supplied to the AM 6 and an external memory device described later. In the example shown in the figure, two external memory devices are provided, one of which is the floppy disk 9 and the other is the memory device according to the present invention.

The data bus line 2 from the input / output circuit 7 is connected to the data buffer circuit 11, the track number register 12, and the sector number register 13. Further, the data bus line 2 from the address bus line 4
A signal for identifying whether the signal is a track number, a sector number, or input / output data is supplied to the decoder 14. A signal from the decoder 19 is supplied to the control terminal of the decoder 14. Then, the decoded signal is the above-mentioned buffer circuit 11, register 12,
13 are supplied to the drive terminals. A control signal for writing or reading from the control bus line 3 is supplied to the control terminals of the buffer circuit 11 and the registers 12 and 13.

Further, a write or read control signal is supplied to the drive and refresh circuit 15 of the memory 20. Further, a signal when the signal of the data bus line 2 from the decoder 14 is input / output data is supplied to the drive and refresh circuit 15. Also register 12
The drive and refresh circuit 15 is supplied with a signal of, for example, the upper 2 bits of the numerical value indicating the track number. Further, the clock signal from the oscillator 10 is supplied to the drive and refresh circuit 15. Then, the drive and refresh circuit 15 supplies a signal to the refresh control and chip select terminal of the memory 20, and the output signal of the drive and refresh circuit 15 is supplied to the 128-ary counter 16. As a result, the counter 16 is driven in association with the write and read control signals and outputs a continuous count value.

A control signal for writing or reading is supplied to the drive circuit 17 of the memory 21, and a signal of the upper 2 bits of the track number from the register 12 is supplied to the drive circuit 17. Then, a signal is supplied from the drive circuit 17 to the chip select terminal of the memory 21.

Further, the count value of the counter 16, the numerical value of the track number register 12 and the numerical value of the sector number register 13 described above are supplied to the synthesizing circuit 18. Further, the signal from the driving and refreshing circuit 15 is supplied to the control terminal of the synthesizing circuit 18. The numerical value formed by the combining circuit 18 is supplied to the address terminal of the memory 20. Further, the numerical values of the counter 16, the register 12, and the register 13 are supplied to the address terminal of the memory 21. Further, the data buffer circuit 11 is connected to the data terminals of the memories 20 and 21. In the memories 20 and 21, one of the three memory units of the memory 20 or the memory 21 is selected by supplying a signal to the chip select terminal,
By writing an address to the address terminal, writing and reading of the designated address are performed.

In this circuit, the normal operation will be described first. To write data in the random access memory 20, the track number and the sector number to be written first are supplied through the data bus line 2. . At this time, the identification signals of the track number and the sector number are sent from the decoder 14 to the register 1 respectively.
2 and 13 and the track numbers and sector numbers are stored in these registers 12 and 13. Further, the upper 2 bits of the register 12 are supplied to the driving and refreshing circuit 15 and the driving circuit 17, and in this case, the signal from the driving and refreshing circuit 15 causes the memory 2
One of the three memory units of 0 is selected.

The data to be written next is supplied through the data bus line 2. At this time, the data input / output identification signal from the decoder 14 is supplied to the buffer circuit 11 and the drive / refresh circuit 15, and the counter 16 is supplied with a signal related to the timing of the data supply from the circuit 15. Driven. Then, the count value of the counter 16 and the track numbers and sector numbers stored in the registers 12 and 13 are combined with each other.
8 and the address number of the memory 20 is formed. Here, the formation of the address number is performed, for example, by setting the track number excluding the upper 2 bits as the upper bits of the address number, the sector number as the middle bit, and the count value of the counter 16 as the lower bit. Then, the data is stored at the address designated by the formed address number, and then 1
28 bytes of data are stored at 128 consecutive addresses.

In order to read the random access memory 20, the track number and the sector number to be read first are supplied through the data bus line 2, and these numbers are stored in the registers 12 and 13. One of the memory units in the memory 20 is selected. When the decoder 14 supplies a data input / output identification signal to the drive and refresh circuit 15, the counter 1
6 is driven, the numerical values of the registers 12 and 13 and the counter 1
The data of 128 addresses designated by the count value of 6 are sequentially read. The read data is supplied to the data bus line 2 through the buffer circuit 11.

Further, when the operation of this circuit is started,
First, a predetermined track number and a sector number are supplied through the data bus line 2, and these numbers are stored in the registers 12 and 13. Then, in this case, the signal of the upper 2 bits of the register 12 is discriminated by the drive circuit 17 and is set as a numerical value for selecting the read-only memory 21. Further, an input / output identification signal of data is supplied from the decoder 14 to the driving and refreshing circuit 15, the counter 16 is driven, and data of 128 addresses designated by the numerical values of the registers 12 and 13 and the count value of the counter 16 are supplied. Are sequentially read.

In this way, writing and reading of data,
Furthermore, the program is read out,
According to the present invention, by supplying the track number and the sector number through the data bus line 2, 128 addresses included in this sector are written or read, which corresponds to the writing of the above-mentioned floppy disk. Is equivalent. Also read-only memory 21
In, the program corresponding to the operating system (OS) or the like, which does not rewrite the floppy disk, can be stored, and can be treated exactly like a floppy disk. That is, the read-only memory (21) is adapted to store a program corresponding to the non-rewritable operation system program of the magnetic disk (9) for the random access memory (20), and the random access memory (20) is By having a storage capacity at least equal to the storage capacity of the operating system program of the magnetic disk (9), the storage capacity of the random access memory (20) in the computer (1) can be increased substantially.
Processing such as compiler, editing, and sorting can be performed, and when viewed from the computer (1), the memory device of the present invention can be controlled as if controlling the magnetic disk (9), and therefore the memory of the present invention is controlled. The device is separate from the magnetic disk (9), and even if this memory device is removed, it can be realized as a magnetic disk device. Therefore, when an external memory is provided, hardware and software can be installed. No design change is required.

Therefore, it is possible to write and read data by using the writing and reading programs of the floppy disk 9 built in the CPU 1 and the ROM 5 as they are. In this case, since the memory 20 is composed of memory elements, there is no delay in mechanical access and input / output can be performed very efficiently.

That is, according to the present invention, in a microcomputer having a built-in RAM having a relatively small capacity and having a program for driving a floppy disk, a high-speed and large-capacity memory can be provided without internally changing the design. Can be provided. Therefore, for example, processing such as compiler, editing, and sorting can be performed at extremely high speed.

When the scale of the program of the above-mentioned system is small, the capacity of the read only memory 21 may be reduced and the capacity of the random access memory 20 may be increased accordingly.

[0026]

According to the present invention, it is possible to form a memory device which can be handled in the same manner as a magnetic disk and has a short access time.

[Brief description of drawings]

FIG. 1 is a block diagram of an example of a memory device according to the present invention.

FIG. 2 is a diagram for explaining a conventional device.

FIG. 3 is a diagram for explaining a conventional device.

[Explanation of symbols]

 1 CPU 2 data bus line 3 control bus line 4 address bus line 5 ROM 6 RAM 7 input / output circuit 11 data buffer circuit 12 track number register 13 sector number register 14 decoder 15 drive and refresh circuit 16 counter 17 drive circuit 18 synthesis circuit 20 Random access memory 21 Read only memory

Claims (1)

[Claims] 1. A read-only memory, which is a memory device connected as an external device to a computer having at least a program for writing and reading data in a magnetic disk, the read-only memory being divided into a plurality of sectors. A random access memory is provided, and a sector number for writing and reading the magnetic disk is transmitted from the computer, and a continuous count value related to the transmitted sector number and a writing and reading control signal from the computer. An address signal is formed on the basis of the address signal, the read-only memory is read by the sector unit by the formed address signal, and the random access memory is written and read by the sector unit. The memory is adapted to store a program corresponding to the non-rewritable operation system program of the magnetic disk for the random access memory, and the random access memory at least has a storage capacity of the operation system program of the magnetic disk. A memory device having a storage capacity equal to.