JPH0789649B2 - Image data processor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an image data processing device for compressing or decompressing image data for one screen stored in a storage unit.

[Conventional technology]

Conventionally, image data is compressed when it is transmitted or stored. When the image data is compressed and expanded, the image data that is sequentially input is compressed and expanded by a compression and expansion circuit. However, since it takes time for compression and decompression in the compression and decompression circuit,
In particular, problems occur when transmitting image data at high speed.

Therefore, as disclosed in Japanese Utility Model Application No. 54-152686, the input image data is given line by line to one of a plurality of compression devices that has completed processing, and image data of a plurality of lines are compressed in parallel. A method is also possible.

[Problems to be Solved by the Invention]

However, such a method can be applied only to compression by one-dimensional encoding such as MH, and since the time required for compression differs for each line, it takes a long time to compress one line by one compression device, for example. In this case, even if the compression of the line input after the one line by the other compression device is completed, the compression of the line subsequently input cannot be performed by the other compression device. However, there is a problem that the compression speed cannot be sufficiently increased.

An object of the present invention is to solve the above-mentioned problems, to be applicable to various compression methods such as so-called two-dimensional compression, to have high versatility, and to dramatically speed up compression or decompression processing of image data with a simple configuration. It is to provide an image data processing device capable of performing the above.

〔Example〕

 The present invention will be described below with reference to preferred embodiments.

FIG. 1 shows an embodiment of a data compression / decompression device to which the present invention is applied. Further, FIG. 2 is a conceptual diagram of compression and decompression operations according to the present invention.

The image of one screen (page) shown in FIG. 2 is divided at point B. The compression / expansion circuit 1 shown in FIG. 1 is provided between points A and B.
The compression / expansion circuit 2 is in charge of the points B to C.
The unit of division is the horizontal line unit.

In FIG. 1, iMEM is a page memory that stores the image data input from the image input / output unit 3 and divides the image data as shown in FIG. The compression / decompression circuits 1 and 2 perform compression and decompression on the image data of each division thus divided. The compression method is well-known MH, M
R, MMR, etc. are used. An image input / output unit 3 inputs or outputs image data to be processed.

CMEM is a memory that stores the data after compression processing.
Similar to iMEM, EM also divides one screen image into two areas, and divides each divided area from the X address and the Y address.

The MPU is a control unit that controls the device, and the DMAC is a 4-channel DMAC (DMA controller), which uses 2 channels each for the compression / expansion circuits 1 and 2, and each compression / expansion circuit uses the iME.
One channel is used for transfer with M, and one channel is used for transfer with CMEM.

The operation of FIG. 1 will be described below with reference to the flow charts of FIGS. 3 and 4.

FIG. 3 is a flow chart of the compression operation. In the compression control, the A point address of iMEM is set to channel 0 in order to transfer the first half data of iMEM to the compression / expansion circuit 1 (S
1). Then, in order to transfer the compressed data to CMEM, C
Set the X point address of MEM to channel 1 (S2).
Similarly, the channels 2 and 3 for the compression / expansion circuit 2 are also set so that the latter half data of iMEM are compressed and transferred (S3,
Four). Then, a start command is issued to each of the compression / expansion circuits 1 and 2, and the compression operation is performed in parallel (S5, 6).

The end of each compression is waited for and the whole is ended (S7, 8). The compressed data may be transmitted to the outside.

In the decompression operation shown in FIG. 4, the data flow direction is CMEM → compression / decompression circuits 1, 2 → iMEM, but the compression / decompression circuits 1 and 2 are divided in parallel. The expansion point is the same as the compression operation described above.

The expanded image data is sent from the input / output unit 3 to the printer,
It is transmitted to display etc.

In the present invention, two compression / expansion circuits are used, but it is obvious that the processing speed is increased by increasing the number and dividing the image. Moreover, when the number of compression / expansion circuits is increased, it is necessary to increase the number of DMAC channels as well, and it is necessary to divide the same as the number of companding blocks of iMEM and CMEM.

Further, in the present embodiment, both compression and decompression are divided, but it is needless to say that only one of them may be divided.

[Effect]

As described above, the image data processing device according to the present invention can be applied to compression such as so-called two-dimensional compression and has high versatility.

Further, according to the present invention, it is possible to dramatically speed up the compression or decompression processing of image data with a simple configuration.

[Brief description of drawings]

FIG. 1 is a block diagram of a compression / expansion device to which the present invention is applied, and FIG.
The figure shows the division of the image, FIG. 3 is the flow chart showing the compression operation, and FIG. 4 is the flow chart showing the decompression operation. MPU is the control unit, iMEM is the page memory, CMEM is the memory, DMAC. Is a DMA controller.

Claims (4)

[Claims] 1. A storage unit capable of storing image data of one screen, and a storage unit connected to the storage unit via a common bus and provided corresponding to a plurality of two-dimensional areas obtained by dividing one screen. A plurality of compression and / or decompression circuits; and image data of the plurality of two-dimensional areas stored in the storage means, the plurality of compression circuits using the channels for each of the two-dimensional areas via the common bus. And / or transfer means for transferring to a decompression circuit, wherein the plurality of compression and / or decompression circuits are transferred via the common bus using a plurality of channels by the transfer means. An image data processing device characterized by compressing and / or expanding image data of a plurality of two-dimensional areas in parallel. 2. The image data processing device according to claim 1, further comprising second storage means for storing the image data compressed or expanded by the plurality of compression and / or expansion circuits. Image data processing device. 3. The image data processing device according to claim 2, wherein the transfer means stores the image data compressed or expanded by the plurality of compression and / or expansion circuits in each of the two-dimensional areas. An image data processing device, characterized in that the data is transferred to the second storage means using a channel. 4. The image data processing apparatus according to claim 1, wherein the transfer means is a DMA controller.