JP2827314B2 - Image compression circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image compression circuit that compresses an image, and in particular, can speed up processing such as color conversion, DCT-SQ, and variable-length coding. The present invention relates to an image compression circuit.

[Conventional technology]

In order to file and communicate a large amount of image data, the processing requires a considerable amount of time. Techniques for compressing image data are used to reduce these times. There are various types of compression types of image data, and one of them is the DCT-SQ method for converting to frequency components by a two-dimensional discrete cosine-scalar quantization method.

[Problems to be solved by the invention]

Image data compression by the DCT-SQ method is divided into color conversion processing, DCT-SQ processing, and VLC (variable length coding) processing. Therefore, if these processes are performed sequentially, it takes time for the processes, and a large amount of image data cannot be processed at high speed.

Therefore, an object of the present invention is to perform these color conversion processing, DCT-SQ
An object of the present invention is to provide an image compression circuit capable of performing high-speed processing and VLC processing.

[Means for solving the problem]

According to the present invention, (i) a color conversion circuit for converting multi-valued image data of three colors of red, green and yellow into luminance and color difference data of n × m pixel size in each of vertical and horizontal directions, and (ii) this color conversion circuit (Iii) a first-in first-out memory for inputting data of a predetermined unit, and (iii) input data of a predetermined unit from the first first-in first-out memory, and obtain luminance and color difference data for the n × m pixel size. A DCT-SQ circuit for converting to a frequency component by a two-dimensional discrete cosine-scalar quantization method, and (iv) the DCT-SQ
A second first-in first-out memory for inputting data of a predetermined unit processed by the circuit, and (v) a variable-length encoding circuit for inputting data of a predetermined unit for each predetermined unit from the second first-in first-out memory and performing encoding. A compression circuit is provided.

By using a first-in-first-out (FIFO) circuit, parallel processing of color conversion processing, DCT-SQ processing, and VLC processing can be performed, thereby speeding up the compression of image data by the DCT-SQ method.

〔Example〕

 Hereinafter, the present invention will be described in detail with reference to examples.

FIG. 1 shows an image compression / decompression circuit capable of performing both compression and decompression of an image as one embodiment of the image compression circuit of the present invention.

Red, green and yellow (R, G, B) multi-valued image data of three colors 11
Are input to the color conversion circuit 12 of the image compression / decompression circuit. The color conversion circuit 12, a vertical, luminance and color difference horizontal respectively n × m Pikusarusaizu _{(Y, C b, C r} ) is converted into the image data 13 of first FIFO circuit 14 configured by an IC (integrated circuit) Supplied to When the color conversion of all the pixels is completed and the input to the first FIFO circuit 14 is performed, the data 15 is supplied to the DCT-SQ circuit 16 from there.
Each luminance and chrominance _{(Y, C b, C r} ) is two-dimensional discrete cosine - is transformed into frequency components by the scalar quantization method, the data 17 of the frequency components. The data 17 of this frequency component is stored in a second FIFO circuit 18 also constituted by an IC.
Is input to

When the processing by the DCT-SQ circuit 16 is completed for all pixel data, the data 19 is transmitted from the second FIFO circuit 18 to the VLC 20.
, Where encoding, that is, unequal-length compression processing is performed. The pressure type data 21 created in this manner is transmitted to, for example, another device.

The reverse conversion when the compressed data 21 is input to the VLC 20 is as follows:
This is performed in the reverse sequence to the conversion process just described.

FIG. 2 shows a processing sequence at the time of encoding and decoding. First, the operation of the image compression / decompression circuit during encoding will be described. The color conversion processing i.e. red figure Aa, green and yellow (R, G, B) 3-color luminance and color difference _{(Y, C b, C r} ) results of the processing to be converted into, first at time t ₁ F
First image data 13 is stored in an IFO circuit 14 (shown as F).
Is supplied to the DCT-SQ circuit 16 as soon as is input. As a result, in parallel with the time when the next color conversion processing is performed by the color conversion circuit 12, the DCT-SQ
Processing is performed (FIG. 2, Ab).

Next image data 13 from the color conversion circuit 12 at time t ₂ is the first
The signal is input to the FIFO circuit 14, but the first FIFO circuit 14
This is buffered until the processing of the SQ circuit 16 is completed. Then, the first FIFO in time t _3, which was the end
The data 15 is supplied from the circuit 14 to the DCT-SQ circuit 16.
At the same time, the data 17 for which the processing of the DCT-SQ circuit 16 has been completed is input to a second FIFO circuit 18 (shown as F), and the second FIFO circuit 18 immediately converts this to data VL.
Supply to C20. As a result, the processing by the VLC 20 starts in parallel with the processing by the DCT-SQ circuit 16 (second processing).
Figure Ac). Note that the color conversion circuit 12 also starts the color conversion processing in parallel with time in consideration of the DCT-SQ processing that usually requires the longest time.

Similarly, while buffering data in the first and second FIFO circuits 14 and 18, these are supplied to the DCT-SQ circuit 16 and the VLC 20 at desired timing, and the color conversion circuit 12 and the DCT-SQ circuit The three circuits 16 and VLC 20 perform processing in parallel.

The same applies to the inverse transformation shown in FIGS.
Here, FIG. 9B shows the timing of the VLC process in decoding, and FIG. 10B shows the timing of the inverse DCT-SQ process. FIG Bc represents the color conversion processing i.e. luminance and chrominance _{(Y, C b, C r} ) to red, green and yellow (R, G, B) the Tainmingu inverse transformed are processed three colors.

In the above-described embodiment, not only the image compression but also the decompression are processed in parallel in time, so not only the compression of the image data but also the processing time is not limited to the decompression of the compressed image data. Can be shortened.

〔The invention's effect〕

As described above, according to the present invention, a first-in first-out memory is arranged between the color conversion processing and the DCT-SQ processing, and between the DCT-SQ processing and the VLC processing, so that the three processings can be processed in parallel in time by a predetermined unit. As a result, the overall compression processing time can be reduced.

[Brief description of the drawings]

1 is a block diagram showing a circuit configuration of an image compression / expansion circuit, and FIG. 2 is a timing chart showing a state of parallel processing by this circuit. It is. 11: Multi-valued image data, 12: Color conversion circuit, 14: First FIFO circuit, 16: DCT-SQ circuit, 18: Second FIFO circuit, 20: VLC, 21: Compression data.

Claims (1)

(57) [Claims] 1. A color conversion circuit for converting multi-valued image data of three colors of red, green and yellow into luminance and color difference data of n × m pixel size in each of vertical and horizontal directions, and a predetermined unit converted by the color conversion circuit A first-in first-out memory for inputting data of each unit, and data of predetermined units are input from the first first-in-first-out memory, and two-dimensional discrete cosine-scalar quantization of luminance and chrominance data for this n × m pixel size A DCT-SQ circuit for converting to a frequency component by a method, a second first-in first-out memory for inputting data of a predetermined unit processed by the DCT-SQ circuit, and a predetermined unit of data input from the second first-in first-out memory And a variable-length encoding circuit that performs encoding.