JPH0787567B2 - TV camera with printer - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a television camera with a printer that can print an image of a television screen as a still image by a dot printer.

[Prior Art] A TV camera with a printer is being developed in which a video signal of an image taken by a small TV camera such as a CCD camera can be stored in a RAM or a mini floppy disk and printed out as a still image.

This television camera with a printer records a video signal as a digital signal in a storage medium such as a RAM or a mini floppy disk, reads out the signals recorded in the storage medium in the order of recording, and prints an image by a printing device such as a dot printer. I am trying to do it.

[Problems to be Solved by the Invention] A television camera with a printer is required to be downsized together with the miniaturization of the camera, and the printer unit is also required to be downsized.

However, there is a limit to reducing the width of the printer section because the image becomes difficult to see when the printed image becomes small.

[Means for Solving the Problems] The present invention relates to a television camera with a printer for storing a video signal as a digital signal, and a memory circuit for writing a video signal for one field among the video signals output by the television camera, and the memory. A control circuit that reads out the video signal recorded in the RAM of the circuit is provided, and the video signal is RA
When writing to M, specify an address that increases by 1 sequentially,
When reading out the written video signal, a specific address is set as an initial value, and a number corresponding to the number of pixels of one scanning line is sequentially added to the initial value, and the number of times corresponding to the number of scanning lines storing the address is designated. After that, 1 is subtracted from the initial value, a numerical value corresponding to the number of pixels of one scanning line is added to this numerical value a number of times corresponding to the number of sequential scanning lines, and 1 is further subtracted from the initial value. When reading the video signal stored in RAM and the address designating circuit that outputs this value to the memory circuit as the address signal, the density information of each pixel in the video signal is displayed.
Any one of a read buffer circuit that reads out from the RAM and stores it once, and also stores average value information obtained by averaging newly read density information and previously read density information, and density information or average value information of the read buffer circuit. And a comparison circuit for comparing the value of the density signal from the gradation counter circuit with the density information selected by the selection circuit, and an interpolation circuit for controlling the read buffer circuit and the selection circuit. And

[Operation] In the television camera with a printer according to the present invention, when the video signal is stored in the RAM by the address designating circuit, the scanning line is decomposed into pixels, and the density information of each pixel is stored in the RAM address in order. When reading the density information of each pixel from the RAM when printing with the printer unit, the address is specified so that the density information of the address that sequentially adds the number corresponding to the number of pixels of one scanning line with the specific address as the initial value is read. The address is specified by the circuit, the information stored in this specified address is transferred to the read buffer circuit, and then the information is sent to the printer section through the selection circuit, etc. It is possible to sequentially send each density information of the pixels arranged in the above to the printer unit.

Even if the number of vertical pixels to be stored in the RAM is about 250 according to the number of scanning lines, a read buffer circuit that can create average density information from the density information of two pixels is provided and interpolation is performed. By the circuit and the selection circuit, it is possible to increase the number of pixels based on the density information of the average value in addition to the density information of each pixel stored in RAM. Even when there are many, it is possible to give print density information corresponding to the density of each pixel to each dot.

[Embodiment] An embodiment according to the present invention is a television camera with a printer that prints a still image by a video signal for one field in the video signal from the television camera, and is 240 out of the scanning lines forming one field. 408 scan lines for each scan line
Each pixel is stored as a digital signal in which the density of each pixel is divided into 32 gray levels.

The television camera with a printer according to this embodiment has an AD converter 14 for converting a video signal from the television camera 12 as a camera unit into a digital signal, as shown in FIG.
The AD converter 14 samples a video signal that is an analog signal at a timing cycle of 8 MHz, for example, and converts each sample into a 5-bit digital signal to divide each scanning period of the video signal into about 420 pixels, Each pixel is sent to the write buffer circuit 30 as a density signal in which the density is divided into 32 gradations.

As shown in FIG. 2, the write buffer circuit 30 is composed of six 5-bit registers and a latch control circuit, and the latch control circuit 31 outputs an 8 MHz clock signal synchronized with the clock signal of the AD converter 14. In addition, the write signals are sequentially output to the first register 32 to the sixth register 37, and alternated to the first register 32 to the third register 34 and the fourth register 35 to the sixth register 37 only once every 6 pulses of the clock signal. The read signal is output to the first register 32 to the sixth register 37 to sequentially store the digital signals from the AD converter 14, and the information of three pixels stored in the first register 32 to the third register 34 is stored. Are collectively sent to the memory circuit 45 as a 15-bit digital signal, and the information for three pixels stored in the fourth register 35 to the sixth register 37 is collected together.
It is sent to the memory circuit 45 as a 15-bit digital signal, and every time a read signal is output to the first register 32 to the third register 34 and the fourth register 35 to the sixth register 37, that is, the clock signal A memory signal is output to the memory circuit 45 every three pulses.

The latch control circuit 31 outputs a write signal, a read signal, and a memory signal only for a predetermined period in response to a write command signal from the control circuit 40. The write buffer circuit 30 has 240 scanning lines in one field. The density information of 408 pixels in each scanning line is sent to the memory circuit 45.

The control circuit 40 includes the control unit 41 and the scanning line counter circuit.
42 and an end detection circuit 43, and the control unit 41 controls the sync separation circuit 16 to separate the sync signal from the video signals from the TV camera 12.
Further, the memory start signal from the memory switch circuit 18 and the print start signal from the print switch circuit 22 are input.

The memory switch circuit 18 prevents chattering of the memory switch 20, measures the duration of the memory switch 20 being pressed, and outputs a memory start signal when the memory switch 20 is reliably operated. Further, the print switch circuit 22 is also a circuit that detects chattering of the print switch 24 and detects that the print switch 24 has been reliably operated, and outputs a print start signal.

Then, the control unit 41 in the control circuit 40 uses the sync separation circuit 16
When the memory start signal is input while the horizontal synchronization and vertical synchronization timings, and the first field and the second field are further discriminated by the synchronization signal from, it is required after the vertical synchronization signal after one frame is input. When a number of horizontal synchronizing signals are input, a write command signal is output to the write buffer circuit 30 for 51 μsec from the time when a required time has elapsed after the end of the horizontal synchronizing signals and each horizontal synchronizing signal to be input thereafter. Yes, for example, about 420 5 bits of digitized video signals in a period of 52.7 μsec, which is a scanning period excluding the blanking period of the scanning line period in each scanning line from the third scanning line of the first field. Of the information, 408 pieces of 5-bit information are stored in the memory circuit 45 via the write buffer circuit 30, and the scanning line counter circuit
When it is detected by 42 that the density information of 240 scanning lines is stored in the memory circuit 45, the output of the write command signal is stopped.

Further, the control section 41 outputs a write command signal to the write buffer circuit 30, outputs a memory operation signal to the memory circuit 45, and further outputs a plurality of types of write operation signals to the address designating circuit 50.

The memory circuit 45 to which this memory operation signal is input is
It comprises a RAM 48 having a storage capacity of 65.536 bytes (64 KB) and a memory control circuit 47, and the density information of the first register 32 to the third register 34 and the fourth register 35 to the sixth register 37 in the write buffer circuit 30. The density information is sequentially stored in the RAM 48 as 2-byte information by the memory signal from the write buffer circuit 30, and when recording in the RAM 48, it is sequentially recorded in a predetermined address of the RAM 48 by the address signal from the address designating circuit 50.

The address designating circuit 50 includes an initial value setting circuit 51, a subtraction register 52, a switch circuit 53, an addition arithmetic circuit 55, and a first addition circuit.
56, the second adder circuit 57 and the latch circuit 58, and when the write operation signal is input from the control circuit 40, the latch circuit 58 is first cleared to zero by the reset signal of the write operation signal, and the address signal " The address "0" is output first, and the initial value of the addition arithmetic circuit 55 input through the switch circuit 53 is set to "0", and the first addition signal corresponding to three cycles of the 8 MHz clock signal With the adder circuit 56, the value of the adder operation circuit 55 is sequentially incremented by "1", this value is read by the latch circuit 58 which is one of the write operation signals, and output from the latch circuit 58 as an address signal. Then, the video signal, which has been converted into a 5-bit digital signal, is sequentially stored as 2-byte density information for 3 pixels in the RAM 48 in the memory circuit 45, and one scan is performed excluding the blanking period. From address 0 to 408 pixel density information as the address at which is stored in the RAM48 per 3
Output address signals up to address 2.639.

In this embodiment, each scanning line is divided into about 420 pixels as described above, and each pixel is divided into shades by 5-bit data. Therefore, the density of each pixel is set to 32 gradations, and a precise density is expressed. RAM4 in the memory circuit 45, which is capable of storing 5 bits of data for 3 pixels as 2 bytes of density information.
Since it is stored in 8, it is possible to store as a video signal having a precise density difference while effectively utilizing the storage capacity of the RAM 48.

In this way the memory circuit 45 is
Among the pixels, the density information of 408 pixels in each scanning line is
Further, by storing the data of each pixel in 240 of the 245 scanning lines, the video signal for one field is stored.

Then, when printing a still image based on the video signal of one field stored in the RAM 48 in the memory circuit 45, this embodiment uses a line printer having 320 dots arranged in a row in the printer unit 85 and 408 × 320. A pixel image is printed, and 240 vertical pixels on the screen by 240 scanning lines are increased to 320 pixels by the read buffer circuit 60, the interpolation circuit 71, and the selection circuit 72, and printed in one horizontal line in the printer unit 85. Is to do.

The read buffer circuit 60 has five registers and one averaging register as shown in FIG. 3, and the first register 61 is the first of the 2-byte density information read from the memory circuit 45. The second register 62 reads the information of the sixth bit to the tenth bit, the third register 63 reads the information of the eleventh bit to the fifteenth bit, and the fourth register 64 The first register 61 at a fixed cycle
It receives the 5-bit density information from any one of the third register 63 and outputs the 5-bit density information to the selection circuit 72, and the fifth register 65 receives the 5-bit density information from the interpolation circuit 71 by the storage command signal. The averaging register 67 stores the 5-bit information from any one of the 1st register 61 to the 3rd register 63, and the averaging register 67 uses the average value of the information of the 4th register 64 and the information of the 5th register 65 as the density information in the selection circuit 72. It is what is output.

The read buffer circuit 60 operates to operate the memory circuit.
When sequentially reading the video signal from 45, the control unit 41 in the control circuit 40, the read signal that causes the address designation circuit 50 to read the initial value into the subtraction register 52 as a read operation signal,
A transmission signal for transferring the numerical value read in the subtraction register 52 to the addition operation circuit 55 via the switch circuit 53, and the addition operation circuit 55
A second addition signal for adding a constant value to the second addition circuit 57, and a value calculated by the addition operation circuit 55 to the latch circuit.
The latch circuit 58 outputs the latch signal and the operation signal to be read as the address signal from the latch circuit 58, outputs the interpolation signal to the interpolation circuit 71 and the start signal to the dot counter circuit 76 together with the read operation signal, and , And outputs a print signal to the printer unit 85.

Regarding each signal output from the control unit 41, first, a read signal as a read operation signal, a transmission signal, and a latch signal and an operation signal are output, and subsequently, an interpolation signal is output, and then as a read operation signal. The second addition signal is output three times, the interpolation signal is output once, the second addition signal is output three times, and the second addition signal is output 240 times. After being output once, interpolation output once
While the output of the second addition signal is repeated three times, when the second addition signal is output 240 times, the transmission signal is output once again,
The latch signal and the operation signal are output each time the transmission signal and the second addition signal are output, and the print signal is output when the transmission signal is output 31 times, and the start signal is the interpolation signal. It is output every time the second addition signal is output.

Therefore, the address designating circuit 50 is the control unit 41 in the control circuit 40.
The read operation signal is received from, and the value of “135” recorded in the initial value setting circuit 51 is read by the subtraction register 5
2, further stored in the addition arithmetic circuit 55 via the switch circuit 53 by the transmission signal, the latch circuit 58 latches this value by the latch signal, the latch circuit 58 by the operation signal the value of "135" as the address signal. First, the data that is output and stored in the RAM 135 of the memory circuit 45 is first read out, and this data is sent to the first register 61 to the third register 63 in the read buffer circuit 60. At this time, in the read buffer circuit 60, the third register 63 is activated by the switching signal from the data switching circuit 82, and the 11th to 15th bits of the data at the address 135 in the RAM 48 are stored in the third register 63. The concentration information stored and input to the third register 63 is stored in the fourth register.
It is sent to the selection circuit 72 via 64 and further sent to the comparison circuit 74.

Then, when the interpolation signal is input to the interpolation circuit 71, the interpolation circuit 71 outputs a storage command signal to the read buffer circuit 60, and the fifth register in the read buffer circuit 60.
65 stores the density information of the third register 63.

Next, in the address designating circuit 50, the second addition circuit 57 is activated by the second addition signal of the read operation signals from the control circuit 40, and the addition operation circuit 55 sets the initial value “135” to the value “136”. The value is set to "271" by adding, this value is read by the latch circuit 58 by the latch signal of the read operation signal, and the value of "271" is output from the latch circuit 58 as the address signal, and the 271 address of RAM48. The data stored in the buffer is sent to the read buffer circuit 60, and the third register 63 and the fourth register 64 are sent.
The density information of 5 bits is sent to the selection circuit 72 via the, and the values of the 11th to 15th bits of the 135th address stored in the 5th register 65 and the 271th address newly stored in the 4th register 64 are stored. The averaging register 67 calculates the average value of the values of the 11th to 15th bits, and outputs the 5-bit information output from the averaging register 67 as average value density information to the selection circuit 72.

The selection circuit 72, to which the average value density information and the density information of the fourth register 64 are input, first receives the selection signal from the interpolation circuit 71 to first compare the average value density information from the averaging register 67 to the comparison circuit. Then, the density information of the fourth register 64 is sent to the comparison circuit 74.

After that, in the address designating circuit 50, the second addition circuit 57 further adds “136” to the value of the addition operation circuit 55 by the second addition signal, and the value “408” is used as the address signal in the latch circuit 5.
The data at address 408 of RAM 48 is sent to the read buffer circuit 60 and sent to the selection circuit 72 and the comparison circuit 74 via the third and fourth registers 64.

Therefore, the comparison circuit 74 first detects the RA in the memory circuit 45.
The 11th to 15th bits of data stored at the 135th address of M48, that is, the density information of the 408th dot pixel in the first scanning line on the screen, which is stored in the RAM
The 10th to 15th bits of data stored at address 271 of 48, that is, the average of the density of the pixel of the 408th dot in the second scanning line and the density of the pixel of the 408th dot in the first scanning line The density information is input, the density information of the pixel of the 408th dot in the second scanning line is further input, and then the density information of the pixel of the 408th dot in the third scanning line is input by the data of the 407th address of RAM48. It will be input to the comparison circuit 74.

In this way, the address designating circuit 50 includes the control unit 41 in the control circuit 40.
The second addition circuit 57 is operated by the second addition signal of the read operation signals from the
Outputting this value as the address signal from the latch circuit 58 while adding the value of 6 ”is repeated 240 times, and the density information of the 406th dot to the 408th dot in each scanning line is read by the read buffer circuit 60. In the read buffer circuit 60, only the third register 63 is operated and the fourth register in each of 240 scanning lines is moved to the first register 61 to the third register 63.
The density information of the 08th dot is sent to the selection circuit 72, and the interpolation circuit 71 first reads out every time the second addition circuit 57 in the address designation circuit 50 operates three times by the interpolation signal from the control unit 41 in the control circuit 40. A storage command signal is output to the buffer circuit 60 to store the density information of the average value in the averaging register 67, and then a selection signal is output to the selection circuit 72 to send the average value density information to the comparison circuit 74. , 240 pixels in the vertical direction on the screen by 240 scanning lines per screen are increased to 320 pixels to create density information that matches the number of dots of the printer unit 85.

Further, the control unit 41 in the control circuit 40 outputs the read operation signal and the interpolation signal, and at the same time, outputs the start signal obtained by adding the pulse of the addition signal and the pulse of the interpolation signal to the dot counter circuit.
Since it is outputting to 76, when the read buffer circuit 60 reads 240 density information, this dot counter circuit 76
When 320 pulses are input, the dot counter circuit 76 outputs a carry signal to the gradation counter circuit 78, the gradation counter circuit 78 sets the initial value to "1", and each time the carry signal is input. A 5-bit density signal for increasing the value by "1" is output to the comparison circuit 74, and the carry signal is 31.
When individually input, the carry signal is sent to the data switching circuit 82, and the value of the density signal output to the comparison circuit 74 is set to "1".
Return to.

The density signal from the gradation counter circuit 78 and the selection circuit
The comparison circuit 74 to which the concentration information from 72 is input is a selection circuit.
The line buffer 87 of the printer unit 85 detects the coincidence between the density information sent from 72 and the value of the density signal sent from the gradation counter circuit 78 and outputs a print signal as to whether or not to print each dot.
To send to.

Therefore, the address designating circuit 50 adds the values from the 135th address to the 32nd and 639th addresses by "136" and adds each value from the 408th dot on the 1st scanning line to the 408th dot on the 240th scanning line. 240 dot density information is read from RAM48, and interpolation circuit
The density information of 240 pixels is set as the density information of 320 pixels by the 71 and the selection circuit 72, and the density information of the lightest first gradation output from the gradation counter circuit 78 is used as the density information of the 320 pixels in the comparison circuit 74. By comparison, it is sent to the printer unit 85, and it is determined whether or not each dot of 320 pixels is printed with the darkness of the first gradation, and it is stored in the line buffer 87 of the printer unit 85, and the density information of 320 pixels is stored. Then, the printer unit 85 first prints the first line with the first gradation. Next, the gradation counter circuit 78 sets the value of the density signal output by the carry signal from the dot counter circuit 76 to "2", the address designating circuit 50, the interpolation circuit 71, etc. perform the same operation as described above, and the RAM 48 The density information of 240 pixels stored in is used as the density information of 320 dots, and the comparison circuit 74
Then, a print signal as to whether or not to print at the density of the second gradation is sent to the line buffer 87 in the printer unit 85, and information as to whether or not to print at the second gradation for 320 pixels is stored in the line buffer 87. The gradation counter circuit 78 sequentially increases the value of the density signal from "1" to "31" without feeding the roll paper, and the address designation circuit 50 and the interpolation circuit. 71 and the like repeat the same operation 31 times, and the printer unit 85 completes the printing of one line of 320 dots with 32 gradations of 31 kinds of density and white.

In this embodiment, a print signal is sent to the printer section 85 when the density information from the selection circuit 72 and the density signal from the gradation counter circuit 78 coincide with each other to print dots having a density of a predetermined gradation. However, when the dot printer always prints at a constant density, the comparison circuit 74 outputs a print signal when the value of the density information from the selection circuit 72 is larger than the value of the density signal from the gradation counter circuit 78. When the value of the density information for the same dot on the same line is large, the density of the dot may be increased by repeating printing according to the value, and the comparison circuit 74 uses the dot printer format. At the same time, it suffices to output the print signal by performing coincidence or size comparison.

In this way, when one line is printed with a density of 32 gradations, the roll paper is fed by one line, and the gradation counter circuit 78
The data switching circuit 82 modifies and outputs the switching signal in response to the carry signal from, and thereby activates the second register 62 in the read buffer circuit 60.

In this state, the initial value “135” stored in the subtraction register 52 is transferred to the addition arithmetic circuit 55 and the latch circuit 58 via the switch circuit 53 in the address designating circuit 50 by the transmission signal of the read operation signal. , If the address signals up to addresses 32 and 639 are output by incrementing by "136" from address 135 again, 5 bits data of 6th bit to 10th bit among the data stored in each address of RAM48. Is output from the fourth register 64 and the averaging register 67 via the second register 62 in the read buffer circuit 60, and the density information of each 407th dot in the first to 240th scanning lines is the first density information. Like the line, it is processed as density information of 320 dots, printing of the second line is completed by printing 31 times, and the data switching circuit 82 changes the switching signal by the carry signal from the gradation counter circuit 78 and reads it. A first register 61 in the buffer circuit 60 to the operative state, the address designation circuit 50 in this state is repeated 31 times to output the output of the address in increments "136" from the 135 address 240 times.

In this way, when the printer section 85 prints three lines of 320 pixels per line, the data switching circuit 82 outputs a switching signal to the read buffer circuit 60 to switch the third register 63 in the read buffer circuit 60. At the same time as returning to a signal, it sends a circuit signal to the address designating circuit 50.

In the address designating circuit 50 to which the round trip signal is input, the subtraction register 52 which records the value "135" from the initial value setting circuit 51 subtracts "1" from the round trip signal to "134".
This value is added via the switch circuit 53 to the addition arithmetic circuit 55
And the latch circuit 58 to store the value of the address signal as "13.
Outputting 4 "first and outputting the address to which" 136 "is added 240 times is repeated 31 times, and by repeating this operation 3 times, each 405th dot in the 1st to 240th scanning lines One line of 320 pixels is printed according to the density information of No. 403, one line of 320 pixels is printed according to the density information of No. 404 dot in each scanning line, one line of 320 pixels is printed according to the density information of No. 403 dot, and the loop signal is again Thus, the value of the address signal is reduced to "133" by subtracting "1" from the value of the subtraction register 52, and "136" is repeatedly added to this value.

Then, the output of the subtraction register 52 in the address designating circuit 50 is sent not only to the addition arithmetic circuit 55 and the latch circuit 58 via the switch circuit 53, but also to the end detecting circuit 43 in the control circuit 40. A round trip signal from the data switching circuit 82 is also input to. Therefore, the subtraction register
52 outputs the value "0", and the address signal starts from address 0 to "13".
When the address signal having a value obtained by adding "6" is sequentially output a predetermined number of times and the data switching circuit 82 outputs a loop signal, the end detection circuit 43 can output the end signal. Stops the control of the printing operation.

The control unit 41 receives the strobe signal from the printer unit 85, controls the timing of sending a 320 dot print signal to the line buffer 87, and also outputs the print signal to the printer unit 85 to output the printer signal to the printer unit 85. The information processing of the density signal is performed in accordance with the operation of.

In the above embodiment, the density of each dot is a 5-bit signal of 32 gradations, and the density information of 3 dots is 2 bytes of information in the RAM4.
Although the effective utilization rate of 8 is increased, the density information of 1 dot is R
It is also possible to store it at the 1st address 8 bits of AM48,
In this case, as shown in FIG. 4, the number of registers in the write buffer circuit 30 is reduced to two as compared with the above embodiment, and the read buffer circuit 60 also omits the first to third registers and the data switching circuit. In addition to omitting 82, when writing the address designation circuit 50, add "1" sequentially from address 0 to 9
The address signals up to the address 7,920 are sequentially output, and at the time of printing, the value of the initial value setting circuit 51 is set to "407", the value added by the second addition circuit 57 is set to "408", and the addition of "408" is set to 240. Repeating 31 times, after printing the 408th dot of each scanning line, subtracting "1" from the initial value and setting the address signal value to "406", the density information of the 407th dot in each scanning line Is read out, and after the value from the subtraction register 52 becomes “0”, the end detection circuit 43 outputs the gradation counter circuit 78.
If the end signal is output according to the carry signal from, it is possible to simplify the control circuit and the like to some extent.

Further, when the print density is sufficient for 16 gradations, the density information of each dot can be processed by a 4-bit signal, so that the capacity of the RAM 48 can be reduced and the control circuit can be simplified.

[Advantages of the Invention] In the television camera with a printer according to the present invention, each scanning line has 40
The video signal for one field is divided into pixels such as 8 dots and stored in the memory circuit, and when printing, the same number of pixels in each scanning line is read from the memory circuit and printed by the printer unit. The pixels arranged in line are printed side by side in the printer unit. The horizontal direction, which requires a large number of pixels on the image, is converted to the paper feed direction in the printer unit, and the vertical direction with a small number of pixels is used in the printer unit. Since it is in the horizontal direction, the still image to be printed is enlarged while reducing the width of the printer unit, and
It is possible to perform printing in which the number of pixels is larger than the number of scanning lines based on the density information of the average value, and to print a large screen of a television camera with a small printer to make the image easy to see.

[Brief description of drawings]

FIG. 1 is a block diagram of a television camera with a printer according to the present invention, FIG. 2 is a block diagram showing a main part during a storage operation in this embodiment, and FIG. 3 is a view during a printing operation in this embodiment. And FIG. 4 is a block diagram showing another embodiment. 12 ... TV camera, 14 ... AD converter, 16 ... Sync separation circuit, 18 ... Memory switch circuit, 22 ... Print switch circuit, 30 ... Write buffer circuit, 40 ... Control circuit, 41 ... Control Section, 45 ... Memory circuit, 48 ... RA
M, 50 ... Address designating circuit, 60 ... Reading buffer circuit, 7
1 …… Interpolation circuit, 72 …… Selection circuit, 74 …… Comparison circuit, 76
...... Dot counter circuit, 78 ...... Gradation counter circuit, 85
...... Printer section, 87 ...... Line buffer.

Claims (1)

[Claims] 1. A camera section for outputting a video signal, an AD converter for converting a video signal output from the camera section into a digital signal, a sync separation circuit for separating a sync signal from the video signal, and a strobe signal during printing. A printer unit that is a dot printer that outputs, a memory switch circuit that can output a memory start signal and a print switch circuit that can output a print start signal, and one memory circuit that records a digital signal for one field in a video signal A digital buffer from the AD converter is read at a predetermined timing, and a write buffer circuit is stored in the memory circuit as density information of each pixel, and the information recorded in the memory circuit is read at a predetermined timing, and a memory circuit Concentration information newly read from A read buffer circuit that creates an average value with the density information read from the memory circuit and outputs the density information of the average value and the density information newly read from the memory circuit to the selection circuit, and the read buffer circuit from the memory circuit The dot counter circuit that counts the number of density information of each pixel to be read and outputs a carry signal when the density information corresponding to the number of pixels in one vertical line on the TV screen is read, and the carry signal from the dot counter circuit When recording the density information from the gradation counter circuit that sequentially outputs different density signals and the write buffer circuit in the memory circuit, the recording address is sequentially increased by 1 and the read buffer circuit reads the density information from the memory circuit. At this time, the number corresponding to the number of pixels in one scanning line is used as a reference value, and the number of pixels in one scanning line is After repeating adding a numerical value a predetermined number of times, subtracting 1 from the reference value, adding a numerical value corresponding to the number of pixels in one scanning line a predetermined number of times, and then subtracting 1 is repeated, and the addition and subtraction are performed. An address designating circuit that sends each numerical value calculated by the above as an address signal to the memory circuit, and a scanning line counter circuit and an address designating circuit that count the number of scanning lines based on the synchronization signal from the synchronization separation circuit. A control circuit having an end detection circuit for detecting that the address signal reaches the value of the final address, and a control circuit further having a control unit, wherein the vertical sync signal from the sync separation circuit is constant based on the memory start signal from the memory switch circuit. The write command signal is sent to the memory circuit by the time delay and the required time width after the elapse of a certain time from the horizontal sync signal. When a scanning line counter circuit counts a required number of scanning lines, a writing operation signal, a memory operation signal and a writing operation signal from the control unit The output is stopped, and based on the print start signal from the print switch circuit, the memory operation signal is output from the control unit to the memory circuit, the read operation signal is output to the address designating circuit, and the addition signal in the read operation signal is output a predetermined number of times. Each time it does, it outputs an interpolation signal to the interpolation circuit, outputs a start signal to start the operation of the dot counter circuit in accordance with the output of the read operation signal, and a print signal to the printer unit, and outputs an end signal from the end detection circuit. Stop output of memory operation signal, read operation signal, interpolation signal, start signal and print signal from the control unit A control circuit that outputs a storage command signal that causes the read buffer circuit to calculate an average value based on an interpolation signal from the control circuit and that outputs a selection signal to a selection circuit; and density information from the read buffer circuit. When sent to the comparison circuit and the selection signal from the interpolation circuit is input, first the density information of the average value output from the read buffer circuit, and then the density information newly read from the memory circuit by the read buffer circuit is compared. And a comparison circuit for comparing the density information sent from the selection circuit with the value of the density signal output from the gradation counter circuit and outputting a print signal to the printer section. TV camera with printer.