JPH0786714A - Structure for mounting hybrid ic - Google Patents

Structure for mounting hybrid ic

Info

Publication number
JPH0786714A
JPH0786714A JP5169950A JP16995093A JPH0786714A JP H0786714 A JPH0786714 A JP H0786714A JP 5169950 A JP5169950 A JP 5169950A JP 16995093 A JP16995093 A JP 16995093A JP H0786714 A JPH0786714 A JP H0786714A
Authority
JP
Japan
Prior art keywords
hybrid
board
substrate
lead terminal
soldering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5169950A
Other languages
Japanese (ja)
Inventor
Masanobu Hayashi
正信 林
Masao Yonezawa
正雄 米澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP5169950A priority Critical patent/JPH0786714A/en
Publication of JPH0786714A publication Critical patent/JPH0786714A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/366Assembling printed circuits with other printed circuits substantially perpendicularly to each other

Landscapes

  • Coupling Device And Connection With Printed Circuit (AREA)
  • Combinations Of Printed Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Multi-Conductor Connections (AREA)
  • Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)

Abstract

PURPOSE:To lower the height of a hybrid IC by the size corresponding to U-shaped recessions of lead terminals by a method wherein the U-shaped recessions of the lead terminals inserted into the hybrid IC substrate are inserted into the rectangular shaped groove provided in a master board. CONSTITUTION:A wiring pattern formed on an insulating board and plural lead terminals 2 provided with U-shaped recessions 2a are soldered onto one side of hybrid IC substrate whereon active parts e.g. IC, etc., and passive parts e.g. resistors, etc., are mounted. Next, the lead terminals 2 are formed of a flat plate type metallic board stamped in to a rectangular shape leaving soldering parts 2b in parallel with a master board 3 with the central part thereof bent in U-shaped. At this time, the inner diameter of the recessions 2a is almost equalized with the thickness of the hybrid IC substrate 1 to be inserted into the recessions 2a. Furthermore, the lead terminals 2 are soldered onto the soldering lands 5a formed on the board 1 in the recession 2a to be electrically and mechanically connected to the hybrid IC substrate 1.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ハイブリッドIC基板
の1辺に複数のリード端子が取り付けられたハイブリッ
ドICの実装構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid IC mounting structure in which a plurality of lead terminals are attached to one side of a hybrid IC substrate.

【0002】[0002]

【従来の技術】近年、電子機器の小形化、薄型化の進展
にともない、ハイブリッドICの実装においても、その
低背化の要求が益々増大してきている。以下、図面を参
照して、従来のハイブリッドIC及びハイブリッドIC
が実装される親基板について説明する。図において、同
一部分については同一符号を付す。
2. Description of the Related Art In recent years, with the progress of miniaturization and thinning of electronic equipment, there has been an increasing demand for a reduction in height in mounting a hybrid IC. Hereinafter, a conventional hybrid IC and a hybrid IC will be described with reference to the drawings.
The main board on which is mounted will be described. In the figure, the same parts are designated by the same reference numerals.

【0003】従来のハイブリッドICは、図5及び図6
に示すように、絶縁基板上に配線パターンを形成し、I
C、トランジスタ等の能動部品、及び抵抗、コンデン
サ、コイル等の受動部品を搭載したハイブリッドIC基
板11の一辺に、複数のストレート状のリード端子12
をはんだ付けにより取り付けた構成となっている。通
常、前記リード端子12は、ハイブリッドIC基板11
を挿入し、電気的かつ機械的に接続する断面略U字状の
クリップ部12aと、そのクリップ部12a下部の親基
板への挿入時のストッパー部12bと、そのストッパー
部12b下の親基板への挿入部12cとからなるストレ
ート状の形状となっている。また、上記ハイブリッドI
Cが実装される親基板13には、上記リード端子12が
挿入されるスルホール等の穴14(以下、リード端子挿
入穴という)が形成されている。
A conventional hybrid IC is shown in FIGS.
As shown in, a wiring pattern is formed on the insulating substrate, and I
A plurality of straight lead terminals 12 are provided on one side of the hybrid IC substrate 11 on which active components such as C and transistors and passive components such as resistors, capacitors and coils are mounted.
It is configured to be attached by soldering. Usually, the lead terminal 12 is the hybrid IC substrate 11
Clip section 12a having a substantially U-shaped cross section for electrically and mechanically connecting, a stopper section 12b at the time of insertion into the parent board below the clip section 12a, and a parent board below the stopper section 12b. It has a straight shape including the insertion portion 12c. In addition, the hybrid I
A hole 14 such as a through hole into which the lead terminal 12 is inserted (hereinafter referred to as a lead terminal insertion hole) is formed in the parent board 13 on which C is mounted.

【0004】そして、上記ハイブリッドICを親基板1
3に実装する場合は、図6及び図7に示すように、親基
板13のリード端子挿入穴14にハイブリッドICのリ
ード端子12をそのストッパー部12bまで挿入し、親
基板13の裏面でリード端子12をはんだ16ではんだ
付けしている。
Then, the hybrid IC is used as a main substrate 1.
6 and 7, the lead terminal 12 of the hybrid IC is inserted into the lead terminal insertion hole 14 of the parent board 13 up to its stopper portion 12b, and the lead terminal is provided on the rear surface of the parent board 13 as shown in FIGS. 12 is soldered with solder 16.

【0005】[0005]

【発明が解決しようとする課題】ところが、上記従来例
のハイブリッドICを親基板に実装するようにしたハイ
ブリッドICの実装構造においては、図7に示すよう
に、親基板に実装されたハイブリッドICの親基板表面
からハイブリッドIC基板上部までの高さh(以下、実
装高さという)は、リード端子のクリップ部及びストッ
パー部が親基板表面より上となるために、ハイブリッド
IC基板の高さよりも低くすることができなかった。
However, in the hybrid IC mounting structure in which the hybrid IC of the conventional example is mounted on the parent board, as shown in FIG. 7, the hybrid IC mounted on the parent board is The height h from the surface of the parent board to the top of the hybrid IC board (hereinafter referred to as mounting height) is lower than the height of the hybrid IC board because the clip portion and the stopper portion of the lead terminal are above the surface of the parent board. I couldn't.

【0006】また、前記リード端子のクリップ部は、割
りスナップ加工により形成されており、その上部先端近
傍も2〜30゜の所定角度で曲げ加工される等、加工工
数が多くかかり、リード端子成形の加工コストが高くな
っていた。さらに、ハイブリッドICを親基板に実装
後、リード端子のはんだ付け箇所下の余分な部分を切断
する工程が必要な場合もあった。
Also, the clip portion of the lead terminal is formed by split snap processing, and the vicinity of the top end of the lead terminal is bent at a predetermined angle of 2 to 30. Processing cost was high. Further, after mounting the hybrid IC on the parent board, there is a case where a step of cutting an extra portion under the soldering portion of the lead terminal is required.

【0007】そこで、本発明の目的は、以上のような従
来のハイブリッドICの実装構造が持つ問題点を解消さ
せ、安価で、かつ容易にハイブリッドICの実装高さを
低減することができるハイブリッドICの実装構造を提
供することにある。
Therefore, an object of the present invention is to solve the above problems of the conventional hybrid IC mounting structure, and to reduce the mounting height of the hybrid IC inexpensively and easily. To provide the implementation structure of.

【0008】[0008]

【課題を解決するための手段】上記目的を達成するため
に、本発明は、ハイブリッドIC基板の1辺に複数のリ
ード端子が取り付けられたハイブリッドICを、親基板
に実装するようにしたハイブリッドICの実装構造にお
いて、前記リード端子には、その一部をコの字状に成形
し、前記ハイブリッドIC基板をその両面及び端面で保
持するコの字状凹部と、そのコの字状凹部のすくなくと
も片側に突出した親基板と平行なはんだ付け部とを形成
し、前記ハイブリッドICが実装される親基板には、前
記リード端子のコの字状凹部を挿入する長方形状のスリ
ット溝を形成し、前記スリット溝の両側に前記リード端
子のはんだ付け部に対応するはんだ付けランドを形成
し、前記ハイブリッドICのリード端子のコの字状凹部
を前記親基板のスリット溝に挿入し、前記リード端子の
はんだ付け部を前記親基板のはんだ付けランドにはんだ
付けしたことを特徴とするものである。
In order to achieve the above object, the present invention is a hybrid IC in which a hybrid IC having a plurality of lead terminals attached to one side of a hybrid IC substrate is mounted on a parent substrate. In the mounting structure described above, a part of the lead terminal is formed into a U-shape, and the U-shaped recess for holding the hybrid IC substrate on both sides and end faces thereof and at least the U-shape recess. A mother board protruding in one side and a soldering portion parallel to each other are formed, and a mother board on which the hybrid IC is mounted is formed with a rectangular slit groove into which the U-shaped recess of the lead terminal is inserted. Soldering lands corresponding to the soldering portions of the lead terminals are formed on both sides of the slit groove, and U-shaped recesses of the lead terminals of the hybrid IC are formed on the parent board. Insert the bets groove, it is characterized in that the soldered portion of the lead terminal was soldered to the soldering lands of the parent substrate.

【0009】[0009]

【作用】上記の構成によれば、ハイブリッドIC基板を
挿入したリード端子のコの字状凹部は、親基板に設けら
れた長方形状のスリット溝に挿入されるので、親基板に
実装されたハイブリッドICの実装高さはリード端子の
コの字状凹部に相当する寸法分低くなる。
According to the above construction, the U-shaped recess of the lead terminal into which the hybrid IC board is inserted is inserted into the rectangular slit groove provided on the parent board, so that the hybrid mounted on the parent board is mounted. The mounting height of the IC is lowered by a dimension corresponding to the U-shaped recess of the lead terminal.

【0010】[0010]

【実施例】以下、図面を参照して、本発明の一実施例に
係るハイブリッドIC及びハイブリッドICが実装され
る親基板について説明する。図において、同一部分につ
いては同一符号を付す。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A hybrid IC according to an embodiment of the present invention and a parent board on which the hybrid IC is mounted will be described below with reference to the drawings. In the figure, the same parts are designated by the same reference numerals.

【0011】図1及び図2に示すように、本発明に係る
ハイブリッドICは、絶縁基板上に配線パターンを形成
し、IC、トランジスタ等の能動部品、及び抵抗、コン
デンサ、コイル等の受動部品を搭載したハイブリッドI
C基板1の一辺に、コの字状凹部2aを設けた複数のリ
ード端子2をはんだ付けにより取り付けた構成となって
いる。前記リード端子2は、平板状金属板を長方形状に
打ち抜きした後、その長辺方向の両側に親基板3と平行
なはんだ付け部2bを残し、その中央部をコの字状に折
り曲げ成形し、コの字状凹部2aを形成した構造となっ
ている。
As shown in FIGS. 1 and 2, a hybrid IC according to the present invention has a wiring pattern formed on an insulating substrate and includes active components such as ICs and transistors and passive components such as resistors, capacitors and coils. Hybrid I installed
A plurality of lead terminals 2 provided with U-shaped concave portions 2a are attached to one side of the C substrate 1 by soldering. The lead terminal 2 is obtained by punching a flat metal plate into a rectangular shape, leaving soldering portions 2b parallel to the parent board 3 on both sides in the long side direction, and bending the central portion into a U-shape. The structure has a U-shaped concave portion 2a.

【0012】上記リード端子2のコの字状凹部2aの内
寸は、ハイブリッドIC基板1の板厚にほぼ等しい寸法
とし、このコの字状凹部2aにハイブリッドIC基板1
を挿入する。そして、リード端子2は、コの字状凹部2
aで、ハイブリッドIC基板1上に形成されたはんだ付
けランド5aにはんだ付けされ、ハイブリッドIC基板
1と電気的かつ機械的に接続されている。
The inner dimension of the U-shaped recess 2a of the lead terminal 2 is approximately equal to the thickness of the hybrid IC substrate 1, and the hybrid IC substrate 1 is placed in the U-shaped recess 2a.
Insert. The lead terminal 2 has a U-shaped recess 2
At a, it is soldered to the soldering land 5a formed on the hybrid IC substrate 1, and is electrically and mechanically connected to the hybrid IC substrate 1.

【0013】また、上記のようにして構成されたハイブ
リッドICが実装される親基板3は、上記リード端子2
のコの字状凹部2aを挿入する長方形状のスリット溝4
を形成し、前記スリット溝4の両側に前記リード端子2
のはんだ付け部2bに対応するはんだ付けランド5bを
形成した構成となっている。
The parent board 3 on which the hybrid IC constructed as described above is mounted is the lead terminal 2 described above.
Rectangular slit groove 4 into which the U-shaped recess 2a is inserted
To form the lead terminals 2 on both sides of the slit groove 4.
The soldering land 5b corresponding to the soldering portion 2b is formed.

【0014】上記スリット溝4は、親基板製造過程で成
形することもできるし、または親基板製造後にレーザー
加工により形成することもできる。
The slit groove 4 can be formed in the process of manufacturing the parent substrate, or can be formed by laser processing after manufacturing the parent substrate.

【0015】なお、図において、ハイブリッドIC基板
上のはんだ付けランド5a及び親基板上のはんだ付けラ
ンド5bは、基板上に形成された配線パターンの一部で
あり、他の配線パターン(図では省略)と同時に形成さ
れる。
In the figure, the soldering lands 5a on the hybrid IC board and the soldering lands 5b on the parent board are a part of the wiring pattern formed on the board, and other wiring patterns (not shown in the drawing). ) Formed at the same time.

【0016】そして、上記実施例のハイブリッドIC
を、上記親基板3上に表面実装する場合は、通常、リフ
ローはんだ法により実装する。具体的には、図3に示す
ように、リード端子2のはんだ付け部2bが接続され
る、親基板3上のはんだ付けランド5bにはんだペース
ト6を塗布し、ハイブリッドICのリード端子2のコの
字状凹部2aを、親基板3に形成されたスリット溝4に
挿入する。これによりハイブリッドICは仮固定され、
はんだペースト6が塗布されたはんだ付けランド5bの
位置にリード端子2のはんだ付け部2bが設置される。
次ぎに、ハイブリッドICが仮固定された親基板3を加
熱して、はんだペースト6を溶融させる。このようにし
てハイブリッドICは親基板3にはんだ付けされる。
The hybrid IC of the above embodiment
When surface mounting is carried out on the parent board 3, it is usually mounted by the reflow soldering method. Specifically, as shown in FIG. 3, the solder paste 6 is applied to the soldering land 5b on the parent board 3 to which the soldering portion 2b of the lead terminal 2 is connected, and the solder paste 6 of the lead terminal 2 of the hybrid IC is coated. The V-shaped concave portion 2 a is inserted into the slit groove 4 formed in the parent substrate 3. This temporarily fixes the hybrid IC,
The soldering portion 2b of the lead terminal 2 is installed at the position of the soldering land 5b coated with the solder paste 6.
Next, the parent substrate 3 to which the hybrid IC is temporarily fixed is heated to melt the solder paste 6. In this way, the hybrid IC is soldered to the parent board 3.

【0017】上記のように実装されたハイブリッドIC
の実装構造においては、図3に示すように、ハイブリッ
ドIC基板を挿入したリード端子のコの字状凹部は、親
基板に設けられた長方形状のスリット溝に挿入されてお
り、親基板に実装されたハイブリッドICの実装高さh
を、リード端子のコの字状凹部に相当する寸法分低くす
ることができる。
Hybrid IC mounted as described above
In the mounting structure of FIG. 3, the U-shaped recess of the lead terminal into which the hybrid IC substrate is inserted is inserted into the rectangular slit groove provided on the parent board as shown in FIG. Mounting height of hybrid IC
Can be lowered by a dimension corresponding to the U-shaped recess of the lead terminal.

【0018】さらに、ハイブリッドICは、リード端子
のコの字状凹部が親基板に設けられた長方形状のスリッ
ト溝に挿入、保持されており、かつリード端子のはんだ
付け部に支持されるので、マウンタ等による親基板への
搭載時のズレ、倒れが発生しにくい。
Further, in the hybrid IC, the U-shaped concave portion of the lead terminal is inserted and held in the rectangular slit groove provided on the mother board, and is supported by the soldering portion of the lead terminal. It is unlikely that the mounter will cause misalignment or tilt when mounted on the main board.

【0019】また、リード端子のはんだ付け部が安定し
た面接触となり、良好なはんだ付け性と十分なはんだ付
け強度が得られる。
Further, the soldered portion of the lead terminal has a stable surface contact, and good solderability and sufficient soldering strength can be obtained.

【0020】なお、上記実施例のリード端子では、コの
字状凹部より突出した親基板と平行なはんだ付け部は、
コの字状凹部の両側に設けられているが、図4に示すよ
うに、片側にのみ形成されたリード端子でもよい。この
場合は、はんだ付け部の設けられた側がハイブリッドI
C基板の両面に位置するるように各リード端子を取り付
ければよい。
In the lead terminal of the above-mentioned embodiment, the soldering portion which is projected from the U-shaped concave portion and which is parallel to the mother board is
Although it is provided on both sides of the U-shaped recess, it may be a lead terminal formed on only one side as shown in FIG. In this case, the side where the soldering part is provided is the hybrid I
Each lead terminal may be attached so as to be located on both sides of the C substrate.

【0021】[0021]

【発明の効果】以上説明したように、本発明に係るハイ
ブリッドICの実装構造によれば、ハイブリッドIC基
板のリード端子取り付け部は、親基板に設けられた長方
形状のスリット溝に挿入実装されるので、親基板に実装
されたハイブリッドICの実装高さを、リード端子のコ
の字状凹部に相当する寸法分低くすることができる。し
たがって、ハイブリッドICの実装高さは、ハイブリッ
ドIC基板より低くすることができ、従来のリード端子
挿入タイプのハイブリッドICに比べ、より一層の低背
化実装が可能となる。
As described above, according to the hybrid IC mounting structure of the present invention, the lead terminal mounting portion of the hybrid IC substrate is inserted and mounted in the rectangular slit groove provided in the parent substrate. Therefore, the mounting height of the hybrid IC mounted on the parent board can be reduced by a dimension corresponding to the U-shaped recess of the lead terminal. Therefore, the mounting height of the hybrid IC can be made lower than that of the hybrid IC substrate, and the mounting can be made even lower than that of the conventional lead terminal insertion type hybrid IC.

【0022】さらに、基板縦型実装形態にもかかわら
ず、親基板への搭載時のズレ等もなく、リード端子のは
んだ付け部が安定した面接触となり、良好なはんだ付け
性が得らる。したがって、安定した信頼性の高い面実装
化が実現でき、実装時の不良を低減できるので、実装コ
ストの低減も達成できる。
Further, in spite of the vertical mounting type of the board, there is no deviation at the time of mounting on the parent board, and the soldered portion of the lead terminal has a stable surface contact, and good solderability can be obtained. Therefore, stable and highly reliable surface mounting can be realized, and defects at the time of mounting can be reduced, so that the mounting cost can be reduced.

【0023】しかも、本発明のリード端子は、単純なプ
レス成形によりコの字状凹部を形成するだけであり、リ
ード端子製造コストも低減できる。
Moreover, the lead terminal of the present invention can form the U-shaped concave portion by simple press molding, and the lead terminal manufacturing cost can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のハイブリッドIC及び親基
板の斜視図である。
FIG. 1 is a perspective view of a hybrid IC and a parent board according to an embodiment of the present invention.

【図2】図1の断面図である。FIG. 2 is a cross-sectional view of FIG.

【図3】本発明の一実施例のハイブリッドICを親基板
に実装した状態を示す断面図である。
FIG. 3 is a cross-sectional view showing a state in which a hybrid IC according to an embodiment of the present invention is mounted on a parent board.

【図4】(a)は本発明の他の実施例のハイブリッドI
Cの断面図、(b)は(a)の搭載部品を除く上面図で
ある。
FIG. 4 (a) is a hybrid I of another embodiment of the present invention.
Sectional drawing of C, (b) is a top view except the mounted components of (a).

【図5】従来のハイブリッドIC及び親基板の斜視図で
ある。
FIG. 5 is a perspective view of a conventional hybrid IC and a parent board.

【図6】図5の断面図である。6 is a cross-sectional view of FIG.

【図7】従来のハイブリッドICを親基板に実装した状
態を示す断面図である。
FIG. 7 is a cross-sectional view showing a state in which a conventional hybrid IC is mounted on a parent board.

【符号の説明】[Explanation of symbols]

1 ハイブリッドIC基板 2 リード端子 2a コの字状凹部 2b はんだ付け部 3 親基板 4 スリット溝 5b はんだ付けランド 6 はんだペースト 1 Hybrid IC board 2 Lead terminal 2a U-shaped recess 2b Soldering part 3 Parent board 4 Slit groove 5b Soldering land 6 Solder paste

フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01R 9/09 C 6901−5E Continuation of the front page (51) Int.Cl. 6 Identification number Office reference number FI technical display location H01R 9/09 C 6901-5E

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 ハイブリッドIC基板の1辺に複数のリ
ード端子が取り付けられたハイブリッドICを、親基板
に実装するようにしたハイブリッドICの実装構造にお
いて、 前記リード端子には、その一部をコの字状に成形し、前
記ハイブリッドIC基板をその両面及び端面で保持する
コの字状凹部と、そのコの字状凹部のすくなくとも片側
に突出した親基板と平行なはんだ付け部とを形成し、 前記ハイブリッドICが実装される親基板には、前記リ
ード端子のコの字状凹部を挿入する長方形状のスリット
溝を形成し、前記スリット溝の両側に前記リード端子の
はんだ付け部に対応するはんだ付けランドを形成し、 前記ハイブリッドICのリード端子のコの字状凹部を前
記親基板のスリット溝に挿入し、前記リード端子のはん
だ付け部を前記親基板のはんだ付けランドにはんだ付け
したことを特徴とするハイブリッドICの実装構造。
1. A hybrid IC mounting structure in which a hybrid IC having a plurality of lead terminals attached to one side of a hybrid IC board is mounted on a parent board. And forming a U-shaped recess for holding the hybrid IC substrate on both sides and end faces thereof, and a soldering part parallel to the parent substrate protruding at least on one side of the U-shaped recess. A rectangular slit groove into which the U-shaped recess of the lead terminal is inserted is formed on the parent board on which the hybrid IC is mounted, and the slit portions corresponding to the lead terminal soldering portions are formed on both sides of the slit groove. A soldering land is formed, the U-shaped recess of the lead terminal of the hybrid IC is inserted into the slit groove of the parent board, and the soldering portion of the lead terminal is A hybrid IC mounting structure characterized by being soldered to a soldering land of a parent board.
JP5169950A 1993-07-09 1993-07-09 Structure for mounting hybrid ic Pending JPH0786714A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5169950A JPH0786714A (en) 1993-07-09 1993-07-09 Structure for mounting hybrid ic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5169950A JPH0786714A (en) 1993-07-09 1993-07-09 Structure for mounting hybrid ic

Publications (1)

Publication Number Publication Date
JPH0786714A true JPH0786714A (en) 1995-03-31

Family

ID=15895877

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5169950A Pending JPH0786714A (en) 1993-07-09 1993-07-09 Structure for mounting hybrid ic

Country Status (1)

Country Link
JP (1) JPH0786714A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320756B1 (en) 1999-01-18 2001-11-20 Alps Electric Co., Ltd. Electronic device mounting structure using electronic device mounting member and cushioning
FR2836773A1 (en) * 2002-03-01 2003-09-05 Johnson Contr Automotive Elect Printed circuit board electrical conductor connection having terminal mounted conductor with adaptor/hole soldered track and terminal solidified with hole/solid board.

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320756B1 (en) 1999-01-18 2001-11-20 Alps Electric Co., Ltd. Electronic device mounting structure using electronic device mounting member and cushioning
FR2836773A1 (en) * 2002-03-01 2003-09-05 Johnson Contr Automotive Elect Printed circuit board electrical conductor connection having terminal mounted conductor with adaptor/hole soldered track and terminal solidified with hole/solid board.

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