JPH0774602A - Signal selecting circuit - Google Patents

Abstract

PURPOSE:To provide a signal selecting circuit which can select an analog input signal with no distortion of an output waveform even when an inverted input type amplifier is used at the post stage. CONSTITUTION:A signal selecting circuit 1 contains plural input terminals T1, T2, T3... which are connected to the amplifier circuits A1, A2, A3... respectively. An inverted input type amplifier 2 is connected to an output terminal TOUT. Furthermore the circuit 1 is provided with a high impedance control circuit 3 which sets the output impedances of amplifier circuits at high levels based on an external selection control signal SS and excluding one amplifier circuit that corresponding to the signal SS.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal selection circuit, and more particularly to a low power supply voltage analog signal circuit such as a battery drive circuit, which selects and outputs one analog input signal from a plurality of analog input signals. The present invention relates to a signal selection circuit.

In recent years, analog ICs have been used in battery-operable devices represented by mobile phones, laptop personal computers, etc., and there has been a demand for lowering the voltage of the power source due to the demand for long-term driving. .

Therefore, even in the signal selection circuit used for such an analog IC, one capable of low voltage driving is desired.

[0004]

2. Description of the Related Art Conventionally, the power supply voltage of an analog IC is +5.
V and ± 5 V are the mainstream, and the amplifier (amplifier circuit) used in the analog IC often has a non-inverting input type amplifier configuration that has a high input impedance and is easy to handle.

FIG. 5 shows a plurality of conventional non-inverting input type amplifiers.
The circuit configuration when a force (3 inputs in the figure) is used is shown. Non-anti
A plurality of amplifier circuits A are provided in front of the input-input type amplifier 50.₁₁~
A₁₃A pre-stage amplification section 51 having a
Circuit A₁₁~ A₁₃Each input terminal T connected to ₁₁~ A₁₃From
Input signal of the non-inverting input type amplifier 50 to a predetermined voltage level.
Amplify to

In the subsequent stage of the front stage amplifier section 51, one of the output signals of the plurality of amplifier circuits A _{11 to} A ₁₃ of the front stage amplifier section 51 is selectively non-inverted based on a selection control signal SS 'from the outside. The selection circuit section 52 for outputting to the type amplifier 50 is connected, and a plurality of switches S forming the selection circuit section 52 are connected.
₁₁ to S ₁₃ becomes the selection of exclusively input signal becomes the closed state is performed based on the selection control signal SS '.

With the widespread use of mobile phones, laptop personal computers and the like, batteries have been used as a power source, and the power source voltage has been reduced due to the demand for long-time driving.

With such a decrease in the power supply voltage, the output signal level of the non-inverting input type amplifier has decreased due to the limit of the input range, making it difficult to use. In order to solve this, by using an inverting input type amplifier whose input range is determined by the output range of the amplifier in the analog IC of low power supply voltage,
I tried to widen the input range.

FIG. 6 shows a circuit configuration when the conventional inverting input type amplifier has a plurality of inputs (three inputs in the figure). In front of the inverting input type amplifier 60, a plurality of amplifier circuits A _{11 to} A _{13 are provided.}
Is provided and amplifies input signals from the input terminals T _{11 to} T ₁₃ connected to the amplifier circuits A _{11 to} A ₁₃ to a predetermined voltage level of the inverting input type amplifier 60.

In the subsequent stage of the front stage amplifier section 61, an output signal of any of the plurality of amplifier circuits A _{11 to} A ₁₃ of the front stage amplifier section 61 is selectively inverted based on a selection control signal SS 'from the outside. A selection circuit unit 62 that outputs to the amplifier 60 is connected, and a plurality of switches SW that configure the selection circuit unit 62.
_{11 to} SW ₁₃ are exclusively closed based on the selection control signal SS ′, and the input signal input to the inverting input type amplifier via the input resistance R ′ _in is selected.

[0011]

By the way, in the case of the circuit configuration in which the above-mentioned conventional inverting input type amplifier is connected in the subsequent stage, the resistance value when each switch of the selection circuit section is closed, that is, the so-called on-resistance. Is superimposed on the input resistance of the inverting input type amplifier, and the resistance value of this ON resistance depends on the input voltage or the power supply voltage, the amplification factor (gain) of the inverting input type amplifier changes and the output waveform is distorted. There was a problem that it would come out.

Therefore, there is a problem that it is not suitable for use in a circuit that requires precision. Therefore, an object of the present invention is to provide a signal selection circuit capable of selecting an analog input signal without distorting the output waveform even when an inverting input type amplifier is used in the subsequent stage.

[0013]

FIG. 1 shows an explanatory view of the principle of the present invention. The signal selection circuit 1 of the present invention includes a plurality of input terminals T to which the input signals I ₁ , I ₂ , I ₃ , ... Are input.
₁ , T ₂ , T ₃ , ..., The amplifier circuits A ₁ , A ₂ , and A ₃ are connected to the respective input terminals, and the inverting input type amplifier 2 is connected to the output terminal T _OUT thereof. It is connected.

Further, the signal selection circuit 1 is based on an external selection control signal SS, and an amplification circuit (for example, amplification circuit A ₁ ,) other than one amplification circuit (for example, amplification circuit A ₂ ) corresponding to the selection control signal. A ₃ ... Is provided with a high impedance control circuit 3 for bringing the output impedance of A ₃ into a high impedance state.

[0015]

According to the present invention, high-impedance control circuit 3, an amplifier circuit other than the one amplifier circuit corresponding to the selection control signal based on the selection control signal SS from the outside (e.g. amplifier A ₂₎ (e.g. , Amplifier circuits A ₁ , A ₃ ,
The output impedance of ...) is set to a high impedance state.

Therefore, the plurality of input terminals T ₁ , T ₂ ,
T _3, any of the input signals of the signals _{I 1, I 2, I 3} ... input from ... are output to the inverting input amplifier 2 in the subsequent stage are amplified are selected exclusively.

As a result, as compared with the case where the input signal is selected via the switch, the input resistance component of the inverting input type amplifier at the subsequent stage does not change, so that the gain of the inverting input type amplifier becomes constant. The waveform is not distorted when the input signal is selected, and highly accurate amplification can be performed.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will now be described with reference to the drawings. FIG. 2 shows a circuit configuration when the inverting input type amplifier has a plurality of inputs (three inputs in the figure).

Inverting input type amplifier A₀Before each input,
Terminal T₁~ T₃Inverting the input signal from
Three amplifier circuits A for amplifying to a constant voltage level₁’
~ A ₃Is provided.

In the pre-stage amplifier section 10, an inverting input type amplifier A ₁ 'connected to the first input terminal T ₁ and a second input terminal T 1 are provided.
Connected to the _second non-inverting input amplifier A ₂ 'and, (including an inverting input type amplifier) third connected to the input terminal T ₃ the filter circuit A _3' is provided. In this case, each of the amplifiers A ₁ ′ to A ₃ ′ forming the pre-stage amplification section 10 is an amplifier that can be in a high impedance state.

_{One of} the amplifier selection signals S ₁ , S ₂ , and S ₃ output from the high-impedance control circuit 11 based on the selection control signal S ₀ input from the outside is input to the amplifier constituting the pre-stage amplification section 10. Is input, and the high-impedance control circuit 11 controls each amplifier selection signal to be exclusively at “H” level when selecting the input signal input to the corresponding amplifier.

More specifically, when the selection control signal S ₀ corresponds to selecting the input signal I ₁ , the high impedance control circuit 11 sets the amplifier selection signal S ₁ to "H".
And the other amplifier selection signals S ₂ and S ₃ are set to the “L” level.

FIG. 3 shows a detailed configuration of an amplifier which constitutes the pre-stage amplifying section 10. The amplifier A _x has a drain terminal D connected to the gate terminal G of a P-channel transistor Q ₁ forming a CMOS transistor in the output stage in addition to the circuit configuration of a normal amplifier, and a source terminal S connected to the high-potential-side power supply V _CC. Is connected, and the gate terminal G is connected to the output terminal of the inverter described later.
The drain terminal D is connected to the gate terminal G of the P-channel transistor Q ₃ connected to the N-channel transistor Q _{2 and} the N-channel transistor Q ₂ forming the output-stage CMOS transistor, and the source terminal S is connected to the low-potential-side power source V _SS An N-channel transistor Q ₄ having a gate terminal G connected to an input terminal of an inverter, which will be described later, and a selection control signal S
Is input and an inverter INV that outputs its inverted signal
And are provided.

Next, the operation will be described. When selecting the input signal input to the amplifier, that is, when outputting the output signal corresponding to the input signal to the amplifier, the amplifier selection signal S _x is set to the “L” level.

[0025] As a result, the output of inverter INV becomes "H", the gate terminal G of the P-channel transistor Q ₃ are becomes "H" level, is turned off (open) state. Similarly, the gate terminal G of the N-channel transistor Q ₄
Goes to "L" level and is turned off.

Therefore, the circuit configuration becomes equivalent to the case where the P-channel transistor Q ₃ and the N-channel transistor Q ₄ are substantially absent, the output stage CMOS transistors Q ₁ and Q ₂ are in the operable state, and the amplifier A _x can perform normal operation and can output an output signal with an amplification factor according to the input signal.

When the input signal input to the amplifier A _x is not selected, the amplifier selection signal S _x is "H".
Level. As a result, the output of the inverter INV becomes “L”, the gate terminal G of the P-channel transistor Q ₃ becomes “L” level, and the P-channel transistor Q ₃ is turned on (closed) and P
The gate terminal G of the channel transistor Q ₁ becomes “H” level, and the P channel transistor Q ₁ is turned off (open).
It becomes a state.

Similarly, the N-channel transistor Q ₄
The gate terminal G becomes "H" level, turned on, the gate terminal G of the N-channel transistor Q ₂ is turned to "L" level, N-channel transistor Q ₂ is turned off.

Therefore, the CMOS transistor in the output stage is
P channel transistor Q ₁And N channel M
OS transistor Q₂Both are turned off.
Is in a high-impedance state and is in a non-selected state.
It

FIG. 4 shows the detailed configuration of another amplifier constituting the pre-stage amplifier. The amplifier A _y is a P amplifier that forms a CMOS transistor in the output stage in addition to the normal amplifier circuit configuration.
A source terminal S is connected to a common connection point of the channel transistor Q ₁ and the N channel transistor Q ₂ , a selection control signal S is input to a gate terminal G, and a drain terminal D is connected to an output terminal of a P channel transistor Q ₅ . , The drain terminal D is connected to the source terminal S of the P-channel transistor Q ₅ , the source terminal S is connected to the output terminal,
An N-channel transistor Q ₆ whose gate terminal G is connected to the output terminal of an inverter described later, and an inverter INV which outputs the inverted signal of the selection control signal S input to its input terminal are configured. .

Next, the operation will be described. When selecting the input signal input to the amplifier A _y , that is, when causing the amplifier A _y to output the output signal corresponding to the input signal, the selection control signal S _y is set to the “L” level.

As a result, the gate terminal G of the P-channel transistor Q ₅ becomes "L" level and is turned on.
Similarly, the output of the inverter INV becomes "H", the gate terminal G of the N-channel transistor Q ₆ is turned "H" level, is turned on.

Therefore, the circuit configuration is equivalent to the case where the P-channel transistor Q ₅ and the N-channel transistor Q ₆ are substantially absent, the amplifier can perform normal operation, and it responds to the input signal with a predetermined amplification factor. Output signal can be output.

When the input signal input to the amplifier A _y is not selected, the selection control signal S _y is set to "H" level. As a result, the gate terminal G of the P-channel transistor Q ₅ is turned to "H" level, P-channel transistor Q ₅ is turned off.

[0035] In the same manner, the output of inverter INV becomes "L", the gate terminal G of the N-channel transistor Q ₆ is turned to "L" level, N-channel transistor Q ₆ is turned off.

Therefore, the amplifier A _y is in a high impedance state and is in a non-selected state. As described above, according to the above-described embodiment, the amplifier connected to the input terminal to which the input signal in the non-selected state is input is in the high impedance state, and is electrically disconnected from the inverting input type amplifier in the subsequent stage, The amplifier connected to the input terminal in the selected state theoretically does not have the on resistance of the conventional switch, so waveform distortion may occur due to the addition of the input resistance of the inverting input type amplifier. Therefore, it is possible to perform highly accurate signal processing.

By the way, when an inverting input type amplifier is used as the amplifier used in the pre-stage amplifying section 10, even if the inverting input type amplifier is in a high impedance state, the input signal is output through the feedback resistor (feedback resistor). It may leak into the.

Therefore, the leakage of the non-selected input signal to the output terminal side will be considered. In the discussion below,
Figure inverting input amplifier A ₁ 2 'and the non-inverting input amplifier A _2' considering only the non-inverting input amplifier A ₂ '
Consider the case of selecting.

The output impedance of the non-inverting input type amplifier A ₂ 'is very low because it is a feedback amplifier. More specifically, the output impedance of the normal amplifier is set to 10k.
Assuming that Ω and its open loop gain are 90 dB, the output impedance of the non-inverting input type amplifier A ₂ ′ that operates as a feedback amplifier is about 10 kΩ / 10 ^90/20 = ^3Ω .

On the other hand, the inverting input amplifier A ₁ 'is will be connected by a feedback resistor R _f1, the feedback resistor R _f1
The resistance value of is much higher than the output impedance of the non-inverting input type amplifier A ₂ 'due to the load drive capability of the amplifier A ₁ ' and the limitation of the power supply current, and the value is 10 kΩ.
Often exceeds.

For example, when the output impedance of the normal amplifier is 10 kΩ, the output impedance of the non-inverting input type amplifier A ₂ ′ is 3 Ω, and the value of the feedback resistance R _f1 of the inverting input type amplifier A ₁ ′ is 10 kΩ, S As a result of finding / N, S / N = 20 log (3/10000 + 10000) = 76 (dB). If this is left as it is, the S / N ratio will not be better than 76 dB, but the output impedance of the normal amplifier and the value of the feedback resistance R _f1 of the inverting input type amplifier A ₁ ′ are increased, and the non-inverting input type amplifier A ₂ ′ is opened. It is possible to improve the S / N by increasing the loop gain.

For example, the output impedance of the normal amplifier and the value of the feedback resistor R _f1 of the inverting input type amplifier A ₁ 'are set to 10
By setting 0 kΩ, the S / N becomes 96 dB. Further, by setting the open loop gain of the non-inverting input type amplifier A ₂ 'to 100 dB, the S / N becomes 106 dB.

Therefore, even in the configuration of the above embodiment, it is considered that there is no problem in S / N when an input signal leaks to the output terminal side via the feedback resistor.

Further, when it is difficult to make the output impedance of the normal amplifier and the value of the feedback resistance R _f1 of the inverting input type amplifier A ₁ 'high resistance value, as shown in FIG. Switches SW ₁ and SW ₂ that are off (open) when the corresponding amplifier is in the non-selected state
By providing the input terminal and the like between the input terminal and the ground, the input signal does not leak to the output terminal side through the feedback resistor.

[0045]

According to the present invention, the high impedance control circuit 3 sets the output impedance of the amplifier circuits other than the one amplifier circuit corresponding to the selection control signal to the high impedance state based on the selection control signal from the outside. Therefore, one of the signals input from the plurality of input terminals is exclusively selected, amplified, and output to the subsequent stage.

As a result, even when the inverting input type amplifier is connected in the subsequent stage, the input resistance component does not change as compared with the case where the input signal is selected through the switch, so that the gain of the inverting input type amplifier is not changed. Is constant, the waveform is not distorted when the input signal is selected, and highly accurate amplification can be performed. Therefore, it is possible to set a wide input signal range even when driving with a low power supply voltage,
It is advantageous in terms of S / N, etc.

Further, in a circuit configuration in which a high impedance state is set in a state where no current flows through the output stage transistor, the amount of current flowing during non-operation is reduced, resulting in low power consumption.

[Brief description of drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a circuit configuration diagram when a plurality of inverting input type amplifiers are input.

FIG. 3 is a detailed circuit diagram of an amplifier included in a pre-stage amplification unit.

FIG. 4 is another detailed circuit diagram of an amplifier included in the pre-stage amplifier.

FIG. 5 is a circuit configuration diagram when a conventional non-inverting input type amplifier has a plurality of inputs.

FIG. 6 is a circuit configuration diagram when a conventional inverting input type amplifier has a plurality of inputs.

[Explanation of symbols]

1 ... signal selection circuit 2 ... inverting input amplifier 3 ... high-impedance control circuit A _1, A _2, A ₃ ... amplifying circuit SS ... selection control signal T _1, T _2, T ₃ ... input terminal T _OUT ... output terminal 10 ... Preamplifier 11 ... High impedance control circuit A ₀ ... Inverting input type amplifier A ₁ '... Inverting input type amplifier A ₂ ' ... Non-inverting input type amplifier A ₃ '... Filter circuit (including inverting input type amplifier) A _x , A _y … Amplifier T ₁ … First input terminal T ₂ … Second input terminal T ₃ … Third input terminal S ₀ … Selection control signal S ₁ , S ₂ , S ₃ … Amplifier selection signal Q ₁ … P channel transistor Q ₂ ... N-channel transistor Q ₃ ... P-channel transistor Q ₄ ... N-channel transistor Q ₅ ... P-channel transistor Q ₆ ... N-channel transistor INV ... Inverter V _CC ... High potential side power supply V _SS ... Low Power supply on the potential side

Claims (1)

[Claims] 1. A plurality of input terminals (T _{1 to} T ₃ ) are provided,
Wherein the plurality of input terminals (T ₁ ~T ₃₎ signal selection circuit for outputting exclusively selected and a signal (I ₁ ~I ₃₎ inputted from said plurality of input terminals (T ₁ ~T ₃₎ A plurality of amplifier circuits (A _{1 to} A ₃ ) connected to the amplifier circuit and one of the amplifier circuits other than the one amplifier circuit corresponding to the selection control signal (SS) based on an external selection control signal (SS). A high-impedance control circuit (3) for setting the output impedance to a high-impedance state, and a signal selection circuit comprising: