JPH0773985B2 - Control circuit of constant-speed traveling device for vehicle - Google Patents

Description

TECHNICAL FIELD The present invention relates to a control circuit for a vehicle constant speed traveling device.

<Prior Art> Generally, various constant speed traveling devices for maintaining a vehicle speed at a predetermined set speed have been known. According to such a constant speed traveling device, by operating the accelerator pedal to operate the set switch when a desired vehicle speed is reached,
An actuator that operates in the same manner as the accelerator pedal operates, and even if the foot is subsequently released from the accelerator pedal, the vehicle speed can be maintained at the set speed.

As an actuator of such a constant speed traveling device, there is an actuator using a motor type actuator which has a relatively compact structure and can be controlled with high accuracy. In the control circuit for accelerating and decelerating by the motor type actuator, it is conceivable that the motor drive circuit is configured using a transistor bridge circuit.

In such a constant-speed traveling device, a watchdog timer circuit as an abnormality detection circuit is provided as a fail-safe function, and when the CPU as the control means runs out of control, an error from the watchdog timer circuit occurs. The clutch drive circuit is turned off by the output, and the magnet clutch provided on the output shaft of the actuator is disengaged to prevent the actuator from operating. Therefore, the abnormality of the device can be avoided.

By the way, in the motor drive circuit of the actuator, when the CPU goes out of control, the output of all combinations of logic circuits can be considered as the output of the CPU, so the transistors cause a so-called dead short circuit and the transistors are destroyed. There is a problem with that.

Therefore, in a forward / reverse drive circuit for a motor using a transistor bridge circuit, as disclosed in, for example, Japanese Patent Application Laid-Open No. 57-119682, between two transistors that should not be conducted at the same time, one is conducted by the other. It is considered to prevent the transistor from being destroyed due to a so-called dead short by providing a protection circuit for making the transistor non-conductive.

However, in the above-mentioned transistor protection circuit, since the motor drive current flows through the protection circuit, it is necessary to configure the protection circuit using a large element such as a power transistor, resulting in a relatively high cost of parts. May cause the problem of

In addition, in the event of a CPU runaway or other abnormality, there may be a conduction or non-conduction state between the transistors in the transistor bridge circuit that causes the actuator acceleration drive circuit to turn on.In that case, the actuator motor accelerates. It will rotate to the side. Even in this case, since the clutch drive circuit is turned off as described above, malfunction of the actuator can be avoided, but there is a problem that it is not preferable that the motor rotates toward the acceleration side.

<Problems to be Solved by the Invention> In view of the above-mentioned problems of the prior art, the main object of the present invention is to destroy the transistors constituting the transistor bridge circuit of the actuator drive circuit even when the control means runs away. Another object of the present invention is to provide a control circuit for a vehicle constant-speed traveling device that can prevent the actuator from being driven toward the acceleration side.

<Means for Solving Problems> According to the present invention, such an object is to provide a control means for performing arithmetic control to generate a control signal so as to maintain the vehicle speed at the set vehicle speed, and a vehicle speed control operation based on the control signal. Drive means having an acceleration and deceleration circuit comprising a transistor bridge circuit for driving a motor actuator for
An abnormality detecting means for detecting an abnormality of the control means,
A power supply is provided between the abnormality detection means and the transistor bridge circuit, and receives the abnormality detection output from the abnormality detection means, and the acceleration circuit of the transistor group forming the transistor bridge circuit is interposed between the motor and the power supply. Input of the control signal from the control means to the bases of two transistors connected in series between the ground and the ground, both of them are rendered non-conductive and the speed reduction circuit is rendered conductive. This is achieved by providing a control circuit for a vehicle constant-speed traveling device, which is characterized by having an abnormal transistor control means.

<Operation> As described above, the abnormality detection output is directly input to the motor drive circuit including the transistor bridge circuit, and the two transistors connected in series to the motor of the acceleration drive circuit are simultaneously turned off. At the same time, by making the deceleration drive circuit conductive, the actuator can be actively decelerated when the control means is abnormal. Moreover, since the acceleration drive circuit is surely brought into the non-conducting state regardless of the control signal from the control means, it is possible to prevent the dead short circuit between the transistors in the transistor bridge circuit.

<Examples> Hereinafter, preferred examples of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a circuit diagram showing a schematic configuration of a vehicle constant speed traveling device according to the present invention. The control of the constant speed traveling device is performed via the control unit 1, and in the control unit 1, a stabilized power supply circuit 2, an input control circuit 3, an input / output control circuit 4, and an actuator drive circuit 5 as a driving means. A motor current detection circuit 6 and a CPU 7 as a control unit that is connected to these circuits to perform arithmetic processing are provided.

The voltage supplied from the battery 8 as a power source is supplied to the terminal T1 of the control unit 1 through the ignition switch 9, the fuse 10 and the main switch 11. The other end of the main lamp 12 whose one end is grounded is connected between the main switch 11 and the terminal T1.

In the control unit 1, the power supply circuit 2 is connected to the terminal T1, and the voltage stabilized in the power supply circuit 2 is supplied to the CPU 7. As a power source for other circuits of the control unit 1, a power source terminal Vb is provided between the terminal T1 and the power source circuit 2, and a stabilized power source terminal is provided for the power source circuit 2.
Each Vc is provided.

A signal from the vehicle speed sensor 13 is input to the input control circuit 3 via the terminal T2, and signals from the set switch 15 and the resume switch 16 connected to the battery 8 via the common fuse 14 are respectively input to the terminal T3. , T4, and each signal that has passed through the input control circuit 3 is input to the CPU 7.

Furthermore, signals from the contacts S1 and S2 of the brake switch 18 attached to a brake pedal (not shown) are input to the control unit 1 as its control inputs via terminals T5 and T6. The contact S1 is a normally open contact, and is connected between a fuse 17 and a terminal T5, which are provided by branching between the battery 8 and the ignition switch 9.
The contact S2 is a normally closed contact, and the main switch 11 and terminal
It is connected between T1 and terminal T6. Further, as another control input, a signal from a clutch switch 19 attached to a clutch pedal (not shown) is input via a terminal T7. A brake lamp 20 is connected to the terminal T5.

The terminals T8 to T10 of the control unit are connected to the motorized actuator 21, and the terminal T8 is the actuator.
It is connected to a coil 22a of a magnet clutch 22 built in 21 and terminals T9 and T10 are connected to a motor 23, respectively. The actuator 21 drives an accelerator pedal (not shown) through a linkage (not shown) which is integrally operated via the magnet clutch 22 by rotating the motor 23 forward and backward. The terminal T10 is an output terminal for accelerating the vehicle, and a limit switch 24 for preventing overrun of the motor 23 is connected between the terminal T10 and the motor 23. The terminal T9 is an output terminal on the side that decelerates the vehicle. Further, the control unit 1 is grounded via the terminal T11.

In the control unit 1, the terminals T5 to T8 are connected to the CPU 7 via the input / output control circuit 4, respectively. That is, the contact S1 signal of the brake switch 18 from the terminal T5 and the contact S2 signal of the terminal T6 are input to the CPU 7 via the input / output control circuit 4, respectively.

The emitter of the transistor Q1 is connected to the terminal T6, and the collector of the transistor Q1 is connected to the terminal T8. A constant voltage diode ZD is connected between the emitter and collector of the transistor Q1. Transistor
A resistor R1 is connected between the emitter and the base of Q1, and the base of the transistor Q1 is connected to the collector of the transistor Q2 whose emitter is grounded via the resistor R2 and the diode D1. The diode D1 is connected so that a current flows from the base of the transistor Q1 toward the collector of the transistor Q2. The collector of the transistor Q1 is connected to the CPU 7 through the input / output control circuit 4 for the input signal of the magnet clutch 22.

The base of the transistor Q2 is grounded via the resistor R3, and is also connected to the terminal CT1 of the CPU 7 via the resistor R4. According to the output signal from the terminal CT1, the transistors Q2 and Q1 are turned on and the coil 22a of the magnet clutch 22 is turned on or off.

The actuator drive circuit 5 includes a known transistor bridge circuit for rotating the motor 23 in the forward and reverse directions according to the control output signal of the CPU 7. That is, as well shown in the drawing, the collector of the transistor Q3 that constitutes the acceleration drive circuit 25 is connected to the collector of the transistor Q4 via the terminal T10, the limit switch 24, the motor 23, and the terminal T9. The current for acceleration flows in this order, and the collector of the transistor Q5 that constitutes the deceleration drive circuit 26 is connected to the collector of the transistor Q6 via the terminal T9, motor 23, limit switch 24, and terminal T10. Will flow in this order.

The power supply for this transistor bridge circuit is terminal T6.
Voltage is supplied from the power supply terminal Vb to the emitter of the transistor Q3 via the diode D2 from the diode.
A voltage is supplied to the emitter of the transistor Q5 via D3. The emitters of the transistors Q4 and Q6 are grounded via the motor current detection circuit 6. The motor current detection circuit 6 is also connected to the terminal CT2 of the CPU 7.

As described above, the power supply voltage of the acceleration drive circuit 25 is the terminal
Since it is supplied from T6, the voltage to the acceleration drive circuit 25 is surely cut off by the brake switch 18 when the constant speed traveling is released by the brake operation.

Diodes D4 and D6 are connected to the transistors Q3 and Q5 with their cathodes to the emitters and their anodes to their collectors, respectively. Is connected towards. A resistor R5 is provided between the emitter and base of each transistor Q3 to Q6.
~ R8 are connected, and the collectors of the transistors Q7 to Q10 are connected to the bases of the transistors Q3 to Q6 via the resistors R9 to R12, respectively. And transistor Q7
The emitters of Q9 and Q9 are grounded, and their bases are also grounded via resistors R13 and R15. Also, the emitters of the transistors Q8 and Q10 are connected to the stabilized power supply terminal Vc, and the bases of each are also resistive.
It is connected to the stabilized power supply terminal Vc via R14 and R16. Further, the bases of the transistors Q7 to Q10 are connected to the signal output terminals CT3 to CT6 of the CPU 7 via the resistors R17 to R20, respectively.

By the way, the base of the transistor Q2 for driving the magnet clutch 22 is connected to the collector of the transistor Q11 whose emitter is grounded of the watchdog timer circuit 27 as an abnormality detecting means described later through a diode D8. Therefore, when the transistor Q11 is turned on, the base of the transistor Q2 is grounded via the diode D8.

Next, the configuration of the watchdog timer circuit 27 is shown below.
From the terminal CT7 of the CPU7, a pulse wave of, for example, 4 Hz is normally output, but in the event of an abnormality, the pulse wave is not output and a DC level output of 0 V or 5 V is output, or
For example, a high frequency pulse of 400 kHz generated according to the reference clock in the CPU 7 is output. The base of a transistor Q12 whose emitter is grounded is connected to the terminal CT7 via a capacitor C1 and a resistor R21. The base of the transistor Q12 is grounded via the capacitor C2 and the resistor R22 in parallel. Further, the collector of the transistor Q12 is connected to the base of the transistor Q13. The collector of the transistor Q13 is connected to the stabilized power supply terminal Vc, is also connected to the base via the resistor R23, and the base is grounded via the capacitor C3.
The emitter of the transistor Q13 is connected to the base of the transistor Q11 described above.

In the watchdog timer circuit 27 configured in this manner, a so-called bandpass filter is configured by the capacitor C1, the resistor R21, the capacitor C2, and the resistor R22. Passes a pulse wave, but is designed to block the DC level or high frequency pulse that is output in the event of an abnormality. Therefore, since the transistor Q12 is repeatedly turned on and off during normal operation, by keeping the charging time constant of the capacitor C3 relatively large, the capacitor C3 does not complete charging and the transistor Q1
Since the transistor 3 does not turn on, the transistor Q11 is held in the off state. At the time of abnormality, the transistor Q12 is held in the off state, so that the transistor Q13 is turned on and the transistor Q11 is turned on after the capacitor C3 is completely charged.

By the way, between the base of the transistor Q7 of the accelerating drive circuit 25 and the collector of the transistor Q11 of the watchdog timer circuit 27, the diode D9 flows in the direction from the base of the transistor Q7 to the collector of the transistor Q11. It is connected. A diode D10 is connected in the same direction between the base of the transistor Q4 and the collector of the transistor Q11.

Further, the collector of a transistor Q14, whose emitter is connected to the base of the transistor Q6, is connected to the base of the transistor Q5 of the deceleration drive circuit 26 via a resistor R24. The emitter of the transistor Q15 is connected to the power supply terminal Vb, and the collector of the transistor Q15 and the base of the transistor Q14 are connected via the resistor R26. Further, a resistor R27 is connected to the base of the transistor Q15, and a diode D11 is connected between the resistor R27 and the collector of the transistor Q11 so that a current flows toward the collector of the transistor Q11. . These diodes D9 to D11 and the transistor Q11 work together to form an abnormal transistor control means. In the actuator drive circuit 5 configured as above, the transistor Q11 is turned on at the time of abnormality as described above, and each transistor Q11 is turned on via the diodes D9 and D10.
2, since the bases of Q4 and Q7 are grounded, the terminal CT of CPU7
Regardless of the output states of 1, CT3, and CT4, the transistors Q2, Q4, and Q7 are non-conducting. When the transistor Q11 is turned on, the transistor Q15 is also turned on and Q14 is turned on, so that the transistors Q5 and Q6 are rendered conductive regardless of the output states of the terminals CT5 and CT6 of the CPU 7. Therefore, when the CPU 7 is abnormal, the driving transistor Q2 for driving the magnet clutch 22 is turned off, and the two transistors Q3, Q4 connected in series to the motor 23 are turned off. It is turned off, and the deceleration drive circuit 26 is turned on.

Next, the operation of the constant speed traveling device thus configured will be described.

When the main switch 11 is turned on with the ignition switch 9 closed, the power supply voltage is supplied to the control unit 1 and the main lamp 12 is turned on. Then, when the set switch 15 is turned on and, for example, the condition that the brake switch 18 and the clutch switch 19 are not operated is satisfied, the signal from the vehicle speed sensor 13 causes the vehicle speed at that time to be set as the set vehicle speed CP.
U7 remembers.

Next, depending on the difference between the set vehicle speed and the actual vehicle speed, the actuator
When driving 21, the CPU 7 outputs a signal for turning on the magnetic clutch 22, and the coil 22a is energized to bring the magnetic clutch 22 into a connected state. And
When accelerating, signals that turn on the transistors Q7 and Q8 are output from the terminals CT3 and CT4, and signals that turn off the transistors Q9 and Q10 are output from the terminals CT5 and CT6. Further, when decelerating, signals opposite to the above are output from the respective terminals. In this way, the motor 25 is rotated in the forward and reverse directions via the actuator drive circuit 5 and is controlled so that the actual vehicle speed and the set vehicle speed approximately match. The resume switch 16 is used to store a new set vehicle speed in the CPU 7 by pressing and releasing the switch when it is desired to raise it to a desired vehicle speed.

Further, when the CPU 7 detects that the brake switch 18 or the clutch switch 19 is operated, for example, the constant speed traveling state is released. At this time, in order to drive the actuator 21 in the decelerating direction, a deceleration signal is output from the CPU 7 to the actuator drive circuit 5, and the vehicle is decelerated.

In the constant-speed traveling device configured in this way, the CP
When U7 is abnormal, the output signals from the output terminals CT3 to CT6 may not be settled. A short circuit occurs, which may cause the transistors Q3 and Q6 to break down.

However, at the time of abnormality, as described above, the transistor Q11 is turned on, the magnet clutch 22 is disengaged, and the actuator 21 is in the non-driving state regardless of the signal output from the CPU 7, so that the actuator 21 malfunctions. Can be reliably prevented. Further, since the two transistors Q3 and Q4 connected in series to the motor 23 of the acceleration drive circuit 25 are also turned off, dead short current does not flow between the transistors Q3 and Q6 and Q4 and Q5. . Furthermore,
Since the deceleration driving circuit 26 is turned on and the motor 23 rotates to the deceleration side, it is possible to prevent the actuator from driving to the acceleration side.

In particular, when the magnetic clutch 22 is disengaged as described above, the output end of the actuator 21, which is the output side of the magnetic clutch 22, becomes free, and the throttle valve can be returned to the initial position. Heavy failsafe can significantly improve safety.

<Effects of the Invention> As described above, according to the present invention, even when a signal that causes the transistors of the transistor bridge circuit of the actuator drive circuit to be in a dead short state during an abnormality is output, the transistors are not destroyed. Therefore, not only the damage to the drive circuit can be suppressed to the minimum, but also the effect of driving the actuator to the deceleration side is extremely large.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a constant speed traveling device according to the present invention. 1 ... Control unit 2 ... Stabilized power supply circuit, 3 ... Input control circuit 4 ... Input / output control circuit 5 ... Actuator drive circuit 6 ... Motor current detection circuit 7 ... CPU, 8 ... Battery 9 ... … Ignition switch 10 …… Fuse, 11 …… Main switch 12 …… Main lamp, 13 …… Vehicle speed sensor 14 …… Fuse, 15 …… Set switch 16 …… Resume switch 17 …… Fuse, 18 …… Brake switch 19 ...... Clutch switch 20 …… Brake lamp, 21 …… Actuator 22 …… Magnet clutch 22a …… Coil, 23 …… Motor 24 …… Limit switch 25 …… Acceleration drive circuit, 26 …… Deceleration drive circuit 27 ...... Watchdog timer circuit

Front page continuation (72) Inventor Masahiko Asakura 1-4-1 Chuo, Wako-shi, Saitama, Ltd. Honda R & D Co., Ltd. Inside the Leaf Electric Works (72) Inventor Mitsuru Matsui 1268-1, Hirosawa-cho, Kiryu City, Gunma Prefecture Inside the Mitsuha Electric Works Co., Ltd. (56) Reference JP-A-58-15730 (JP, A) JP-A-59- 96450 (JP, A) JP 55-102062 (JP, A) JP 43-2010 (JP, B1)

Claims (1)

[Claims] 1. An accelerating device comprising control means for performing arithmetic control to generate a control signal so as to maintain the vehicle speed at a set vehicle speed, and a transistor bridge circuit for driving a motor actuator for performing a vehicle speed control operation based on the control signal. Drive means having a deceleration circuit, abnormality detecting means for detecting an abnormality of the control means, an abnormality detection output provided by the abnormality detecting means provided between the abnormality detecting means and the transistor bridge circuit. In the transistor group that receives the transistor bridge circuit, the acceleration circuit from the control means to the base of two transistors connected in series between the power source and the ground via the motor. In the case of an abnormal condition in which the input of the control signal is prohibited and both are made non-conductive and the deceleration circuit is made conductive. The control circuit of the vehicle for constant speed running apparatus characterized by having a Njisuta control means.